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GET /api/1.0/patches/2219467/?format=api
{ "id": 2219467, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2219467/?format=api", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.0/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260403035541.18355-10-zhenzhong.duan@intel.com>", "date": "2026-04-03T03:55:33", "name": "[v3,09/14] intel_iommu_accel: Handle PASID entry removal for pc_inv_dsc request", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e81a00ea2c6461c00a6f1b7d195d7da3e1eaf596", "submitter": { "id": 81636, "url": "http://patchwork.ozlabs.org/api/1.0/people/81636/?format=api", "name": "Duan, Zhenzhong", "email": "zhenzhong.duan@intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260403035541.18355-10-zhenzhong.duan@intel.com/mbox/", "series": [ { "id": 498583, "url": "http://patchwork.ozlabs.org/api/1.0/series/498583/?format=api", "date": "2026-04-03T03:55:36", "name": "intel_iommu: Enable PASID support for passthrough device", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/498583/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2219467/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=k/e5dIQx;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fn4gF0Qtyz1yCs\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 03 Apr 2026 14:57:29 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1w8Ve4-0001LU-6g; Thu, 02 Apr 2026 23:56:32 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <zhenzhong.duan@intel.com>)\n id 1w8Vdx-0001K6-Tn\n for qemu-devel@nongnu.org; Thu, 02 Apr 2026 23:56:26 -0400", "from mgamail.intel.com ([198.175.65.19])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <zhenzhong.duan@intel.com>)\n id 1w8Vdv-0004N9-Cw\n for qemu-devel@nongnu.org; Thu, 02 Apr 2026 23:56:24 -0400", "from fmviesa007.fm.intel.com ([10.60.135.147])\n by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 02 Apr 2026 20:56:22 -0700", "from unknown (HELO gnr-sp-2s-612.sh.intel.com) ([10.112.230.229])\n by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 02 Apr 2026 20:56:19 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1775188583; x=1806724583;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=0MFb3HenNSUls1fHNRaU0yBgX5qm6xrytDacYEjt9Sg=;\n b=k/e5dIQxz3qsTO9GfoXwAwuJAlbwAVbUtqq2KrSiI4eRHKNDBX+oVRo3\n pT9mV11MWlKen85gn2byCiXWIJp+nZrlZ79pExzU3dzoHMyk3wBz5ZG3Y\n jiajZCC0OElCVJ/2Apkqu6tVXa1EcWkK2yB6UM4K1RGlRgI2If2+opfHQ\n yAx31RYW5b3pw7vBnh3RyqsfzRZ/DvVj7dhaU7yfbUkxxWVwAVLNekO6q\n jciS60MfyqEOVmwxwo+4JZaN5aRATFsJPwceQLe3aRcZKEzrS1jCscoog\n V5EpgJUYlw1RlRxOTN6adcY/ae1vFtcIN6Xe0cSWTkm3cyuI20Q3+9Aaa A==;", "X-CSE-ConnectionGUID": [ "96jB31MqQryBNTidhD7/9g==", "0sfQhFlOQVyjMHPwBRX5mg==" ], "X-CSE-MsgGUID": [ "aVfGJ3wyS2SakPUGKZOvWw==", "xAbM44NEQSSw4aTr0lFT1w==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6800,10657,11747\"; a=\"76140657\"", "E=Sophos;i=\"6.23,157,1770624000\"; d=\"scan'208\";a=\"76140657\"", "E=Sophos;i=\"6.23,157,1770624000\"; d=\"scan'208\";a=\"223884904\"" ], "X-ExtLoop1": "1", "From": "Zhenzhong Duan <zhenzhong.duan@intel.com>", "To": "qemu-devel@nongnu.org", "Cc": "alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com,\n jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,\n skolothumtho@nvidia.com, joao.m.martins@oracle.com,\n clement.mathieu--drif@bull.com, kevin.tian@intel.com, yi.l.liu@intel.com,\n xudong.hao@intel.com, Zhenzhong Duan <zhenzhong.duan@intel.com>", "Subject": "[PATCH v3 09/14] intel_iommu_accel: Handle PASID entry removal for\n pc_inv_dsc request", "Date": "Thu, 2 Apr 2026 23:55:33 -0400", "Message-ID": "<20260403035541.18355-10-zhenzhong.duan@intel.com>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260403035541.18355-1-zhenzhong.duan@intel.com>", "References": "<20260403035541.18355-1-zhenzhong.duan@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=198.175.65.19;\n envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com", "X-Spam_score_int": "-48", "X-Spam_score": "-4.9", "X-Spam_bar": "----", "X-Spam_report": "(-4.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.542,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "When guest deletes PASID entries, QEMU will capture the pasid cache\ninvalidation request, walk through pasid_cache_list in each passthrough\ndevice to find stale VTDAccelPASIDCacheEntry and delete them.\n\nCo-developed-by: Yi Liu <yi.l.liu@intel.com>\nSigned-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>\nTested-by: Xudong Hao <xudong.hao@intel.com>\n---\n hw/i386/intel_iommu_accel.c | 80 +++++++++++++++++++++++++++++++++++++\n 1 file changed, 80 insertions(+)", "diff": "diff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c\nindex 46250aa75c..b951d90135 100644\n--- a/hw/i386/intel_iommu_accel.c\n+++ b/hw/i386/intel_iommu_accel.c\n@@ -16,6 +16,28 @@\n #include \"hw/pci/pci_bus.h\"\n #include \"trace.h\"\n \n+static int vtd_hiod_get_pe_from_pasid(VTDAccelPASIDCacheEntry *vtd_pce,\n+ VTDPASIDEntry *pe)\n+{\n+ VTDHostIOMMUDevice *vtd_hiod = vtd_pce->vtd_hiod;\n+ IntelIOMMUState *s = vtd_hiod->iommu_state;\n+ uint32_t pasid = vtd_pce->pasid;\n+ VTDContextEntry ce;\n+ int ret;\n+\n+ if (!s->dmar_enabled || !s->root_scalable) {\n+ return -VTD_FR_RTADDR_INV_TTM;\n+ }\n+\n+ ret = vtd_dev_to_context_entry(s, pci_bus_num(vtd_hiod->bus),\n+ vtd_hiod->devfn, &ce);\n+ if (ret) {\n+ return ret;\n+ }\n+\n+ return vtd_ce_get_pasid_entry(s, &ce, pe, pasid);\n+}\n+\n bool vtd_check_hiod_accel(IntelIOMMUState *s, VTDHostIOMMUDevice *vtd_hiod,\n Error **errp)\n {\n@@ -280,6 +302,57 @@ static void vtd_accel_fill_pc(VTDHostIOMMUDevice *vtd_hiod, uint32_t pasid,\n QLIST_INSERT_HEAD(&vtd_hiod->pasid_cache_list, vtd_pce, next);\n }\n \n+static void vtd_accel_delete_pc(VTDAccelPASIDCacheEntry *vtd_pce)\n+{\n+ QLIST_REMOVE(vtd_pce, next);\n+ g_free(vtd_pce);\n+}\n+\n+static void\n+vtd_accel_pasid_cache_invalidate_one(VTDAccelPASIDCacheEntry *vtd_pce,\n+ VTDPASIDCacheInfo *pc_info)\n+{\n+ VTDPASIDEntry pe;\n+ uint16_t did;\n+\n+ /*\n+ * VTD_INV_DESC_PASIDC_G_DSI and VTD_INV_DESC_PASIDC_G_PASID_SI require\n+ * DID check. If DID doesn't match the value in cache or memory, then\n+ * it's not a pasid entry we want to invalidate.\n+ */\n+ switch (pc_info->type) {\n+ case VTD_INV_DESC_PASIDC_G_PASID_SI:\n+ if (pc_info->pasid != vtd_pce->pasid) {\n+ return;\n+ }\n+ /* Fall through */\n+ case VTD_INV_DESC_PASIDC_G_DSI:\n+ did = VTD_SM_PASID_ENTRY_DID(&vtd_pce->pasid_entry);\n+ if (pc_info->did != did) {\n+ return;\n+ }\n+ }\n+\n+ if (vtd_hiod_get_pe_from_pasid(vtd_pce, &pe)) {\n+ /*\n+ * No valid pasid entry in guest memory. e.g. pasid entry was modified\n+ * to be either all-zero or non-present. Either case means existing\n+ * pasid cache should be invalidated.\n+ */\n+ vtd_accel_delete_pc(vtd_pce);\n+ }\n+}\n+\n+static void vtd_accel_pasid_cache_invalidate(VTDHostIOMMUDevice *vtd_hiod,\n+ VTDPASIDCacheInfo *pc_info)\n+{\n+ VTDAccelPASIDCacheEntry *vtd_pce, *next;\n+\n+ QLIST_FOREACH_SAFE(vtd_pce, &vtd_hiod->pasid_cache_list, next, next) {\n+ vtd_accel_pasid_cache_invalidate_one(vtd_pce, pc_info);\n+ }\n+}\n+\n /*\n * This function walks over PASID range within [start, end) in a single\n * PASID table for entries matching @info type/did, then create\n@@ -422,6 +495,13 @@ void vtd_accel_pasid_cache_sync(IntelIOMMUState *s, VTDPASIDCacheInfo *pc_info)\n TYPE_HOST_IOMMU_DEVICE_IOMMUFD)) {\n continue;\n }\n+\n+ /*\n+ * PASID entry removal is handled before addition intentionally,\n+ * because it's unnecessary to iterate on an entry that will be\n+ * removed.\n+ */\n+ vtd_accel_pasid_cache_invalidate(vtd_hiod, pc_info);\n vtd_accel_replay_pasid_bind_for_dev(vtd_hiod, start, end, pc_info);\n }\n }\n", "prefixes": [ "v3", "09/14" ] }