get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/1.0/patches/2219459/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2219459,
    "url": "http://patchwork.ozlabs.org/api/1.0/patches/2219459/?format=api",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/1.0/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": ""
    },
    "msgid": "<20260403035541.18355-13-zhenzhong.duan@intel.com>",
    "date": "2026-04-03T03:55:36",
    "name": "[v3,12/14] intel_iommu_accel: Switch to VTDAccelPASIDCacheEntry for PASID bind/unbind and PIOTLB invalidation",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "7da4109c0e8592807edc450ed45049e2d21b356d",
    "submitter": {
        "id": 81636,
        "url": "http://patchwork.ozlabs.org/api/1.0/people/81636/?format=api",
        "name": "Duan, Zhenzhong",
        "email": "zhenzhong.duan@intel.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260403035541.18355-13-zhenzhong.duan@intel.com/mbox/",
    "series": [
        {
            "id": 498583,
            "url": "http://patchwork.ozlabs.org/api/1.0/series/498583/?format=api",
            "date": "2026-04-03T03:55:36",
            "name": "intel_iommu: Enable PASID support for passthrough device",
            "version": 3,
            "mbox": "http://patchwork.ozlabs.org/series/498583/mbox/"
        }
    ],
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2219459/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=Nt8zJ5wj;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"
        ],
        "Received": [
            "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fn4g86c8Jz20wb\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 03 Apr 2026 14:57:23 +1100 (AEDT)",
            "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1w8VeB-0001No-4C; Thu, 02 Apr 2026 23:56:39 -0400",
            "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <zhenzhong.duan@intel.com>)\n id 1w8Ve9-0001NM-Mr\n for qemu-devel@nongnu.org; Thu, 02 Apr 2026 23:56:37 -0400",
            "from mgamail.intel.com ([198.175.65.19])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <zhenzhong.duan@intel.com>)\n id 1w8Ve6-0004N9-Lu\n for qemu-devel@nongnu.org; Thu, 02 Apr 2026 23:56:37 -0400",
            "from fmviesa007.fm.intel.com ([10.60.135.147])\n by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 02 Apr 2026 20:56:34 -0700",
            "from unknown (HELO gnr-sp-2s-612.sh.intel.com) ([10.112.230.229])\n by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 02 Apr 2026 20:56:30 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1775188594; x=1806724594;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=v5BFeGZx1sriX9zuH2GOuWxziI7zrzCLaFH46xipobA=;\n b=Nt8zJ5wjpVPmbGX80rxaQMykGcnUPO9eEam26PgCZBWIm7ipmfZFdOhG\n t4jMFQ6Xl5fi+TcWlqSWWXQyNQU9P+z/lmEE4a9nCsNBGiJMJhBmQ0+lv\n 3TUFs8zYzZSLGWDAMgeU7dtl5PeT62cgGS7OAq26HX0cBjnhC4Lkj6lHL\n dReqYltn7FUE62/4Iif3BC5Ixm7/fFZ4FNy4soZV5lseUqdwCNKL2pLmw\n PuVvd8Jkvj4Rhndj+OHSED4Rt+xWRTbaLTLNwG53qT5dXWpPgpW+CLvp9\n PbORxMj0rAnR+qZ7bauO8wxc/coge2AZ/1VOBk1ZoGaPlj1nwp+4cCrE1 w==;",
        "X-CSE-ConnectionGUID": [
            "ZgiP9ES4QLatEp8h7Aumlw==",
            "V2kgWQvYRwKJB40h1R9h7Q=="
        ],
        "X-CSE-MsgGUID": [
            "Vohlmv4QQNyUu/N4V3oZPQ==",
            "1EAN2TnQQg+mUeeuz3LPiw=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6800,10657,11747\"; a=\"76140685\"",
            "E=Sophos;i=\"6.23,157,1770624000\"; d=\"scan'208\";a=\"76140685\"",
            "E=Sophos;i=\"6.23,157,1770624000\"; d=\"scan'208\";a=\"223884941\""
        ],
        "X-ExtLoop1": "1",
        "From": "Zhenzhong Duan <zhenzhong.duan@intel.com>",
        "To": "qemu-devel@nongnu.org",
        "Cc": "alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com,\n jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,\n skolothumtho@nvidia.com, joao.m.martins@oracle.com,\n clement.mathieu--drif@bull.com, kevin.tian@intel.com, yi.l.liu@intel.com,\n xudong.hao@intel.com, Zhenzhong Duan <zhenzhong.duan@intel.com>",
        "Subject": "[PATCH v3 12/14] intel_iommu_accel: Switch to VTDAccelPASIDCacheEntry\n for PASID bind/unbind and PIOTLB invalidation",
        "Date": "Thu,  2 Apr 2026 23:55:36 -0400",
        "Message-ID": "<20260403035541.18355-13-zhenzhong.duan@intel.com>",
        "X-Mailer": "git-send-email 2.47.3",
        "In-Reply-To": "<20260403035541.18355-1-zhenzhong.duan@intel.com>",
        "References": "<20260403035541.18355-1-zhenzhong.duan@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Received-SPF": "pass client-ip=198.175.65.19;\n envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com",
        "X-Spam_score_int": "-48",
        "X-Spam_score": "-4.9",
        "X-Spam_bar": "----",
        "X-Spam_report": "(-4.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.542,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no",
        "X-Spam_action": "no action",
        "X-BeenThere": "qemu-devel@nongnu.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "qemu development <qemu-devel.nongnu.org>",
        "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>",
        "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>",
        "List-Post": "<mailto:qemu-devel@nongnu.org>",
        "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>",
        "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>",
        "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org",
        "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"
    },
    "content": "This patch switches from VTDAddressSpace to VTDAccelPASIDCacheEntry for\nhandling PASID bind/unbind operations and PIOTLB invalidations in\npassthrough scenarios. VTDAccelPASIDCacheEntry was introduced to cache\nPASID entries for passthrough devices and is now ready to propagate\nPASID bind/unbind operations and PIOTLB invalidations to the host.\n\nUnlike the previous approach, VTDAccelPASIDCacheEntry supports both\nIOMMU_NO_PASID (rid_pasid) and other valid PASIDs, so this switch drops\nIOMMU_NO_PASID limitations that existed in the prior PASID bind/unbind\nand PIOTLB invalidation path. For IOMMU_NO_PASID of passthrough devices,\nVTDAddressSpace continues to handle shadow page modifications to the\nhost, but no longer manages PASID bind/unbind operations or PIOTLB\ninvalidations for passthrough scenarios.\n\nCo-developed-by: Yi Liu <yi.l.liu@intel.com>\nSigned-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>\nTested-by: Xudong Hao <xudong.hao@intel.com>\n---\n hw/i386/intel_iommu_accel.h   |   2 +-\n include/hw/i386/intel_iommu.h |   2 -\n hw/i386/intel_iommu.c         |  17 +----\n hw/i386/intel_iommu_accel.c   | 131 +++++++++++++++++-----------------\n 4 files changed, 68 insertions(+), 84 deletions(-)",
    "diff": "diff --git a/hw/i386/intel_iommu_accel.h b/hw/i386/intel_iommu_accel.h\nindex a2226b28b6..4a9003c92d 100644\n--- a/hw/i386/intel_iommu_accel.h\n+++ b/hw/i386/intel_iommu_accel.h\n@@ -16,6 +16,7 @@ typedef struct VTDAccelPASIDCacheEntry {\n     VTDHostIOMMUDevice *vtd_hiod;\n     VTDPASIDEntry pasid_entry;\n     uint32_t pasid;\n+    uint32_t fs_hwpt_id;\n     QLIST_ENTRY(VTDAccelPASIDCacheEntry) next;\n } VTDAccelPASIDCacheEntry;\n \n@@ -23,7 +24,6 @@ typedef struct VTDAccelPASIDCacheEntry {\n bool vtd_check_hiod_accel(IntelIOMMUState *s, VTDHostIOMMUDevice *vtd_hiod,\n                           Error **errp);\n VTDHostIOMMUDevice *vtd_find_hiod_iommufd(VTDAddressSpace *as);\n-bool vtd_propagate_guest_pasid(VTDAddressSpace *vtd_as, Error **errp);\n void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, uint16_t domain_id,\n                                       uint32_t pasid, hwaddr addr,\n                                       uint64_t npages, bool ih);\ndiff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h\nindex 95c76015e4..1842ba5840 100644\n--- a/include/hw/i386/intel_iommu.h\n+++ b/include/hw/i386/intel_iommu.h\n@@ -154,8 +154,6 @@ struct VTDAddressSpace {\n      * with the guest IOMMU pgtables for a device.\n      */\n     IOVATree *iova_tree;\n-\n-    uint32_t fs_hwpt_id;\n };\n \n struct VTDIOTLBEntry {\ndiff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c\nindex 023f4a4f7a..abcb0df5d9 100644\n--- a/hw/i386/intel_iommu.c\n+++ b/hw/i386/intel_iommu.c\n@@ -86,8 +86,6 @@ static void vtd_pasid_cache_reset_locked(IntelIOMMUState *s)\n         VTDPASIDCacheEntry *pc_entry = &vtd_as->pasid_cache_entry;\n         if (pc_entry->valid) {\n             pc_entry->valid = false;\n-            /* It's fatal to get failure during reset */\n-            vtd_propagate_guest_pasid(vtd_as, &error_fatal);\n         }\n     }\n }\n@@ -3126,8 +3124,6 @@ static void vtd_pasid_cache_sync_locked(gpointer key, gpointer value,\n     VTDPASIDEntry pe;\n     IOMMUNotifier *n;\n     uint16_t did;\n-    const char *err_prefix = \"Attaching to HWPT failed: \";\n-    Error *local_err = NULL;\n \n     if (vtd_dev_get_pe_from_pasid(vtd_as, &pe)) {\n         if (!pc_entry->valid) {\n@@ -3148,9 +3144,6 @@ static void vtd_pasid_cache_sync_locked(gpointer key, gpointer value,\n             vtd_address_space_unmap(vtd_as, n);\n         }\n         vtd_switch_address_space(vtd_as);\n-\n-        err_prefix = \"Detaching from HWPT failed: \";\n-        goto do_bind_unbind;\n     }\n \n     /*\n@@ -3178,20 +3171,12 @@ static void vtd_pasid_cache_sync_locked(gpointer key, gpointer value,\n     if (!pc_entry->valid) {\n         pc_entry->pasid_entry = pe;\n         pc_entry->valid = true;\n-    } else if (vtd_pasid_entry_compare(&pe, &pc_entry->pasid_entry)) {\n-        err_prefix = \"Replacing HWPT attachment failed: \";\n-    } else {\n+    } else if (!vtd_pasid_entry_compare(&pe, &pc_entry->pasid_entry)) {\n         return;\n     }\n \n     vtd_switch_address_space(vtd_as);\n     vtd_address_space_sync(vtd_as);\n-\n-do_bind_unbind:\n-    /* TODO: Fault event injection into guest, report error to QEMU for now */\n-    if (!vtd_propagate_guest_pasid(vtd_as, &local_err)) {\n-        error_reportf_err(local_err, \"%s\", err_prefix);\n-    }\n }\n \n static void vtd_pasid_cache_sync(IntelIOMMUState *s, VTDPASIDCacheInfo *pc_info)\ndiff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c\nindex 4abe1d228d..6377db1fb9 100644\n--- a/hw/i386/intel_iommu_accel.c\n+++ b/hw/i386/intel_iommu_accel.c\n@@ -111,24 +111,25 @@ static bool vtd_create_fs_hwpt(VTDHostIOMMUDevice *vtd_hiod,\n                                       fs_hwpt_id, errp);\n }\n \n-static void vtd_destroy_old_fs_hwpt(VTDHostIOMMUDevice *vtd_hiod,\n-                                    VTDAddressSpace *vtd_as)\n+static void vtd_destroy_old_fs_hwpt(VTDAccelPASIDCacheEntry *vtd_pce)\n {\n-    HostIOMMUDeviceIOMMUFD *hiodi = HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod);\n+    HostIOMMUDeviceIOMMUFD *hiodi =\n+        HOST_IOMMU_DEVICE_IOMMUFD(vtd_pce->vtd_hiod->hiod);\n \n-    if (!vtd_as->fs_hwpt_id) {\n+    if (!vtd_pce->fs_hwpt_id) {\n         return;\n     }\n-    iommufd_backend_free_id(hiodi->iommufd, vtd_as->fs_hwpt_id);\n-    vtd_as->fs_hwpt_id = 0;\n+    iommufd_backend_free_id(hiodi->iommufd, vtd_pce->fs_hwpt_id);\n+    vtd_pce->fs_hwpt_id = 0;\n }\n \n-static bool vtd_device_attach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n-                                      VTDAddressSpace *vtd_as, Error **errp)\n+static bool vtd_device_attach_iommufd(VTDAccelPASIDCacheEntry *vtd_pce,\n+                                      Error **errp)\n {\n+    VTDHostIOMMUDevice *vtd_hiod = vtd_pce->vtd_hiod;\n     HostIOMMUDeviceIOMMUFD *hiodi = HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod);\n-    VTDPASIDEntry *pe = &vtd_as->pasid_cache_entry.pasid_entry;\n-    uint32_t hwpt_id = hiodi->hwpt_id;\n+    VTDPASIDEntry *pe = &vtd_pce->pasid_entry;\n+    uint32_t hwpt_id = hiodi->hwpt_id, pasid = vtd_pce->pasid;\n     bool ret;\n \n     /*\n@@ -148,14 +149,13 @@ static bool vtd_device_attach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n         }\n     }\n \n-    ret = host_iommu_device_iommufd_attach_hwpt(hiodi, IOMMU_NO_PASID, hwpt_id,\n-                                                errp);\n-    trace_vtd_device_attach_hwpt(hiodi->devid, IOMMU_NO_PASID, hwpt_id, ret);\n+    ret = host_iommu_device_iommufd_attach_hwpt(hiodi, pasid, hwpt_id, errp);\n+    trace_vtd_device_attach_hwpt(hiodi->devid, pasid, hwpt_id, ret);\n     if (ret) {\n         /* Destroy old fs_hwpt if it's a replacement */\n-        vtd_destroy_old_fs_hwpt(vtd_hiod, vtd_as);\n+        vtd_destroy_old_fs_hwpt(vtd_pce);\n         if (vtd_pe_pgtt_is_fst(pe)) {\n-            vtd_as->fs_hwpt_id = hwpt_id;\n+            vtd_pce->fs_hwpt_id = hwpt_id;\n         }\n     } else if (vtd_pe_pgtt_is_fst(pe)) {\n         iommufd_backend_free_id(hiodi->iommufd, hwpt_id);\n@@ -164,17 +164,19 @@ static bool vtd_device_attach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n     return ret;\n }\n \n-static bool vtd_device_detach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n-                                      VTDAddressSpace *vtd_as, Error **errp)\n+static bool vtd_device_detach_iommufd(VTDAccelPASIDCacheEntry *vtd_pce,\n+                                      Error **errp)\n {\n+    VTDHostIOMMUDevice *vtd_hiod = vtd_pce->vtd_hiod;\n     HostIOMMUDeviceIOMMUFD *hiodi = HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod);\n-    IntelIOMMUState *s = vtd_as->iommu_state;\n+\n+    IntelIOMMUState *s = vtd_hiod->iommu_state;\n+    uint32_t pasid = vtd_pce->pasid;\n     bool ret;\n \n-    if (s->dmar_enabled && s->root_scalable) {\n-        ret = host_iommu_device_iommufd_detach_hwpt(hiodi, IOMMU_NO_PASID,\n-                                                    errp);\n-        trace_vtd_device_detach_hwpt(hiodi->devid, IOMMU_NO_PASID, ret);\n+    if (pasid != IOMMU_NO_PASID || (s->dmar_enabled && s->root_scalable)) {\n+        ret = host_iommu_device_iommufd_detach_hwpt(hiodi, pasid, errp);\n+        trace_vtd_device_detach_hwpt(hiodi->devid, pasid, ret);\n     } else {\n         /*\n          * If DMAR remapping is disabled or guest switches to legacy mode,\n@@ -188,58 +190,32 @@ static bool vtd_device_detach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n     }\n \n     if (ret) {\n-        vtd_destroy_old_fs_hwpt(vtd_hiod, vtd_as);\n+        vtd_destroy_old_fs_hwpt(vtd_pce);\n     }\n \n     return ret;\n }\n \n-bool vtd_propagate_guest_pasid(VTDAddressSpace *vtd_as, Error **errp)\n-{\n-    VTDPASIDCacheEntry *pc_entry = &vtd_as->pasid_cache_entry;\n-    VTDHostIOMMUDevice *vtd_hiod = vtd_find_hiod_iommufd(vtd_as);\n-\n-    /* Ignore emulated device or legacy VFIO backed device */\n-    if (!vtd_as->iommu_state->fsts || !vtd_hiod) {\n-        return true;\n-    }\n-\n-    if (pc_entry->valid) {\n-        return vtd_device_attach_iommufd(vtd_hiod, vtd_as, errp);\n-    }\n-\n-    return vtd_device_detach_iommufd(vtd_hiod, vtd_as, errp);\n-}\n-\n /*\n- * This function is a loop function for the s->vtd_address_spaces\n- * list with VTDPIOTLBInvInfo as execution filter. It propagates\n- * the piotlb invalidation to host.\n+ * This function is a loop function for the s->vtd_host_iommu_dev\n+ * and vtd_hiod->pasid_cache_list lists with VTDPIOTLBInvInfo as\n+ * execution filter. It propagates the piotlb invalidation to host.\n  */\n-static void vtd_flush_host_piotlb_locked(gpointer key, gpointer value,\n-                                         gpointer user_data)\n+static void vtd_flush_host_piotlb_locked(VTDAccelPASIDCacheEntry *vtd_pce,\n+                                         VTDPIOTLBInvInfo *piotlb_info)\n {\n-    VTDPIOTLBInvInfo *piotlb_info = user_data;\n-    VTDAddressSpace *vtd_as = value;\n-    VTDHostIOMMUDevice *vtd_hiod = vtd_find_hiod_iommufd(vtd_as);\n-    VTDPASIDCacheEntry *pc_entry = &vtd_as->pasid_cache_entry;\n+    VTDHostIOMMUDevice *vtd_hiod = vtd_pce->vtd_hiod;\n+    VTDPASIDEntry *pe = &vtd_pce->pasid_entry;\n     uint16_t did;\n \n-    if (!vtd_hiod) {\n-        return;\n-    }\n-\n-    assert(vtd_as->pasid == PCI_NO_PASID);\n-\n     /* Nothing to do if there is no first stage HWPT attached */\n-    if (!pc_entry->valid ||\n-        !vtd_pe_pgtt_is_fst(&pc_entry->pasid_entry)) {\n+    if (!vtd_pe_pgtt_is_fst(pe)) {\n         return;\n     }\n \n-    did = VTD_SM_PASID_ENTRY_DID(&pc_entry->pasid_entry);\n+    did = VTD_SM_PASID_ENTRY_DID(pe);\n \n-    if (piotlb_info->domain_id == did && piotlb_info->pasid == IOMMU_NO_PASID) {\n+    if (piotlb_info->domain_id == did && piotlb_info->pasid == vtd_pce->pasid) {\n         HostIOMMUDeviceIOMMUFD *hiodi =\n             HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod);\n         uint32_t entry_num = 1; /* Only implement one request for simplicity */\n@@ -247,7 +223,7 @@ static void vtd_flush_host_piotlb_locked(gpointer key, gpointer value,\n         struct iommu_hwpt_vtd_s1_invalidate *cache = piotlb_info->inv_data;\n \n         if (!iommufd_backend_invalidate_cache(hiodi->iommufd,\n-                                              vtd_as->fs_hwpt_id,\n+                                              vtd_pce->fs_hwpt_id,\n                                               IOMMU_HWPT_INVALIDATE_DATA_VTD_S1,\n                                               sizeof(*cache), &entry_num, cache,\n                                               &local_err)) {\n@@ -263,6 +239,8 @@ void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, uint16_t domain_id,\n {\n     struct iommu_hwpt_vtd_s1_invalidate cache_info = { 0 };\n     VTDPIOTLBInvInfo piotlb_info;\n+    VTDHostIOMMUDevice *vtd_hiod;\n+    GHashTableIter hiod_it;\n \n     cache_info.addr = addr;\n     cache_info.npages = npages;\n@@ -273,23 +251,36 @@ void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, uint16_t domain_id,\n     piotlb_info.inv_data = &cache_info;\n \n     /*\n-     * Go through each vtd_as instance in s->vtd_address_spaces, find out\n-     * affected host devices which need host piotlb invalidation. Piotlb\n-     * invalidation should check pasid cache per architecture point of view.\n+     * Go through each vtd_pce in vtd_hiod->pasid_cache_list for each host\n+     * device, find out affected host device pasid which need host piotlb\n+     * invalidation. Piotlb invalidation should check pasid cache per\n+     * architecture point of view.\n      */\n-    g_hash_table_foreach(s->vtd_address_spaces,\n-                         vtd_flush_host_piotlb_locked, &piotlb_info);\n+    g_hash_table_iter_init(&hiod_it, s->vtd_host_iommu_dev);\n+    while (g_hash_table_iter_next(&hiod_it, NULL, (void **)&vtd_hiod)) {\n+        VTDAccelPASIDCacheEntry *vtd_pce;\n+\n+        QLIST_FOREACH(vtd_pce, &vtd_hiod->pasid_cache_list, next) {\n+            vtd_flush_host_piotlb_locked(vtd_pce, &piotlb_info);\n+        }\n+    }\n }\n \n static void vtd_accel_fill_pc(VTDHostIOMMUDevice *vtd_hiod, uint32_t pasid,\n                               VTDPASIDEntry *pe)\n {\n     VTDAccelPASIDCacheEntry *vtd_pce;\n+    Error *local_err = NULL;\n \n     QLIST_FOREACH(vtd_pce, &vtd_hiod->pasid_cache_list, next) {\n         if (vtd_pce->pasid == pasid) {\n             if (vtd_pasid_entry_compare(pe, &vtd_pce->pasid_entry)) {\n                 vtd_pce->pasid_entry = *pe;\n+\n+                if (!vtd_device_attach_iommufd(vtd_pce, &local_err)) {\n+                    error_reportf_err(local_err, \"%s\",\n+                                      \"Replacing HWPT attachment failed: \");\n+                }\n             }\n             return;\n         }\n@@ -300,11 +291,21 @@ static void vtd_accel_fill_pc(VTDHostIOMMUDevice *vtd_hiod, uint32_t pasid,\n     vtd_pce->pasid = pasid;\n     vtd_pce->pasid_entry = *pe;\n     QLIST_INSERT_HEAD(&vtd_hiod->pasid_cache_list, vtd_pce, next);\n+\n+    if (!vtd_device_attach_iommufd(vtd_pce, &local_err)) {\n+        error_reportf_err(local_err, \"%s\", \"Attaching to HWPT failed: \");\n+    }\n }\n \n static void vtd_accel_delete_pc(VTDAccelPASIDCacheEntry *vtd_pce,\n                                 VTDPASIDCacheInfo *pc_info)\n {\n+    Error *local_err = NULL;\n+\n+    if (!vtd_device_detach_iommufd(vtd_pce, &local_err)) {\n+        error_reportf_err(local_err, \"%s\", \"Detaching from HWPT failed: \");\n+    }\n+\n     QLIST_REMOVE(vtd_pce, next);\n     g_free(vtd_pce);\n \n",
    "prefixes": [
        "v3",
        "12/14"
    ]
}