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GET /api/1.0/patches/2198341/?format=api
{ "id": 2198341, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2198341/?format=api", "project": { "id": 69, "url": "http://patchwork.ozlabs.org/api/1.0/projects/69/?format=api", "name": "QEMU powerpc development", "link_name": "qemu-ppc", "list_id": "qemu-ppc.nongnu.org", "list_email": "qemu-ppc@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260219191955.83815-23-philmd@linaro.org>", "date": "2026-02-19T19:19:24", "name": "[v2,22/50] target/or1k: Use XML register definitions from GDB", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d5fca8ed074e3a1882aaa007d423bd2b17479a38", "submitter": { "id": 85046, "url": "http://patchwork.ozlabs.org/api/1.0/people/85046/?format=api", "name": "Philippe Mathieu-Daudé", "email": "philmd@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-ppc/patch/20260219191955.83815-23-philmd@linaro.org/mbox/", "series": [ { "id": 492714, "url": "http://patchwork.ozlabs.org/api/1.0/series/492714/?format=api", "date": "2026-02-19T19:19:04", "name": "gdbstub: Build once on various targets (single-binary)", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/492714/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2198341/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=yWDN2Bic;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::344;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x344.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-ppc@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-ppc.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-ppc>,\n <mailto:qemu-ppc-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-ppc>", "List-Post": "<mailto:qemu-ppc@nongnu.org>", "List-Help": "<mailto:qemu-ppc-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-ppc>,\n <mailto:qemu-ppc-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Import gdb-xml/or1k-fpu.xml from mainstream binutils, tag\n'binutils-2_46' [*]. Register as CPUClass::gdb_core_xml_file.\n\n[*] https://sourceware.org/git/?p=binutils-gdb.git;a=blob_plain;f=gdb/features/or1k-core.xml;h=0d13f355f5296ae426794eb3003dcc18fbbd49d5;hb=refs/tags/binutils-2_46\n\nSigned-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\n---\n configs/targets/or1k-linux-user.mak | 1 +\n configs/targets/or1k-softmmu.mak | 1 +\n target/or1k/cpu.c | 2 +-\n gdb-xml/or1k-core.xml | 65 +++++++++++++++++++++++++++++\n 4 files changed, 68 insertions(+), 1 deletion(-)\n create mode 100644 gdb-xml/or1k-core.xml", "diff": "diff --git a/configs/targets/or1k-linux-user.mak b/configs/targets/or1k-linux-user.mak\nindex 0ee3a05884d..9f8c178ef10 100644\n--- a/configs/targets/or1k-linux-user.mak\n+++ b/configs/targets/or1k-linux-user.mak\n@@ -2,5 +2,6 @@ TARGET_ARCH=or1k\n TARGET_BIG_ENDIAN=y\n TARGET_SYSTBL_ABI=common,32,or1k,time32,stat64,rlimit,renameat\n TARGET_SYSTBL=syscall.tbl\n+TARGET_XML_FILES= gdb-xml/or1k-core.xml\n TARGET_LONG_BITS=32\n TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y\ndiff --git a/configs/targets/or1k-softmmu.mak b/configs/targets/or1k-softmmu.mak\nindex 204283d604f..24d89bc3e65 100644\n--- a/configs/targets/or1k-softmmu.mak\n+++ b/configs/targets/or1k-softmmu.mak\n@@ -2,6 +2,7 @@ TARGET_ARCH=or1k\n TARGET_BIG_ENDIAN=y\n # needed by boot.c and all boards\n TARGET_NEED_FDT=y\n+TARGET_XML_FILES= gdb-xml/or1k-core.xml\n TARGET_LONG_BITS=32\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y\ndiff --git a/target/or1k/cpu.c b/target/or1k/cpu.c\nindex c64542a59a2..3d1c22bf75d 100644\n--- a/target/or1k/cpu.c\n+++ b/target/or1k/cpu.c\n@@ -288,13 +288,13 @@ static void openrisc_cpu_class_init(ObjectClass *oc, const void *data)\n cc->dump_state = openrisc_cpu_dump_state;\n cc->set_pc = openrisc_cpu_set_pc;\n cc->get_pc = openrisc_cpu_get_pc;\n+ cc->gdb_core_xml_file = \"or1k-core.xml\";\n cc->gdb_read_register = openrisc_cpu_gdb_read_register;\n cc->gdb_write_register = openrisc_cpu_gdb_write_register;\n #ifndef CONFIG_USER_ONLY\n dc->vmsd = &vmstate_openrisc_cpu;\n cc->sysemu_ops = &openrisc_sysemu_ops;\n #endif\n- cc->gdb_num_core_regs = 32 + 3;\n cc->disas_set_info = openrisc_disas_set_info;\n cc->tcg_ops = &openrisc_tcg_ops;\n }\ndiff --git a/gdb-xml/or1k-core.xml b/gdb-xml/or1k-core.xml\nnew file mode 100644\nindex 00000000000..0d13f355f52\n--- /dev/null\n+++ b/gdb-xml/or1k-core.xml\n@@ -0,0 +1,65 @@\n+<?xml version=\"1.0\"?>\n+<!-- Copyright (C) 2017-2026 Free Software Foundation, Inc.\n+\n+ Copying and distribution of this file, with or without modification,\n+ are permitted in any medium without royalty provided the copyright\n+ notice and this notice are preserved. -->\n+\n+<!DOCTYPE feature SYSTEM \"gdb-target.dtd\">\n+<feature name=\"org.gnu.gdb.or1k.group0\">\n+ <reg name=\"r0\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r1\" bitsize=\"32\" type=\"data_ptr\"/>\n+ <reg name=\"r2\" bitsize=\"32\" type=\"data_ptr\"/>\n+ <reg name=\"r3\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r4\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r5\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r6\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r7\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r8\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r9\" bitsize=\"32\" type=\"code_ptr\"/>\n+ <reg name=\"r10\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r11\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r12\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r13\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r14\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r15\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r16\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r17\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r18\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r19\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r20\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r21\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r22\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r23\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r24\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r25\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r26\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r27\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r28\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r29\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r30\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"r31\" bitsize=\"32\" type=\"int\"/>\n+ <reg name=\"ppc\" bitsize=\"32\" type=\"code_ptr\"/>\n+ <reg name=\"npc\" bitsize=\"32\" type=\"code_ptr\"/>\n+ <flags id=\"sr_flags\" size=\"4\">\n+ <field name=\"SM\" start=\"0\" end=\"0\"/>\n+ <field name=\"TEE\" start=\"1\" end=\"1\"/>\n+ <field name=\"IEE\" start=\"2\" end=\"2\"/>\n+ <field name=\"DCE\" start=\"3\" end=\"3\"/>\n+ <field name=\"ICE\" start=\"4\" end=\"4\"/>\n+ <field name=\"DME\" start=\"5\" end=\"5\"/>\n+ <field name=\"IME\" start=\"6\" end=\"6\"/>\n+ <field name=\"LEE\" start=\"7\" end=\"7\"/>\n+ <field name=\"CE\" start=\"8\" end=\"8\"/>\n+ <field name=\"F\" start=\"9\" end=\"9\"/>\n+ <field name=\"CY\" start=\"10\" end=\"10\"/>\n+ <field name=\"OV\" start=\"11\" end=\"11\"/>\n+ <field name=\"OVE\" start=\"12\" end=\"12\"/>\n+ <field name=\"DSX\" start=\"13\" end=\"13\"/>\n+ <field name=\"EPH\" start=\"14\" end=\"14\"/>\n+ <field name=\"FO\" start=\"15\" end=\"15\"/>\n+ <field name=\"SUMRA\" start=\"16\" end=\"16\"/>\n+ <field name=\"CID\" start=\"28\" end=\"31\"/>\n+ </flags>\n+ <reg name=\"sr\" bitsize=\"32\" type=\"sr_flags\"/>\n+</feature>\n", "prefixes": [ "v2", "22/50" ] }