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GET /api/1.0/patches/2198336/?format=api
{ "id": 2198336, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2198336/?format=api", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.0/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260219191955.83815-27-philmd@linaro.org>", "date": "2026-02-19T19:19:28", "name": "[v2,26/50] target/mips: Replace ldtul_p() -> ldn_p()", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "63ad8c3611de0d47cb169f152d71a2009def8389", "submitter": { "id": 85046, "url": "http://patchwork.ozlabs.org/api/1.0/people/85046/?format=api", "name": "Philippe Mathieu-Daudé", "email": "philmd@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260219191955.83815-27-philmd@linaro.org/mbox/", "series": [ { "id": 492715, "url": "http://patchwork.ozlabs.org/api/1.0/series/492715/?format=api", "date": "2026-02-19T19:19:03", "name": "gdbstub: Build once on various targets (single-binary)", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/492715/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2198336/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=MZu3eg1a;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::32f;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Prefer ldn_p(target_long_bits/8) over target-specific ldtul_p().\n\nUse deposit64() in gdb_write_register(), allowing to remove\n'target_ulong' type uses.\n\nSigned-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\n---\n target/mips/gdbstub.c | 14 ++++++++------\n 1 file changed, 8 insertions(+), 6 deletions(-)", "diff": "diff --git a/target/mips/gdbstub.c b/target/mips/gdbstub.c\nindex 169d47416a6..8e0b08a096c 100644\n--- a/target/mips/gdbstub.c\n+++ b/target/mips/gdbstub.c\n@@ -18,6 +18,7 @@\n * License along with this library; if not, see <http://www.gnu.org/licenses/>.\n */\n #include \"qemu/osdep.h\"\n+#include \"qemu/bitops.h\"\n #include \"cpu.h\"\n #include \"internal.h\"\n #include \"gdbstub/helpers.h\"\n@@ -77,14 +78,15 @@ int mips_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)\n \n int mips_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)\n {\n+ const unsigned regsz = target_long_bits() / 8;\n CPUMIPSState *env = cpu_env(cs);\n- target_ulong tmp;\n+ uint64_t tmp;\n \n- tmp = ldtul_p(mem_buf);\n+ tmp = ldn_p(mem_buf, regsz);\n \n if (n < 32) {\n env->active_tc.gpr[n] = tmp;\n- return sizeof(target_ulong);\n+ return regsz;\n }\n if (env->CP0_Config1 & (1 << CP0C1_FP) && n >= 38 && n < 72) {\n switch (n) {\n@@ -104,7 +106,7 @@ int mips_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)\n }\n break;\n }\n- return sizeof(target_ulong);\n+ return regsz;\n }\n switch (n) {\n case 32:\n@@ -127,7 +129,7 @@ int mips_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)\n #endif\n break;\n case 37:\n- env->active_tc.PC = tmp & ~(target_ulong)1;\n+ env->active_tc.PC = deposit64(tmp, 63, 1, 0);\n if (tmp & 1) {\n env->hflags |= MIPS_HFLAG_M16;\n } else {\n@@ -144,5 +146,5 @@ int mips_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)\n break;\n }\n \n- return sizeof(target_ulong);\n+ return regsz;\n }\n", "prefixes": [ "v2", "26/50" ] }