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GET /api/1.0/patches/2198262/?format=api
{ "id": 2198262, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2198262/?format=api", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.0/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260219171810.602667-7-alex.bennee@linaro.org>", "date": "2026-02-19T17:18:02", "name": "[RFC,v2,06/14] hw/m68k: update an5206 to 3-phase reset", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d35a484e190c58e35bf9b6d616c32b8e0560fab6", "submitter": { "id": 39532, "url": "http://patchwork.ozlabs.org/api/1.0/people/39532/?format=api", "name": "Alex Bennée", "email": "alex.bennee@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260219171810.602667-7-alex.bennee@linaro.org/mbox/", "series": [ { "id": 492705, "url": "http://patchwork.ozlabs.org/api/1.0/series/492705/?format=api", "date": "2026-02-19T17:17:57", "name": "cpu_reset clean-ups for arm, alpha, mips, m68k and tricore", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/492705/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2198262/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=gamCJvcR;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::530;\n envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x530.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "As the mbar/rambar0 values are currently fixed we can migrate the\nsetting of them to the reset handler as well.\n\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\n\n---\nv2\n - re-written, dropped tags\n - favour cpu_reset over resettable_reset(cs)\n---\n hw/m68k/an5206.c | 23 ++++++++++++++++-------\n 1 file changed, 16 insertions(+), 7 deletions(-)", "diff": "diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c\nindex f92a5d6a339..509980db566 100644\n--- a/hw/m68k/an5206.c\n+++ b/hw/m68k/an5206.c\n@@ -15,11 +15,25 @@\n #include \"elf.h\"\n #include \"qemu/error-report.h\"\n #include \"system/qtest.h\"\n+#include \"system/reset.h\"\n \n #define KERNEL_LOAD_ADDR 0x10000\n #define AN5206_MBAR_ADDR 0x10000000\n #define AN5206_RAMBAR_ADDR 0x20000000\n \n+static void an5206_reset(MachineState *ms, ResetType type)\n+{\n+ CPUState *cs = first_cpu;\n+ M68kCPU *cpu = M68K_CPU(cs);\n+\n+ qemu_devices_reset(type);\n+ cpu_reset(cs);\n+\n+ cpu->env.vbr = 0;\n+ cpu->env.mbar = AN5206_MBAR_ADDR | 1;\n+ cpu->env.rambar0 = AN5206_RAMBAR_ADDR | 1;\n+}\n+\n static void mcf5206_init(M68kCPU *cpu, MemoryRegion *sysmem, uint32_t base)\n {\n DeviceState *dev;\n@@ -49,12 +63,6 @@ static void an5206_init(MachineState *machine)\n cpu = M68K_CPU(cpu_create(machine->cpu_type));\n env = &cpu->env;\n \n- /* Initialize CPU registers. */\n- env->vbr = 0;\n- /* TODO: allow changing MBAR and RAMBAR. */\n- env->mbar = AN5206_MBAR_ADDR | 1;\n- env->rambar0 = AN5206_RAMBAR_ADDR | 1;\n-\n /* DRAM at address zero */\n memory_region_add_subregion(address_space_mem, 0, machine->ram);\n \n@@ -90,13 +98,14 @@ static void an5206_init(MachineState *machine)\n exit(1);\n }\n \n- env->pc = entry;\n+ env->direct_kernel_boot_pc = entry;\n }\n \n static void an5206_machine_init(MachineClass *mc)\n {\n mc->desc = \"Arnewsh 5206\";\n mc->init = an5206_init;\n+ mc->reset = an5206_reset;\n mc->default_cpu_type = M68K_CPU_TYPE_NAME(\"m5206\");\n mc->default_ram_id = \"an5206.ram\";\n }\n", "prefixes": [ "RFC", "v2", "06/14" ] }