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GET /api/1.0/patches/2198209/?format=api
{ "id": 2198209, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2198209/?format=api", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.0/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260219143332.3316679-14-ruslichenko.r@gmail.com>", "date": "2026-02-19T14:33:12", "name": "[v2,13/33] hw/core/fdt_generic_util: add TYPE_FDT_GENERIC_INTC", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "106f750d381fbb8ee45fe9aa6d11b19d2b7bd88f", "submitter": { "id": 92275, "url": "http://patchwork.ozlabs.org/api/1.0/people/92275/?format=api", "name": "Ruslan Ruslichenko", "email": "ruslichenko.r@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260219143332.3316679-14-ruslichenko.r@gmail.com/mbox/", "series": [ { "id": 492690, "url": "http://patchwork.ozlabs.org/api/1.0/series/492690/?format=api", "date": "2026-02-19T14:33:04", "name": "hw/arm: Introduce generic FDT-driven machine", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/492690/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2198209/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=ftSXkbO+;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fGx1j6pQ5z1xpY\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 20 Feb 2026 01:42:49 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1vt57L-0000Dv-Ni; Thu, 19 Feb 2026 09:34:59 -0500", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <ruslichenko.r@gmail.com>)\n id 1vt57K-0000DN-IX\n for qemu-devel@nongnu.org; Thu, 19 Feb 2026 09:34:58 -0500", "from mail-wm1-x330.google.com ([2a00:1450:4864:20::330])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <ruslichenko.r@gmail.com>)\n id 1vt57I-00030n-TB\n for qemu-devel@nongnu.org; Thu, 19 Feb 2026 09:34:58 -0500", "by mail-wm1-x330.google.com with SMTP id\n 5b1f17b1804b1-483770e0b25so10841385e9.0\n for <qemu-devel@nongnu.org>; Thu, 19 Feb 2026 06:34:56 -0800 (PST)", "from thinkpad-t470s.. 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Iglesias\" <edgar.iglesias@gmail.com>,\n Ruslan_Ruslichenko@epam.com, balaton@eik.bme.hu", "Subject": "[PATCH v2 13/33] hw/core/fdt_generic_util: add TYPE_FDT_GENERIC_INTC", "Date": "Thu, 19 Feb 2026 15:33:12 +0100", "Message-ID": "<20260219143332.3316679-14-ruslichenko.r@gmail.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260219143332.3316679-1-ruslichenko.r@gmail.com>", "References": "<20260219143332.3316679-1-ruslichenko.r@gmail.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::330;\n envelope-from=ruslichenko.r@gmail.com; helo=mail-wm1-x330.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>\n\nAdd TYPE_FDT_GENERIC_INTC class and interface to allow\ninterrupt controllers to register callback which can\nbe used to get IRQ's from this controller.\n\nOptionally, interrupt controllers may also provide\nauto_parent() callabck which can be used to attach\nit to corresponding CPU's or other interrupt parent.\n\nSigned-off-by: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>\n---\n hw/core/fdt_generic_util.c | 7 ++++\n include/hw/core/fdt_generic_util.h | 59 ++++++++++++++++++++++++++++++\n 2 files changed, 66 insertions(+)", "diff": "diff --git a/hw/core/fdt_generic_util.c b/hw/core/fdt_generic_util.c\nindex a9ae56d1c3..d1465eafc1 100644\n--- a/hw/core/fdt_generic_util.c\n+++ b/hw/core/fdt_generic_util.c\n@@ -711,6 +711,12 @@ static int fdt_init_qdev(char *node_path, FDTMachineInfo *fdti, char *compat)\n return 0;\n }\n \n+static const TypeInfo fdt_generic_intc_info = {\n+ .name = TYPE_FDT_GENERIC_INTC,\n+ .parent = TYPE_INTERFACE,\n+ .class_size = sizeof(FDTGenericIntcClass),\n+};\n+\n static const TypeInfo fdt_generic_mmap_info = {\n .name = TYPE_FDT_GENERIC_MMAP,\n .parent = TYPE_INTERFACE,\n@@ -719,6 +725,7 @@ static const TypeInfo fdt_generic_mmap_info = {\n \n static void fdt_generic_register_types(void)\n {\n+ type_register_static(&fdt_generic_intc_info);\n type_register_static(&fdt_generic_mmap_info);\n }\n type_init(fdt_generic_register_types)\ndiff --git a/include/hw/core/fdt_generic_util.h b/include/hw/core/fdt_generic_util.h\nindex 38086ec1e4..c5aaa58dd6 100644\n--- a/include/hw/core/fdt_generic_util.h\n+++ b/include/hw/core/fdt_generic_util.h\n@@ -16,6 +16,65 @@\n \n FDTMachineInfo *fdt_generic_create_machine(void *fdt, qemu_irq *cpu_irq);\n \n+#define TYPE_FDT_GENERIC_INTC \"fdt-generic-intc\"\n+\n+#define FDT_GENERIC_INTC_CLASS(klass) \\\n+ OBJECT_CLASS_CHECK(FDTGenericIntcClass, (klass), TYPE_FDT_GENERIC_INTC)\n+#define FDT_GENERIC_INTC_GET_CLASS(obj) \\\n+ OBJECT_GET_CLASS(FDTGenericIntcClass, (obj), TYPE_FDT_GENERIC_INTC)\n+#define FDT_GENERIC_INTC(obj) \\\n+ INTERFACE_CHECK(FDTGenericIntc, (obj), TYPE_FDT_GENERIC_INTC)\n+\n+typedef struct FDTGenericIntc {\n+ /*< private >*/\n+ Object parent_obj;\n+} FDTGenericIntc;\n+\n+typedef struct FDTGenericIntcClass {\n+ /*< private >*/\n+ InterfaceClass parent_class;\n+\n+ /*< public >*/\n+ /**\n+ * get irq - Based on the FDT generic interrupt binding for this device\n+ * grab the irq(s) for the given interrupt cells description. In some device\n+ * tree bindings (E.G. ARM GIC with its PPI) a single interrupt cell-tuple\n+ * can describe more than one connection. So populates an array with all\n+ * relevant IRQs.\n+ *\n+ * @obj - interrupt controller to get irqs input for (\"interrupt-parent\")\n+ * @irqs - array to populate with irqs (must be >= @max length\n+ * @cells - interrupt cells values. Must be >= ncells length\n+ * @ncells - number of cells in @cells\n+ * @max - maximum number of irqs to return\n+ * @errp - Error condition\n+ *\n+ * @returns the number of interrupts populated in irqs. Undefined on error\n+ * (use errp for error checking). If it is valid for the interrupt\n+ * controller binding to specify no (or a disabled) connections it may\n+ * return 0 as a non-error.\n+ */\n+\n+ int (*get_irq)(FDTGenericIntc *obj, qemu_irq *irqs, uint32_t *cells,\n+ int ncells, int max, Error **errp);\n+\n+ /**\n+ * auto_parent. An interrupt controller often infers its own interrupt\n+ * parent (usually a CPU or CPU cluster. This function allows an interrupt\n+ * controller to implement its own auto-connections. Is called if an\n+ * interrupt controller itself (detected via \"interrupt-controller\") has no\n+ * \"interrupt-parent\" node.\n+ *\n+ * @obj - Interrupt controller top attempt autoconnection\n+ * @errp - Error condition\n+ *\n+ * FIXME: More arguments need to be added for partial descriptions\n+ */\n+\n+ void (*auto_parent)(FDTGenericIntc *obj, Error **errp);\n+\n+} FDTGenericIntcClass;\n+\n #define TYPE_FDT_GENERIC_MMAP \"fdt-generic-mmap\"\n \n #define FDT_GENERIC_MMAP_CLASS(klass) \\\n", "prefixes": [ "v2", "13/33" ] }