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GET /api/1.0/patches/2198194/?format=api
{ "id": 2198194, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2198194/?format=api", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.0/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260219143332.3316679-15-ruslichenko.r@gmail.com>", "date": "2026-02-19T14:33:13", "name": "[v2,14/33] hw/core/fdt_generic_util: implement fdt_get_irq/_info API", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d94d7c17671ea06a073d1ca3a418280aadfff5bf", "submitter": { "id": 92275, "url": "http://patchwork.ozlabs.org/api/1.0/people/92275/?format=api", "name": "Ruslan Ruslichenko", "email": "ruslichenko.r@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260219143332.3316679-15-ruslichenko.r@gmail.com/mbox/", "series": [ { "id": 492690, "url": "http://patchwork.ozlabs.org/api/1.0/series/492690/?format=api", "date": "2026-02-19T14:33:04", "name": "hw/arm: Introduce generic FDT-driven machine", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/492690/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2198194/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=Cj9JFUwZ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fGwsN71h9z1xxd\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 20 Feb 2026 01:35:36 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1vt57N-0000Ez-74; Thu, 19 Feb 2026 09:35:01 -0500", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <ruslichenko.r@gmail.com>)\n id 1vt57M-0000Eb-Hf\n for qemu-devel@nongnu.org; Thu, 19 Feb 2026 09:35:00 -0500", "from mail-wr1-x432.google.com ([2a00:1450:4864:20::432])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <ruslichenko.r@gmail.com>)\n id 1vt57K-00031M-He\n for qemu-devel@nongnu.org; Thu, 19 Feb 2026 09:35:00 -0500", "by mail-wr1-x432.google.com with SMTP id\n ffacd0b85a97d-4376de3f128so694051f8f.0\n for <qemu-devel@nongnu.org>; Thu, 19 Feb 2026 06:34:58 -0800 (PST)", "from thinkpad-t470s.. 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Iglesias\" <edgar.iglesias@gmail.com>,\n Ruslan_Ruslichenko@epam.com, balaton@eik.bme.hu", "Subject": "[PATCH v2 14/33] hw/core/fdt_generic_util: implement\n fdt_get_irq/_info API", "Date": "Thu, 19 Feb 2026 15:33:13 +0100", "Message-ID": "<20260219143332.3316679-15-ruslichenko.r@gmail.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260219143332.3316679-1-ruslichenko.r@gmail.com>", "References": "<20260219143332.3316679-1-ruslichenko.r@gmail.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::432;\n envelope-from=ruslichenko.r@gmail.com; helo=mail-wr1-x432.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>\n\nBoth interfaces may be used by devices to get IRQ information\nbased device tree entry.\nBoth methods will identify interrupt parent for a device and\nretrieve irq entry.\n\nSigned-off-by: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>\n---\n hw/core/fdt_generic_util.c | 267 +++++++++++++++++++++++++++++\n include/hw/core/fdt_generic_util.h | 18 ++\n 2 files changed, 285 insertions(+)", "diff": "diff --git a/hw/core/fdt_generic_util.c b/hw/core/fdt_generic_util.c\nindex d1465eafc1..dcacc5033b 100644\n--- a/hw/core/fdt_generic_util.c\n+++ b/hw/core/fdt_generic_util.c\n@@ -70,6 +70,11 @@ static int fdt_generic_num_cpus;\n \n static int simple_bus_fdt_init(char *bus_node_path, FDTMachineInfo *fdti);\n \n+static void fdt_get_irq_info_from_intc(FDTMachineInfo *fdti, qemu_irq *ret,\n+ char *intc_node_path,\n+ uint32_t *cells, uint32_t num_cells,\n+ uint32_t max, Error **errp);\n+\n FDTMachineInfo *fdt_generic_create_machine(void *fdt, qemu_irq *cpu_irq)\n {\n char node_path[DT_PATH_LENGTH];\n@@ -241,6 +246,268 @@ static int simple_bus_fdt_init(char *node_path, FDTMachineInfo *fdti)\n return 0;\n }\n \n+static void fdt_get_irq_info_from_intc(FDTMachineInfo *fdti, qemu_irq *ret,\n+ char *intc_node_path,\n+ uint32_t *cells, uint32_t num_cells,\n+ uint32_t max, Error **errp)\n+{\n+ FDTGenericIntcClass *intc_fdt_class;\n+ DeviceState *intc;\n+\n+ while (!fdt_init_has_opaque(fdti, intc_node_path) &&\n+ qemu_in_coroutine()) {\n+ fdt_init_yield(fdti);\n+ }\n+ intc = DEVICE(fdt_init_get_opaque(fdti, intc_node_path));\n+\n+ if (!intc) {\n+ goto fail;\n+ }\n+\n+ while (!intc->realized && qemu_in_coroutine()) {\n+ fdt_init_yield(fdti);\n+ }\n+\n+ if (!intc->realized) {\n+ goto fail;\n+ }\n+\n+ intc_fdt_class = FDT_GENERIC_INTC_GET_CLASS(intc);\n+ if (!intc_fdt_class) {\n+ goto fail;\n+ }\n+\n+ intc_fdt_class->get_irq(FDT_GENERIC_INTC(intc), ret, cells, num_cells,\n+ max, errp);\n+\n+ return;\n+fail:\n+ error_setg(errp, \"%s\", __func__);\n+}\n+\n+static uint32_t imap_cache[32 * 1024];\n+static bool imap_cached;\n+\n+qemu_irq *fdt_get_irq_info(FDTMachineInfo *fdti, char *node_path, int irq_idx,\n+ char *info, bool *map_mode) {\n+ void *fdt = fdti->fdt;\n+ uint32_t intc_phandle, intc_cells, cells[32];\n+ char intc_node_path[DT_PATH_LENGTH];\n+ qemu_irq *ret = NULL;\n+ int i;\n+ Error *errp = NULL;\n+\n+ intc_phandle = qemu_fdt_getprop_cell_inherited(fdt, node_path,\n+ \"interrupt-parent\",\n+ 0, &errp);\n+ if (errp) {\n+ errp = NULL;\n+ intc_cells = qemu_fdt_getprop_cell_inherited(fdt, node_path,\n+ \"#interrupt-cells\", 0, &errp);\n+ *map_mode = true;\n+ } else {\n+ if (qemu_devtree_get_node_by_phandle(fdt, intc_node_path,\n+ intc_phandle)) {\n+ goto fail;\n+ }\n+\n+ /* Check if the device is using interrupt-maps */\n+ qemu_fdt_getprop_cell(fdt, node_path, \"interrupt-map-mask\", 0,\n+ &errp);\n+ if (!errp) {\n+ errp = NULL;\n+ intc_cells = qemu_fdt_getprop_cell_inherited(fdt, node_path,\n+ \"#interrupt-cells\", 0,\n+ &errp);\n+ *map_mode = true;\n+ } else {\n+ errp = NULL;\n+ intc_cells = qemu_fdt_getprop_cell_inherited(fdt, intc_node_path,\n+ \"#interrupt-cells\", 0,\n+ &errp);\n+ *map_mode = false;\n+ }\n+ }\n+\n+ if (errp) {\n+ goto fail;\n+ }\n+\n+ DB_PRINT_NP(2, \"%s intc_phandle: %d\\n\", node_path, intc_phandle);\n+\n+ for (i = 0; i < intc_cells; ++i) {\n+ cells[i] = qemu_fdt_getprop_cell(fdt, node_path, \"interrupts\",\n+ intc_cells * irq_idx + i, &errp);\n+ if (errp) {\n+ goto fail;\n+ }\n+ }\n+\n+ if (*map_mode) {\n+ int k;\n+ ret = g_new0(qemu_irq, 1);\n+ int num_matches = 0;\n+ int len;\n+ g_autofree uint32_t *imap_mask = g_new(uint32_t, intc_cells);\n+ const uint32_t *prop;\n+ uint32_t *imap;\n+ bool use_parent = false;\n+\n+ for (k = 0; k < intc_cells; ++k) {\n+ imap_mask[k] = qemu_fdt_getprop_cell_inherited(fdt, node_path,\n+ \"interrupt-map-mask\", k + 2,\n+ &errp);\n+ if (errp) {\n+ goto fail;\n+ }\n+ }\n+\n+ /* Check if the device has an interrupt-map property */\n+ prop = qemu_fdt_getprop(fdt, node_path, \"interrupt-map\", &len,\n+ &errp);\n+ imap = g_memdup2(prop, len);\n+ if (!imap || errp) {\n+ /*\n+ * If the device doesn't have an interrupt-map, try again with\n+ * inheritance. This will return the parents interrupt-map\n+ */\n+ use_parent = true;\n+ errp = NULL;\n+\n+ prop = qemu_fdt_getprop_inherited(fdt, node_path, \"interrupt-map\",\n+ &len, &errp);\n+ if (!imap_cached) {\n+ memcpy(imap_cache, prop, len);\n+ imap_cached = true;\n+ }\n+ imap = imap_cache;\n+\n+ if (errp) {\n+ goto fail;\n+ }\n+ }\n+\n+ len /= sizeof(uint32_t);\n+\n+ i = 0;\n+ assert(imap);\n+ while (i < len) {\n+ if (!use_parent) {\n+ /*\n+ * Only re-sync the interrupt-map when the device has it's\n+ * own map, to save time.\n+ */\n+ prop = qemu_fdt_getprop(fdt, node_path, \"interrupt-map\", &len,\n+ &errp);\n+ if (imap != imap_cache) {\n+ g_free(imap);\n+ }\n+ imap = g_memdup2(prop, len);\n+ if (errp) {\n+ goto fail;\n+ }\n+\n+ len /= sizeof(uint32_t);\n+ }\n+\n+ bool match = true;\n+ uint32_t new_intc_cells, new_cells[32];\n+ i++; i++; /* FIXME: do address cells properly */\n+ for (k = 0; k < intc_cells; ++k) {\n+ uint32_t map_val = be32_to_cpu(imap[i++]);\n+ if ((cells[k] ^ map_val) & imap_mask[k]) {\n+ match = false;\n+ }\n+ }\n+ /*\n+ * when caching, we hackishly store the number of cells for\n+ * the parent in the MSB. +1, so zero MSB means non cachd\n+ * and the full lookup is needed.\n+ */\n+ intc_phandle = be32_to_cpu(imap[i++]);\n+ if (intc_phandle & (0xffu << 24)) {\n+ new_intc_cells = (intc_phandle >> 24) - 1;\n+ } else {\n+ if (qemu_devtree_get_node_by_phandle(fdt, intc_node_path,\n+ intc_phandle)) {\n+ goto fail;\n+ }\n+ new_intc_cells = qemu_fdt_getprop_cell(fdt, intc_node_path,\n+ \"#interrupt-cells\", 0,\n+ &errp);\n+ imap[i - 1] = cpu_to_be32(intc_phandle |\n+ (new_intc_cells + 1) << 24);\n+ if (errp) {\n+ goto fail;\n+ }\n+ }\n+ for (k = 0; k < new_intc_cells; ++k) {\n+ new_cells[k] = be32_to_cpu(imap[i++]);\n+ }\n+ if (match) {\n+ num_matches++;\n+ ret = g_renew(qemu_irq, ret, num_matches + 1);\n+ if (intc_phandle & (0xffu << 24)) {\n+ if (qemu_devtree_get_node_by_phandle(fdt, intc_node_path,\n+ intc_phandle &\n+ ((1 << 24) - 1))) {\n+ goto fail;\n+ }\n+ }\n+\n+ DB_PRINT_NP(2, \"Getting IRQ information: %s -> 0x%x (%s)\\n\",\n+ node_path, intc_phandle, intc_node_path);\n+\n+ memset(&ret[num_matches], 0, sizeof(*ret));\n+ fdt_get_irq_info_from_intc(fdti, &ret[num_matches - 1],\n+ intc_node_path, new_cells,\n+ new_intc_cells, 1, NULL);\n+ if (info) {\n+ sprintf(info, \"%s\", intc_node_path);\n+ info += strlen(info) + 1;\n+ }\n+ }\n+ }\n+\n+ if (imap != imap_cache) {\n+ g_free(imap);\n+ }\n+ return ret;\n+ }\n+\n+ DB_PRINT_NP(2, \"Getting IRQ information: %s -> %s\\n\",\n+ node_path, intc_node_path);\n+\n+ ret = g_new0(qemu_irq, fdt_generic_num_cpus + 2);\n+ fdt_get_irq_info_from_intc(fdti, ret, intc_node_path, cells, intc_cells,\n+ fdt_generic_num_cpus, &errp);\n+\n+ if (errp) {\n+ goto fail;\n+ }\n+\n+ /* FIXME: Phase out this info bussiness */\n+ if (info) {\n+ sprintf(info, \"%s\", intc_node_path);\n+ }\n+\n+ return ret;\n+\n+fail:\n+ if (errp) {\n+ sprintf(info, \"%s\", error_get_pretty(errp));\n+ } else {\n+ sprintf(info, \"(none)\");\n+ }\n+ return NULL;\n+}\n+\n+qemu_irq *fdt_get_irq(FDTMachineInfo *fdti, char *node_path, int irq_idx,\n+ bool *map_mode)\n+{\n+ return fdt_get_irq_info(fdti, node_path, irq_idx, NULL, map_mode);\n+}\n+\n /* FIXME: figure out a real solution to this */\n \n #define DIGIT(a) ((a) >= '0' && (a) <= '9')\ndiff --git a/include/hw/core/fdt_generic_util.h b/include/hw/core/fdt_generic_util.h\nindex c5aaa58dd6..dfc9fa3632 100644\n--- a/include/hw/core/fdt_generic_util.h\n+++ b/include/hw/core/fdt_generic_util.h\n@@ -16,6 +16,24 @@\n \n FDTMachineInfo *fdt_generic_create_machine(void *fdt, qemu_irq *cpu_irq);\n \n+/*\n+ * get an irq for a device. The interrupt parent of a device is idenitified\n+ * and the specified irq (by the interrupts device-tree property) is retrieved\n+ */\n+\n+qemu_irq *fdt_get_irq(FDTMachineInfo *fdti, char *node_path, int irq_idx,\n+ bool *map_mode);\n+\n+/*\n+ * same as above, but poulates err with non-zero if something goes wrong, and\n+ * populates info with a human readable string giving some basic information\n+ * about the interrupt connection found (or not found). Both arguments are\n+ * optional (i.e. can be NULL)\n+ */\n+\n+qemu_irq *fdt_get_irq_info(FDTMachineInfo *fdti, char *node_path, int irq_idx,\n+ char *info, bool *map_mode);\n+\n #define TYPE_FDT_GENERIC_INTC \"fdt-generic-intc\"\n \n #define FDT_GENERIC_INTC_CLASS(klass) \\\n", "prefixes": [ "v2", "14/33" ] }