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GET /api/1.0/patches/2197368/?format=api
{ "id": 2197368, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2197368/?format=api", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.0/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260217182257.1582-3-alifm@linux.ibm.com>", "date": "2026-02-17T18:22:50", "name": "[v9,2/9] s390/pci: Add architecture specific resource/bus address translation", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "c34448b9413c56d36b74eec73cbde9efab9644f0", "submitter": { "id": 73785, "url": "http://patchwork.ozlabs.org/api/1.0/people/73785/?format=api", "name": "Farhan Ali", "email": "alifm@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260217182257.1582-3-alifm@linux.ibm.com/mbox/", "series": [ { "id": 492470, "url": "http://patchwork.ozlabs.org/api/1.0/series/492470/?format=api", "date": "2026-02-17T18:22:49", "name": "Error recovery for vfio-pci devices on s390x", "version": 9, "mbox": "http://patchwork.ozlabs.org/series/492470/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2197368/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-47494-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=bU6tfL68;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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c=relaxed/relaxed; d=ibm.com; h=cc\n\t:content-transfer-encoding:date:from:in-reply-to:message-id\n\t:mime-version:references:subject:to; s=pp1; bh=yESl+cPjSQP58Z1G4\n\tGMJ+9WIdrKLxEfC+dls7mn7rvw=; b=bU6tfL68fS1syWZsYEz6dXNCcs9qB2J6V\n\tLbSXQeQ/GbFuSgFZbOp3TfZedqsU3qxNYe9rD9OXOH80IMQXoYzTKubea54clWiD\n\t3ZKzeQzSRSc1nyTZCUx9IakzTfkHeKsWC91Odwht9XV30uo/kCb1ssdT9ZE+5+Z7\n\tkrY/8rPBYspJ6pMh9qIQ4dUqjd0ynFgYZXrIuAKqaxorQpUn+sAsIbEKhx82KbMv\n\tZhSSbSGKXzg/Uiy4Q+IKxMOaaWqvFYlBER3PJ9omiZUPSXLaZ7GtoQ3tqvKw4Om7\n\tkiQkz15S/YeJMDMIKPDz1mxFfRMxEULpwIVfIgTI4H1eqEAYPye9w==", "From": "Farhan Ali <alifm@linux.ibm.com>", "To": "linux-s390@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-pci@vger.kernel.org", "Cc": "helgaas@kernel.org, lukas@wunner.de, alex@shazbot.org, clg@redhat.com,\n stable@vger.kernel.org, alifm@linux.ibm.com, schnelle@linux.ibm.com,\n mjrosato@linux.ibm.com", "Subject": "[PATCH v9 2/9] s390/pci: Add architecture specific resource/bus\n address translation", "Date": "Tue, 17 Feb 2026 10:22:50 -0800", "Message-ID": "<20260217182257.1582-3-alifm@linux.ibm.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260217182257.1582-1-alifm@linux.ibm.com>", "References": "<20260217182257.1582-1-alifm@linux.ibm.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-TM-AS-GCONF": "00", "X-Proofpoint-ORIG-GUID": "7393WSHYSQTT1ru-I0RaXuBGYNsD8cK8", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMjE3MDE0OCBTYWx0ZWRfX7crJStpTIw1j\n wSMCy1vYUCZpTrquT4v3neN0PdNSrNJetyNZ4ldJ9AEUeBD2lFZolDYp6X8F6RUD9ualHLtWBdj\n 2uFWwNEOUoz75Q958m3IhLNWx01N+kLrtPZL2ZsUK/jCj3pOmqiNBoJdmYglOSkv36dHrsS8WCF\n soGQdbkUOXArRkokH3DHg+V2gUt6v9+/7tehyIWEkcIwXN87qMSTOIXnWAiRo+5P2EcUGSugcbl\n cM4kQ4tFG40++1F/n+rcxpXR0aZ0oilLJH3hx1VZrKi0qBGgLZyLvtA/fSf5prN8iNwf0MSMN/R\n R1IVYD3cU5ZYkteYOsm0Dg8cSUDSpripCv4j5GmJjIyGQXqqy6098+aQM1wSf9P6oywRMM1u5Ee\n X18Fjswzzu+0gtz+xWch/Dhv5qfrcmOZV+C1iHF5voxmQZ5lPDo4Xu7LzhF4If4297DH4A1DIx4\n Vn4MWVGpSF8ZPF1BbXA==", "X-Proofpoint-GUID": "7393WSHYSQTT1ru-I0RaXuBGYNsD8cK8", "X-Authority-Analysis": "v=2.4 cv=U+mfzOru c=1 sm=1 tr=0 ts=6994b206 cx=c_pps\n a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17\n a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22\n a=GgsMoib0sEa3-_RKJdDe:22 a=VnNF1IyMAAAA:8 a=WI2LcE4NPZyv2LzpnzYA:9", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-02-17_03,2026-02-16_04,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n clxscore=1015 bulkscore=0 impostorscore=0 malwarescore=0 spamscore=0\n adultscore=0 phishscore=0 lowpriorityscore=0 priorityscore=1501\n suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc=\n route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000\n definitions=main-2602170148" }, "content": "On s390 today we overwrite the PCI BAR resource address to either an\nartificial cookie address or MIO address. However this address is different\nfrom the bus address of the BARs programmed by firmware. The artificial\ncookie address was created to index into an array of function handles\n(zpci_iomap_start). The MIO (mapped I/O) addresses are provided by firmware\nbut maybe different from the bus addresses. This creates an issue when\ntrying to convert the BAR resource address to bus address using the generic\npcibios_resource_to_bus().\n\nImplement an architecture specific pcibios_resource_to_bus() function to\ncorrectly translate PCI BAR resource addresses to bus addresses for s390.\nSimilarly add architecture specific pcibios_bus_to_resource function to do\nthe reverse translation.\n\nReviewed-by: Niklas Schnelle <schnelle@linux.ibm.com>\nSigned-off-by: Farhan Ali <alifm@linux.ibm.com>\n---\n arch/s390/pci/pci.c | 74 +++++++++++++++++++++++++++++++++++++++\n drivers/pci/host-bridge.c | 8 ++---\n 2 files changed, 78 insertions(+), 4 deletions(-)", "diff": "diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c\nindex 97bab20bc163..b2e6b53ea8e6 100644\n--- a/arch/s390/pci/pci.c\n+++ b/arch/s390/pci/pci.c\n@@ -272,6 +272,80 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,\n \treturn 0;\n }\n \n+void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region,\n+\t\t\t struct resource *res)\n+{\n+\tstruct zpci_bus *zbus = bus->sysdata;\n+\tstruct zpci_bar_struct *zbar;\n+\tstruct zpci_dev *zdev;\n+\n+\tregion->start = res->start;\n+\tregion->end = res->end;\n+\n+\tfor (int i = 0; i < ZPCI_FUNCTIONS_PER_BUS; i++) {\n+\t\tint j = 0;\n+\n+\t\tzbar = NULL;\n+\t\tzdev = zbus->function[i];\n+\t\tif (!zdev)\n+\t\t\tcontinue;\n+\n+\t\tfor (j = 0; j < PCI_STD_NUM_BARS; j++) {\n+\t\t\tif (zdev->bars[j].res->start == res->start &&\n+\t\t\t zdev->bars[j].res->end == res->end &&\n+\t\t\t res->flags & IORESOURCE_MEM) {\n+\t\t\t\tzbar = &zdev->bars[j];\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (zbar) {\n+\t\t\t/* only MMIO is supported */\n+\t\t\tregion->start = zbar->val & PCI_BASE_ADDRESS_MEM_MASK;\n+\t\t\tif (zbar->val & PCI_BASE_ADDRESS_MEM_TYPE_64)\n+\t\t\t\tregion->start |= (u64)zdev->bars[j + 1].val << 32;\n+\n+\t\t\tregion->end = region->start + (1UL << zbar->size) - 1;\n+\t\t\treturn;\n+\t\t}\n+\t}\n+}\n+\n+void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,\n+\t\t\t struct pci_bus_region *region)\n+{\n+\tstruct zpci_bus *zbus = bus->sysdata;\n+\tstruct zpci_dev *zdev;\n+\tresource_size_t start, end;\n+\n+\tres->start = region->start;\n+\tres->end = region->end;\n+\n+\tfor (int i = 0; i < ZPCI_FUNCTIONS_PER_BUS; i++) {\n+\t\tzdev = zbus->function[i];\n+\t\tif (!zdev || !zdev->has_resources)\n+\t\t\tcontinue;\n+\n+\t\tfor (int j = 0; j < PCI_STD_NUM_BARS; j++) {\n+\t\t\tif (!zdev->bars[j].size)\n+\t\t\t\tcontinue;\n+\n+\t\t\t/* only MMIO is supported */\n+\t\t\tstart = zdev->bars[j].val & PCI_BASE_ADDRESS_MEM_MASK;\n+\t\t\tif (zdev->bars[j].val & PCI_BASE_ADDRESS_MEM_TYPE_64)\n+\t\t\t\tstart |= (u64)zdev->bars[j + 1].val << 32;\n+\n+\t\t\tend = start + (1UL << zdev->bars[j].size) - 1;\n+\n+\t\t\tif (start == region->start && end == region->end) {\n+\t\t\t\tres->start = zdev->bars[j].res->start;\n+\t\t\t\tres->end = zdev->bars[j].res->end;\n+\t\t\t\treturn;\n+\t\t\t}\n+\t\t}\n+\t}\n+}\n+\n void __iomem *ioremap_prot(phys_addr_t phys_addr, size_t size,\n \t\t\t pgprot_t prot)\n {\ndiff --git a/drivers/pci/host-bridge.c b/drivers/pci/host-bridge.c\nindex be5ef6516cff..aed031b8a9f3 100644\n--- a/drivers/pci/host-bridge.c\n+++ b/drivers/pci/host-bridge.c\n@@ -49,8 +49,8 @@ void pci_set_host_bridge_release(struct pci_host_bridge *bridge,\n }\n EXPORT_SYMBOL_GPL(pci_set_host_bridge_release);\n \n-void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region,\n-\t\t\t struct resource *res)\n+void __weak pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region,\n+\t\t\t\t struct resource *res)\n {\n \tstruct pci_host_bridge *bridge = pci_find_host_bridge(bus);\n \tstruct resource_entry *window;\n@@ -74,8 +74,8 @@ static bool region_contains(struct pci_bus_region *region1,\n \treturn region1->start <= region2->start && region1->end >= region2->end;\n }\n \n-void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,\n-\t\t\t struct pci_bus_region *region)\n+void __weak pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,\n+\t\t\t\t struct pci_bus_region *region)\n {\n \tstruct pci_host_bridge *bridge = pci_find_host_bridge(bus);\n \tstruct resource_entry *window;\n", "prefixes": [ "v9", "2/9" ] }