Patch Detail

HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2197265,
    "url": "http://patchwork.ozlabs.org/api/1.0/patches/2197265/?format=api",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/1.0/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null
    },
    "msgid": "<20260217160836.2709885-4-kbusch@meta.com>",
    "date": "2026-02-17T16:08:36",
    "name": "[PATCHv5,3/3] PCI: make reset_subordinate hotplug safe",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "16168ec324a9268168f62822d1b9815e72f3948a",
    "submitter": {
        "id": 84963,
        "url": "http://patchwork.ozlabs.org/api/1.0/people/84963/?format=api",
        "name": "Keith Busch",
        "email": "kbusch@meta.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260217160836.2709885-4-kbusch@meta.com/mbox/",
    "series": [
        {
            "id": 492447,
            "url": "http://patchwork.ozlabs.org/api/1.0/series/492447/?format=api",
            "date": "2026-02-17T16:08:34",
            "name": "pci slot reset handling fixes",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/492447/mbox/"
        }
    ],
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2197265/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "\n <linux-pci+bounces-47467-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-pci@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=meta.com header.i=@meta.com header.a=rsa-sha256\n header.s=s2048-2025-q2 header.b=S34Y+R4i;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-47467-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
            "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=meta.com header.i=@meta.com\n header.b=\"S34Y+R4i\"",
            "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=67.231.153.30",
            "smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=meta.com",
            "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=meta.com"
        ],
        "Received": [
            "from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fFl2501y9z1xwD\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 18 Feb 2026 03:09:01 +1100 (AEDT)",
            "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id DF4973015707\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 17 Feb 2026 16:08:57 +0000 (UTC)",
            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 6F11C36D518;\n\tTue, 17 Feb 2026 16:08:57 +0000 (UTC)",
            "from mx0a-00082601.pphosted.com (mx0b-00082601.pphosted.com\n [67.231.153.30])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id CD6A336D516\n\tfor <linux-pci@vger.kernel.org>; Tue, 17 Feb 2026 16:08:55 +0000 (UTC)",
            "from pps.filterd (m0089730.ppops.net [127.0.0.1])\n\tby m0089730.ppops.net (8.18.1.11/8.18.1.11) with ESMTP id 61HEr0D0546040\n\tfor <linux-pci@vger.kernel.org>; Tue, 17 Feb 2026 08:08:54 -0800",
            "from maileast.thefacebook.com ([163.114.135.16])\n\tby m0089730.ppops.net (PPS) with ESMTPS id 4cctg217jb-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT)\n\tfor <linux-pci@vger.kernel.org>; Tue, 17 Feb 2026 08:08:54 -0800 (PST)",
            "from twshared18212.03.snb2.facebook.com (2620:10d:c0a8:fe::f072) by\n mail.thefacebook.com (2620:10d:c0a9:6f::237c) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id\n 15.2.2562.35; Tue, 17 Feb 2026 16:08:41 +0000",
            "by devbig197.nha3.facebook.com (Postfix, from userid 544533)\n\tid 5E6C0811FAFA; Tue, 17 Feb 2026 08:08:39 -0800 (PST)"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1771344537; cv=none;\n b=uz0rSfRHqZEtHpCLwvEYjPH6Z3X3du/w5ScQAGixREolTSz4f3PPbpc2juzqs2ysMyUNwuS3ynpMvmWu6MfuB+VEKm5JtK7HWPs+XngES0j8Llgp8Nx8rWd1y1gtGcchZZcp9dlj7hIgu5zs6c3XQpyh+adqkfS0Ld4sAOaQOcc=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1771344537; c=relaxed/simple;\n\tbh=XQJxbqinXbso4V3N9Foq5QpawTUbqAtI8tokFNuwwx0=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=okrF7fhrI5pnRiHUd5lDjQY/akVxKmGSISQb9FEkI5iQo39re6xr0v4Xm0C78gc47BA0LHENVfKz65WBlY0kGecwV69prGUnNKJbyhCJdbS8cpeJlC4MV2yd7Fk06JkrOVYQmbKgqNL3i0maWNa77vRCM7Ba3Xhi9Hzyus5F3ao=",
        "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=meta.com;\n spf=pass smtp.mailfrom=meta.com;\n dkim=pass (2048-bit key) header.d=meta.com header.i=@meta.com\n header.b=S34Y+R4i; arc=none smtp.client-ip=67.231.153.30",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=meta.com; h=cc\n\t:content-transfer-encoding:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to; s=s2048-2025-q2;\n\t bh=UdHZLAxhWYSq6Kv1ne8jpsRY6lRHDS4S229KNeT83e4=; b=S34Y+R4iwvMi\n\tB35HSgGUDz5NQHbo9+2OqAtzO8kgcQNPs23ywIZgvkvS1Pr84ClIltaQrGQ+Uh1h\n\t9zObkwQG8bFsj4mdqTC9/TrjbwLWEWrrKSOjluePEBCYScvGlbBjThRZyGXKa1Gc\n\t0M9gevx71q/icNqX9pZK5lrUGoc+B0G3XAKQ8Dv6qk6H1Mo+ErxokOAgxQllVCxg\n\taFugD1Ft6Hs40kS7UmmKlWnHkcEFqmmNgbLkfu2rbFKapvsDw4FPMYEwuePyX4P5\n\tv0f5hUjkEngf7CuGMH7xTQNppa1XqcF1qbQJHIfcR/G6ELh9KNUrNwCPIyEal/Q7\n\tH6ey8uRovg==",
        "From": "Keith Busch <kbusch@meta.com>",
        "To": "<linux-pci@vger.kernel.org>, <helgaas@kernel.org>,\n        <dan.j.williams@intel.com>",
        "CC": "<alex@shazbot.org>, <ilpo.jarvinen@linux.intel.com>,\n        Keith Busch\n\t<kbusch@kernel.org>",
        "Subject": "[PATCHv5 3/3] PCI: make reset_subordinate hotplug safe",
        "Date": "Tue, 17 Feb 2026 08:08:36 -0800",
        "Message-ID": "<20260217160836.2709885-4-kbusch@meta.com>",
        "X-Mailer": "git-send-email 2.47.3",
        "In-Reply-To": "<20260217160836.2709885-1-kbusch@meta.com>",
        "References": "<20260217160836.2709885-1-kbusch@meta.com>",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-pci@vger.kernel.org",
        "List-Id": "<linux-pci.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "quoted-printable",
        "X-FB-Internal": "Safe",
        "Content-Type": "text/plain",
        "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMjE3MDEzMSBTYWx0ZWRfX7CKOzdjIgytk\n 7RnMLQu1ngyAFYhl8H4/Az+OE4PjLrGUQqjrVwOm4smTMmPRNPEOjhtoLGMbHAIlkjHkyiedwHm\n z1pFD+Lf0kD7R+/IR2wmgdIwpFne9lBc4dLTBWCZYrh1DXLquVhzFShaCeuV6BeKMskPGFwPE15\n Hcl+G5oXbXMvEHafoxZuQMKW8UBLzteIgQa65Ue1mGo6hAYxD9Ey9UjYtFHTrLzJrFfzvPt9G2+\n ugQll0e+fxhPNxIP+O16WcNDYgmBtJ2Tv9NOsw6mIbECaYVgZvqNsECYsWqARfv9nDGUUg7tSXu\n o+bheQD4123P/5lxXFvcLXmh5y5tna8C5l95+drNEGPBwt9f2xw6N2a/8KBDDPCI2iqTsX7iOPe\n wf+V1TUNveBWkrEdF8gxB7WK9TV1aeqm5R7uE1g80E1Q5YcfM+flcq85joXBirODT662EVlfrBm\n +omGYye0kv7M0fbJoJw==",
        "X-Authority-Analysis": "v=2.4 cv=RbWdyltv c=1 sm=1 tr=0 ts=69949296 cx=c_pps\n a=MfjaFnPeirRr97d5FC5oHw==:117 a=MfjaFnPeirRr97d5FC5oHw==:17\n a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22\n a=GgsMoib0sEa3-_RKJdDe:22 a=VwQbUJbxAAAA:8 a=QyXUC8HyAAAA:8\n a=eI16JKCc1AcFLPAmXCIA:9",
        "X-Proofpoint-ORIG-GUID": "nlyvUXnMu9QAUQ39TImz0rRzwabiRcyl",
        "X-Proofpoint-GUID": "nlyvUXnMu9QAUQ39TImz0rRzwabiRcyl",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-02-17_02,2026-02-16_04,2025-10-01_01"
    },
    "content": "From: Keith Busch <kbusch@kernel.org>\n\nUse the slot reset method when resetting the bridge if the bus contains\nhot plug slots. This fixes spurious hot plug events that are triggered\nby the secondary bus reset that bypasses the slot's detection disabling.\n\nResetting a bridge's subordinate bus can be done like this:\n\n  # echo 1 > /sys/bus/pci/devices/0000:50:01.0/reset_subordinate\n\nPrior to this patch, an example kernel message may show something like:\n\n  pcieport 0000:50:01.0: pciehp: Slot(40): Link Down\n\nWith this change, the pciehp driver ignores the link event during the\nreset, so may show this message instead:\n\n  pcieport 0000:50:01.0: pciehp: Slot(40): Link Down/Up ignored\n\nReviewed-by: Dan Williams <dan.j.williams@intel.com>\nSigned-off-by: Keith Busch <kbusch@kernel.org>\n---\n drivers/pci/pci-sysfs.c |  3 +-\n drivers/pci/pci.c       | 91 +++++++++++++++++++++++++++--------------\n drivers/pci/pci.h       |  2 +-\n 3 files changed, 62 insertions(+), 34 deletions(-)",
    "diff": "diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c\nindex b44e884fd5372..6187b0f3e2833 100644\n--- a/drivers/pci/pci-sysfs.c\n+++ b/drivers/pci/pci-sysfs.c\n@@ -553,7 +553,6 @@ static ssize_t reset_subordinate_store(struct device *dev,\n \t\t\t\tconst char *buf, size_t count)\n {\n \tstruct pci_dev *pdev = to_pci_dev(dev);\n-\tstruct pci_bus *bus = pdev->subordinate;\n \tunsigned long val;\n \n \tif (!capable(CAP_SYS_ADMIN))\n@@ -563,7 +562,7 @@ static ssize_t reset_subordinate_store(struct device *dev,\n \t\treturn -EINVAL;\n \n \tif (val) {\n-\t\tint ret = pci_try_reset_bus(bus);\n+\t\tint ret = pci_try_reset_bridge(pdev);\n \n \t\tif (ret)\n \t\t\treturn ret;\ndiff --git a/drivers/pci/pci.c b/drivers/pci/pci.c\nindex 3bd0a830872c4..747f35bad60a6 100644\n--- a/drivers/pci/pci.c\n+++ b/drivers/pci/pci.c\n@@ -5597,14 +5597,44 @@ static int pci_bus_reset(struct pci_bus *bus, bool probe)\n }\n \n /**\n- * pci_bus_error_reset - reset the bridge's subordinate bus\n- * @bridge: The parent device that connects to the bus to reset\n+ * pci_try_reset_bus - Try to reset a PCI bus\n+ * @bus: top level PCI bus to reset\n+ *\n+ * Same as above except return -EAGAIN if the bus cannot be locked\n+ */\n+static int pci_try_reset_bus(struct pci_bus *bus)\n+{\n+\tint rc;\n+\n+\trc = pci_bus_reset(bus, PCI_RESET_PROBE);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tif (pci_bus_trylock(bus)) {\n+\t\tpci_bus_save_and_disable_locked(bus);\n+\t\tmight_sleep();\n+\t\trc = pci_bridge_secondary_bus_reset(bus->self);\n+\t\tpci_bus_restore_locked(bus);\n+\t\tpci_bus_unlock(bus);\n+\t} else\n+\t\trc = -EAGAIN;\n+\n+\treturn rc;\n+}\n+\n+#define PCI_RESET_RESTORE true\n+#define PCI_RESET_NO_RESTORE false\n+/**\n+ * pci_reset_bridge - reset a bridge's subordinate bus\n+ * @bridge: bridge that connects to the bus to reset\n+ * @restore: when true use a reset method that invokes pci_dev_restore() post\n+ *           reset for affected devices\n  *\n  * This function will first try to reset the slots on this bus if the method is\n  * available. If slot reset fails or is not available, this will fall back to a\n  * secondary bus reset.\n  */\n-int pci_bus_error_reset(struct pci_dev *bridge)\n+static int pci_reset_bridge(struct pci_dev *bridge, bool restore)\n {\n \tstruct pci_bus *bus = bridge->subordinate;\n \tstruct pci_slot *slot;\n@@ -5620,17 +5650,42 @@ int pci_bus_error_reset(struct pci_dev *bridge)\n \t\tif (pci_probe_reset_slot(slot))\n \t\t\tgoto bus_reset;\n \n-\tlist_for_each_entry(slot, &bus->slots, list)\n-\t\tif (pci_slot_reset(slot, PCI_RESET_DO_RESET))\n+\tlist_for_each_entry(slot, &bus->slots, list) {\n+\t\tint ret;\n+\n+\t\tif (restore)\n+\t\t\tret = pci_try_reset_slot(slot);\n+\t\telse\n+\t\t\tret = pci_slot_reset(slot, PCI_RESET_DO_RESET);\n+\n+\t\tif (ret)\n \t\t\tgoto bus_reset;\n+\t}\n \n \tmutex_unlock(&pci_slot_mutex);\n \treturn 0;\n bus_reset:\n \tmutex_unlock(&pci_slot_mutex);\n+\n+\tif (restore)\n+\t\treturn pci_try_reset_bus(bus);\n \treturn pci_bus_reset(bridge->subordinate, PCI_RESET_DO_RESET);\n }\n \n+/**\n+ * pci_bus_error_reset - reset the bridge's subordinate bus\n+ * @bridge: The parent device that connects to the bus to reset\n+ */\n+int pci_bus_error_reset(struct pci_dev *bridge)\n+{\n+\treturn pci_reset_bridge(bridge, PCI_RESET_NO_RESTORE);\n+}\n+\n+int pci_try_reset_bridge(struct pci_dev *bridge)\n+{\n+\treturn pci_reset_bridge(bridge, PCI_RESET_RESTORE);\n+}\n+\n /**\n  * pci_probe_reset_bus - probe whether a PCI bus can be reset\n  * @bus: PCI bus to probe\n@@ -5643,32 +5698,6 @@ int pci_probe_reset_bus(struct pci_bus *bus)\n }\n EXPORT_SYMBOL_GPL(pci_probe_reset_bus);\n \n-/**\n- * pci_try_reset_bus - Try to reset a PCI bus\n- * @bus: top level PCI bus to reset\n- *\n- * Same as above except return -EAGAIN if the bus cannot be locked\n- */\n-int pci_try_reset_bus(struct pci_bus *bus)\n-{\n-\tint rc;\n-\n-\trc = pci_bus_reset(bus, PCI_RESET_PROBE);\n-\tif (rc)\n-\t\treturn rc;\n-\n-\tif (pci_bus_trylock(bus)) {\n-\t\tpci_bus_save_and_disable_locked(bus);\n-\t\tmight_sleep();\n-\t\trc = pci_bridge_secondary_bus_reset(bus->self);\n-\t\tpci_bus_restore_locked(bus);\n-\t\tpci_bus_unlock(bus);\n-\t} else\n-\t\trc = -EAGAIN;\n-\n-\treturn rc;\n-}\n-\n /**\n  * pci_reset_bus - Try to reset a PCI bus\n  * @pdev: top level PCI device to reset via slot/bus\ndiff --git a/drivers/pci/pci.h b/drivers/pci/pci.h\nindex d1350d54b932d..9e363ad22e161 100644\n--- a/drivers/pci/pci.h\n+++ b/drivers/pci/pci.h\n@@ -231,7 +231,7 @@ bool pci_reset_supported(struct pci_dev *dev);\n void pci_init_reset_methods(struct pci_dev *dev);\n int pci_bridge_secondary_bus_reset(struct pci_dev *dev);\n int pci_bus_error_reset(struct pci_dev *dev);\n-int pci_try_reset_bus(struct pci_bus *bus);\n+int pci_try_reset_bridge(struct pci_dev *bridge);\n \n struct pci_cap_saved_data {\n \tu16\t\tcap_nr;\n",
    "prefixes": [
        "PATCHv5",
        "3/3"
    ]
}