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GET /api/1.0/patches/2197190/?format=api
{ "id": 2197190, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2197190/?format=api", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.0/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260217-d3cold-v2-1-89b322864043@oss.qualcomm.com>", "date": "2026-02-17T11:19:06", "name": "[v2,1/5] PCI: host-common: Add helper to determine host bridge D3cold eligibility", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f4b676b45e9564508e8aa2ccf408b14b7ceec327", "submitter": { "id": 89908, "url": "http://patchwork.ozlabs.org/api/1.0/people/89908/?format=api", "name": "Krishna Chaitanya Chundru", "email": "krishna.chundru@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260217-d3cold-v2-1-89b322864043@oss.qualcomm.com/mbox/", "series": [ { "id": 492410, "url": "http://patchwork.ozlabs.org/api/1.0/series/492410/?format=api", "date": "2026-02-17T11:19:05", "name": "PCI: qcom: Add D3cold support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/492410/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2197190/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-47448-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=k3PSiT1O;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=JBSYRqzZ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260217-d3cold-v2-1-89b322864043@oss.qualcomm.com>", "References": "<20260217-d3cold-v2-0-89b322864043@oss.qualcomm.com>", "In-Reply-To": "<20260217-d3cold-v2-0-89b322864043@oss.qualcomm.com>", "To": "Jingoo Han <jingoohan1@gmail.com>,\n Manivannan Sadhasivam <mani@kernel.org>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kwilczynski@kernel.org>, Rob Herring <robh@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>, Will Deacon <will@kernel.org>", "Cc": "linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n jonathanh@nvidia.com, bjorn.andersson@oss.qualcomm.com,\n Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>", "X-Mailer": "b4 0.14.2", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1771327148; l=3861;\n i=krishna.chundru@oss.qualcomm.com; s=20230907; h=from:subject:message-id;\n bh=5VNrPa5yioPWFjGZOM4dXOcXPUPcjXAmODnXjn9DUOc=;\n b=eGsMoCR3RnwpV+cX/R2irzRnKPCBzeZrOnIZldX5d22y4OrPn6w5R6++P63dUeOwPgvwRrmBv\n y0NjhBhmG0cBIsIOV98eCu70NW/22EPqp6zbz0CTKFQknsolsw+70aE", "X-Developer-Key": "i=krishna.chundru@oss.qualcomm.com; a=ed25519;\n pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg=", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMjE3MDA5NCBTYWx0ZWRfX5jKfZ5jegey5\n DwQRsy3ui3n4aT5j3uLnoAZFNaxWQhe+Lyp4Fe5aQP4AQnVFZGmq/r6wAY8jdssJHleZjaM8TfA\n v3NtOH2pd/q18dqHkyxoQ7LmiydYAPa3pypLaO/zINeBgua1vI0xm+LoYSebXUXGzYFKSxvUTbm\n mX5vw3xjiZt2CrwwK/yU729nw/wRa2GK20TxIN62trKK67gBUXwFPwtUa3xV01OKIfjSLpYhqTP\n Khi5aUqjb13SwYZkLWNYa0BkF5HSRLlElnSi5q7s52YfBDkMbzFLnhhj+dO9YZi16P6XR7sG8IV\n e/xHnfrbkpAMO4F5R+LGqDkIMQpmGpA17evFVEUiErP+aY4KBISVH7DLlryWVo5RKYsrsvAJ5Aj\n 7b1xVI+bEhHFXZjao4ri+AkO9QYldA2u7hF1GBhTr2Nx/sMJ21QMMkDE5EiFj5az0UXEMFkxqrt\n Dl7GVhjG53XlkisS0qQ==", "X-Proofpoint-ORIG-GUID": "1s3TwA4RfWjHFyd99Te1FmwVBJdusPuj", "X-Proofpoint-GUID": "1s3TwA4RfWjHFyd99Te1FmwVBJdusPuj", "X-Authority-Analysis": "v=2.4 cv=Rfydyltv c=1 sm=1 tr=0 ts=69944eb6 cx=c_pps\n a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17\n a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22\n a=EUspDBNiAAAA:8 a=R0UKu0mhgHHlQpweOhEA:9 a=QEXdDO2ut3YA:10\n a=zc0IvFSfCIW2DFIPzwfm:22", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-02-17_01,2026-02-16_04,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n malwarescore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 suspectscore=0\n clxscore=1015 phishscore=0 priorityscore=1501 adultscore=0 bulkscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602170094" }, "content": "Add a common helper, pci_host_common_can_enter_d3cold(), to determine\nwhether a PCI host bridge can safely transition to D3cold.\n\nThis helper is intended to be used by PCI host controller drivers to\ndecide whether they may safely put the host bridge into D3cold based on\nthe power state and wakeup capabilities of downstream endpoints.\n\nThe helper walks all devices on the bridge's primary bus and only allows\nthe host bridge to enter D3cold if all PCIe endpoints are already in\nPCI_D3hot. This ensures that we do not power off the host bridge while\nany active endpoint still requires the link to remain powered.\n\nFor devices that may wake the system, the helper additionally requires\nthat the device supports PME wake from D3cold (via WAKE#). Devices that\ndo not have wakeup enabled are not restricted by this check and do not\nblock the host bridge from entering D3cold.\n\nDevices without a bound driver and with PCI not enabled via sysfs are\ntreated as inactive and therefore do not prevent the host bridge from\nentering D3cold. This allows controllers to power down more aggressively\nwhen there are no actively managed endpoints.\n\nSigned-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>\n---\n drivers/pci/controller/pci-host-common.c | 45 ++++++++++++++++++++++++++++++++\n drivers/pci/controller/pci-host-common.h | 2 ++\n 2 files changed, 47 insertions(+)", "diff": "diff --git a/drivers/pci/controller/pci-host-common.c b/drivers/pci/controller/pci-host-common.c\nindex d6258c1cffe5ec480fd2a7e50b3af39ef6ac4c8c..b0a4a3c995e80e0245657f0273a349334071013c 100644\n--- a/drivers/pci/controller/pci-host-common.c\n+++ b/drivers/pci/controller/pci-host-common.c\n@@ -106,5 +106,50 @@ void pci_host_common_remove(struct platform_device *pdev)\n }\n EXPORT_SYMBOL_GPL(pci_host_common_remove);\n \n+static int pci_host_common_check_d3cold(struct pci_dev *pdev, void *userdata)\n+{\n+\tbool *d3cold_allow = userdata;\n+\n+\tif (pci_pcie_type(pdev) != PCI_EXP_TYPE_ENDPOINT)\n+\t\treturn 0;\n+\n+\tif (!pdev->dev.driver && !pci_is_enabled(pdev))\n+\t\treturn 0;\n+\n+\tif (pdev->current_state != PCI_D3hot)\n+\t\tgoto exit;\n+\n+\tif (device_may_wakeup(&pdev->dev) && !pci_pme_capable(pdev, PCI_D3cold))\n+\t\tgoto exit;\n+\n+\treturn 0;\n+exit:\n+\t*d3cold_allow = false;\n+\treturn -EBUSY;\n+}\n+\n+/**\n+ * pci_host_common_can_enter_d3cold - Determine whether a host bridge may enter D3cold\n+ * @bridge: PCI host bridge to check\n+ *\n+ * Walk downstream PCIe endpoint devices and determine whether the host bridge\n+ * is permitted to transition to D3cold.\n+ *\n+ * The host bridge may enter D3cold only if all active PCIe endpoints are in\n+ * %PCI_D3hot and any wakeup-enabled endpoint is capable of generating PME from\n+ * D3cold. Inactive endpoints are ignored.\n+ *\n+ * Return: %true if the host bridge may enter D3cold, otherwise %false.\n+ */\n+bool pci_host_common_can_enter_d3cold(struct pci_host_bridge *bridge)\n+{\n+\tbool d3cold_allow = true;\n+\n+\tpci_walk_bus(bridge->bus, pci_host_common_check_d3cold, &d3cold_allow);\n+\n+\treturn d3cold_allow;\n+}\n+EXPORT_SYMBOL_GPL(pci_host_common_can_enter_d3cold);\n+\n MODULE_DESCRIPTION(\"Common library for PCI host controller drivers\");\n MODULE_LICENSE(\"GPL v2\");\ndiff --git a/drivers/pci/controller/pci-host-common.h b/drivers/pci/controller/pci-host-common.h\nindex b5075d4bd7eb31fbf1dc946ef1a6afd5afb5b3c6..18a731bca058828340bca84776d0e91da1edbbf7 100644\n--- a/drivers/pci/controller/pci-host-common.h\n+++ b/drivers/pci/controller/pci-host-common.h\n@@ -20,4 +20,6 @@ void pci_host_common_remove(struct platform_device *pdev);\n \n struct pci_config_window *pci_host_common_ecam_create(struct device *dev,\n \tstruct pci_host_bridge *bridge, const struct pci_ecam_ops *ops);\n+\n+bool pci_host_common_can_enter_d3cold(struct pci_host_bridge *bridge);\n #endif\n", "prefixes": [ "v2", "1/5" ] }