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GET /api/1.0/patches/2175785/?format=api
{ "id": 2175785, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175785/?format=api", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.0/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20251218221457.73341-6-philmd@linaro.org>", "date": "2025-12-18T22:14:56", "name": "[5/6] target/sparc: Use explicit big-endian LD/ST API", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "44409b82a1d0ac98de1af5b3fa9772b81811041a", "submitter": { "id": 85046, "url": "http://patchwork.ozlabs.org/api/1.0/people/85046/?format=api", "name": "Philippe Mathieu-Daudé", "email": "philmd@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20251218221457.73341-6-philmd@linaro.org/mbox/", "series": [ { "id": 485925, "url": "http://patchwork.ozlabs.org/api/1.0/series/485925/?format=api", "date": "2025-12-18T22:14:52", "name": "target/sparc64: Stop using the legacy native-endian APIs", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/485925/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2175785/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=wri4t0v3;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::329;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "The SPARC architecture uses big endianness. Directly use\nthe big-endian LD/ST API.\n\nMechanical change running:\n\n $ for a in uw w l q; do \\\n sed -i -e \"s/ld${a}_p(/ld${a}_be_p(/\" \\\n $(git grep -wlE '(ld|st)u?[wlq]_p' target/sparc/);\n done\n\nSigned-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\n---\n target/sparc/ldst_helper.c | 12 ++++++------\n target/sparc/mmu_helper.c | 30 ++++++++++++++++--------------\n 2 files changed, 22 insertions(+), 20 deletions(-)", "diff": "diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c\nindex 052608c02d8..ed79a506584 100644\n--- a/target/sparc/ldst_helper.c\n+++ b/target/sparc/ldst_helper.c\n@@ -861,10 +861,10 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val,\n MemTxResult result;\n hwaddr access_addr = (env->mxccregs[0] & 0xffffffffULL) + 8 * i;\n \n- env->mxccdata[i] = address_space_ldq(cs->as,\n- access_addr,\n- MEMTXATTRS_UNSPECIFIED,\n- &result);\n+ env->mxccdata[i] = address_space_ldq_be(cs->as,\n+ access_addr,\n+ MEMTXATTRS_UNSPECIFIED,\n+ &result);\n if (result != MEMTX_OK) {\n /* TODO: investigate whether this is the right behaviour */\n sparc_raise_mmu_fault(cs, access_addr, false, false,\n@@ -889,8 +889,8 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val,\n MemTxResult result;\n hwaddr access_addr = (env->mxccregs[1] & 0xffffffffULL) + 8 * i;\n \n- address_space_stq(cs->as, access_addr, env->mxccdata[i],\n- MEMTXATTRS_UNSPECIFIED, &result);\n+ address_space_stq_be(cs->as, access_addr, env->mxccdata[i],\n+ MEMTXATTRS_UNSPECIFIED, &result);\n \n if (result != MEMTX_OK) {\n /* TODO: investigate whether this is the right behaviour */\ndiff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c\nindex 46bf500ea83..035be5b4f9a 100644\n--- a/target/sparc/mmu_helper.c\n+++ b/target/sparc/mmu_helper.c\n@@ -102,7 +102,8 @@ static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full,\n /* SPARC reference MMU table walk: Context table->L1->L2->PTE */\n /* Context base + context number */\n pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2);\n- pde = address_space_ldl(cs->as, pde_ptr, MEMTXATTRS_UNSPECIFIED, &result);\n+ pde = address_space_ldl_be(cs->as, pde_ptr,\n+ MEMTXATTRS_UNSPECIFIED, &result);\n if (result != MEMTX_OK) {\n return 4 << 2; /* Translation fault, L = 0 */\n }\n@@ -117,8 +118,8 @@ static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full,\n return 4 << 2;\n case 1: /* L0 PDE */\n pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4);\n- pde = address_space_ldl(cs->as, pde_ptr,\n- MEMTXATTRS_UNSPECIFIED, &result);\n+ pde = address_space_ldl_be(cs->as, pde_ptr,\n+ MEMTXATTRS_UNSPECIFIED, &result);\n if (result != MEMTX_OK) {\n return (1 << 8) | (4 << 2); /* Translation fault, L = 1 */\n }\n@@ -131,8 +132,8 @@ static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full,\n return (1 << 8) | (4 << 2);\n case 1: /* L1 PDE */\n pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4);\n- pde = address_space_ldl(cs->as, pde_ptr,\n- MEMTXATTRS_UNSPECIFIED, &result);\n+ pde = address_space_ldl_be(cs->as, pde_ptr,\n+ MEMTXATTRS_UNSPECIFIED, &result);\n if (result != MEMTX_OK) {\n return (2 << 8) | (4 << 2); /* Translation fault, L = 2 */\n }\n@@ -145,8 +146,8 @@ static int get_physical_address(CPUSPARCState *env, CPUTLBEntryFull *full,\n return (2 << 8) | (4 << 2);\n case 1: /* L2 PDE */\n pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4);\n- pde = address_space_ldl(cs->as, pde_ptr,\n- MEMTXATTRS_UNSPECIFIED, &result);\n+ pde = address_space_ldl_be(cs->as, pde_ptr,\n+ MEMTXATTRS_UNSPECIFIED, &result);\n if (result != MEMTX_OK) {\n return (3 << 8) | (4 << 2); /* Translation fault, L = 3 */\n }\n@@ -276,7 +277,8 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev)\n /* Context base + context number */\n pde_ptr = (hwaddr)(env->mmuregs[1] << 4) +\n (env->mmuregs[2] << 2);\n- pde = address_space_ldl(cs->as, pde_ptr, MEMTXATTRS_UNSPECIFIED, &result);\n+ pde = address_space_ldl_be(cs->as, pde_ptr,\n+ MEMTXATTRS_UNSPECIFIED, &result);\n if (result != MEMTX_OK) {\n return 0;\n }\n@@ -292,8 +294,8 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev)\n return pde;\n }\n pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4);\n- pde = address_space_ldl(cs->as, pde_ptr,\n- MEMTXATTRS_UNSPECIFIED, &result);\n+ pde = address_space_ldl_be(cs->as, pde_ptr,\n+ MEMTXATTRS_UNSPECIFIED, &result);\n if (result != MEMTX_OK) {\n return 0;\n }\n@@ -310,8 +312,8 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev)\n return pde;\n }\n pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4);\n- pde = address_space_ldl(cs->as, pde_ptr,\n- MEMTXATTRS_UNSPECIFIED, &result);\n+ pde = address_space_ldl_be(cs->as, pde_ptr,\n+ MEMTXATTRS_UNSPECIFIED, &result);\n if (result != MEMTX_OK) {\n return 0;\n }\n@@ -328,8 +330,8 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev)\n return pde;\n }\n pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4);\n- pde = address_space_ldl(cs->as, pde_ptr,\n- MEMTXATTRS_UNSPECIFIED, &result);\n+ pde = address_space_ldl_be(cs->as, pde_ptr,\n+ MEMTXATTRS_UNSPECIFIED, &result);\n if (result != MEMTX_OK) {\n return 0;\n }\n", "prefixes": [ "5/6" ] }