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GET /api/1.0/patches/2175768/?format=api
{ "id": 2175768, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175768/?format=api", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.0/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20251218213053.61665-2-philmd@linaro.org>", "date": "2025-12-18T21:30:51", "name": "[1/3] hw/avr: Mark AVR-specific peripherals as little-endian", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "eedf90cf9a0ab301a4fc51350eb08f875239166a", "submitter": { "id": 85046, "url": "http://patchwork.ozlabs.org/api/1.0/people/85046/?format=api", "name": "Philippe Mathieu-Daudé", "email": "philmd@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20251218213053.61665-2-philmd@linaro.org/mbox/", "series": [ { "id": 485919, "url": "http://patchwork.ozlabs.org/api/1.0/series/485919/?format=api", "date": "2025-12-18T21:30:50", "name": "target/avr: Stop using the legacy native-endian APIs", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/485919/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2175768/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=EcQ1fzci;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::42b;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "These devices are only used by the AVR target, which is only\nbuilt as little-endian. Therefore the DEVICE_NATIVE_ENDIAN\ndefinition expand to DEVICE_LITTLE_ENDIAN (besides, the\nDEVICE_BIG_ENDIAN case isn't tested). Simplify directly\nusing DEVICE_LITTLE_ENDIAN.\n\nSigned-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\n---\n hw/char/avr_usart.c | 2 +-\n hw/misc/avr_power.c | 2 +-\n hw/timer/avr_timer16.c | 6 +++---\n target/avr/helper.c | 4 ++--\n 4 files changed, 7 insertions(+), 7 deletions(-)", "diff": "diff --git a/hw/char/avr_usart.c b/hw/char/avr_usart.c\nindex fae15217e9f..5510dd3f487 100644\n--- a/hw/char/avr_usart.c\n+++ b/hw/char/avr_usart.c\n@@ -255,7 +255,7 @@ static void avr_usart_write(void *opaque, hwaddr addr, uint64_t value,\n static const MemoryRegionOps avr_usart_ops = {\n .read = avr_usart_read,\n .write = avr_usart_write,\n- .endianness = DEVICE_NATIVE_ENDIAN,\n+ .endianness = DEVICE_LITTLE_ENDIAN,\n .impl = {.min_access_size = 1, .max_access_size = 1}\n };\n \ndiff --git a/hw/misc/avr_power.c b/hw/misc/avr_power.c\nindex 411f016c997..d8e0d918519 100644\n--- a/hw/misc/avr_power.c\n+++ b/hw/misc/avr_power.c\n@@ -69,7 +69,7 @@ static void avr_mask_write(void *opaque, hwaddr offset,\n static const MemoryRegionOps avr_mask_ops = {\n .read = avr_mask_read,\n .write = avr_mask_write,\n- .endianness = DEVICE_NATIVE_ENDIAN,\n+ .endianness = DEVICE_LITTLE_ENDIAN,\n .impl = {\n .max_access_size = 1,\n },\ndiff --git a/hw/timer/avr_timer16.c b/hw/timer/avr_timer16.c\nindex 012d8290018..110bcd58163 100644\n--- a/hw/timer/avr_timer16.c\n+++ b/hw/timer/avr_timer16.c\n@@ -524,21 +524,21 @@ static void avr_timer16_ifr_write(void *opaque, hwaddr offset,\n static const MemoryRegionOps avr_timer16_ops = {\n .read = avr_timer16_read,\n .write = avr_timer16_write,\n- .endianness = DEVICE_NATIVE_ENDIAN,\n+ .endianness = DEVICE_LITTLE_ENDIAN,\n .impl = {.max_access_size = 1}\n };\n \n static const MemoryRegionOps avr_timer16_imsk_ops = {\n .read = avr_timer16_imsk_read,\n .write = avr_timer16_imsk_write,\n- .endianness = DEVICE_NATIVE_ENDIAN,\n+ .endianness = DEVICE_LITTLE_ENDIAN,\n .impl = {.max_access_size = 1}\n };\n \n static const MemoryRegionOps avr_timer16_ifr_ops = {\n .read = avr_timer16_ifr_read,\n .write = avr_timer16_ifr_write,\n- .endianness = DEVICE_NATIVE_ENDIAN,\n+ .endianness = DEVICE_LITTLE_ENDIAN,\n .impl = {.max_access_size = 1}\n };\n \ndiff --git a/target/avr/helper.c b/target/avr/helper.c\nindex 365c8c60e19..9ee0a558ea7 100644\n--- a/target/avr/helper.c\n+++ b/target/avr/helper.c\n@@ -256,7 +256,7 @@ static void avr_cpu_trap_write(void *opaque, hwaddr addr,\n const MemoryRegionOps avr_cpu_reg1 = {\n .read = avr_cpu_reg1_read,\n .write = avr_cpu_trap_write,\n- .endianness = DEVICE_NATIVE_ENDIAN,\n+ .endianness = DEVICE_LITTLE_ENDIAN,\n .valid.min_access_size = 1,\n .valid.max_access_size = 1,\n };\n@@ -264,7 +264,7 @@ const MemoryRegionOps avr_cpu_reg1 = {\n const MemoryRegionOps avr_cpu_reg2 = {\n .read = avr_cpu_reg2_read,\n .write = avr_cpu_trap_write,\n- .endianness = DEVICE_NATIVE_ENDIAN,\n+ .endianness = DEVICE_LITTLE_ENDIAN,\n .valid.min_access_size = 1,\n .valid.max_access_size = 1,\n };\n", "prefixes": [ "1/3" ] }