Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.0/patches/2175659/?format=api
{ "id": 2175659, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175659/?format=api", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.0/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20251218-clk-mtk-improvements-v1-2-72db131ba148@baylibre.com>", "date": "2025-12-18T17:17:00", "name": "[2/8] clk: mediatek: add array size fields to cg gates", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "184ca27998d382fe54921991a4824c455cad4ac8", "submitter": { "id": 87228, "url": "http://patchwork.ozlabs.org/api/1.0/people/87228/?format=api", "name": "David Lechner", "email": "dlechner@baylibre.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/1.0/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20251218-clk-mtk-improvements-v1-2-72db131ba148@baylibre.com/mbox/", "series": [ { "id": 485889, "url": "http://patchwork.ozlabs.org/api/1.0/series/485889/?format=api", "date": "2025-12-18T17:16:58", "name": "clk: mediatek: implement of_xlate and dump", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/485889/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2175659/checks/", "tags": {}, "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=baylibre-com.20230601.gappssmtp.com\n header.i=@baylibre-com.20230601.gappssmtp.com header.a=rsa-sha256\n header.s=20230601 header.b=jEqK4DZi;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=baylibre.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=baylibre-com.20230601.gappssmtp.com\n header.i=@baylibre-com.20230601.gappssmtp.com header.b=\"jEqK4DZi\";\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=baylibre.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=dlechner@baylibre.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4dXHTQ3WCvz1y2f\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 19 Dec 2025 04:19:22 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 71E44838A5;\n\tThu, 18 Dec 2025 18:18:42 +0100 (CET)", "by phobos.denx.de (Postfix, from userid 109)\n id 903078042F; Thu, 18 Dec 2025 18:18:10 +0100 (CET)", "from mail-oa1-x2d.google.com (mail-oa1-x2d.google.com\n [IPv6:2001:4860:4864:20::2d])\n (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 1AD6180FA1\n for <u-boot@lists.denx.de>; Thu, 18 Dec 2025 18:18:07 +0100 (CET)", "by mail-oa1-x2d.google.com with SMTP id\n 586e51a60fabf-3f5ec7636e2so340438fac.2\n for <u-boot@lists.denx.de>; Thu, 18 Dec 2025 09:18:07 -0800 (PST)", "from [127.0.1.1] ([2600:8803:e7e4:500:e5ea:76dc:e589:2d5e])\n by smtp.gmail.com with ESMTPSA id\n 006d021491bc7-65cff214d66sm1316372eaf.9.2025.12.18.09.18.04\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Thu, 18 Dec 2025 09:18:05 -0800 (PST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham\n autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1766078286;\n x=1766683086;\n darn=lists.denx.de;\n h=cc:to:in-reply-to:references:message-id:content-transfer-encoding\n :mime-version:subject:date:from:from:to:cc:subject:date:message-id\n :reply-to; bh=PBOZOjqKaA71NCZ0mRgveIjJfsAKsLTtqlXUrIZWWQE=;\n b=jEqK4DZi3X1cwTOVgGe9dDh2mfWPhY1DYDgxfSGFAGrjar4whONe8m4cly8ogRBnUX\n 7F9ffubXuFcmZtlgYawEnIB/AvfmQcXr1TXYgprjzOQn75tCTk4DYlpRdRno1wu4inxP\n v9J9Xgt5HGDO+viLTV24SY9b28nyh6yyKY5uVKhaVkzrJ4J6B7q34NraHKiyy5S6aAl4\n rqf8AX1HICWcZ63qTxXph14vGeh38MnoV4ZseqeRPCO6Ia8oR5hCm3dJRgmMc8Cmc/pN\n Rjmt37PkKzEl/D/9943vtsxG46ppvGnf+QXRNacyqrtyQ4ZS6x8YD4XDL2GpLcbJZMfU\n nLcg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20230601; t=1766078286; x=1766683086;\n h=cc:to:in-reply-to:references:message-id:content-transfer-encoding\n :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to\n :cc:subject:date:message-id:reply-to;\n bh=PBOZOjqKaA71NCZ0mRgveIjJfsAKsLTtqlXUrIZWWQE=;\n b=wUA8esF3BilOqMj0VBO/pjYkRL1Hm5ILd8gyhRrqk/WtorxQeX19CKltjk3rV+qv3Z\n dP2oMKO1QT3jPzhFWxXe25a1tAaDLJoJexfVJ6462L3lOkgSMLQRoV+sJta3pVOvxeTD\n OJ1OLHQjlwO3fXfVPhF+DVpIHKUxfDBdespT2zYQWlPADN6JxRwoJrZ6XoYAa87SDrhf\n PlXnvPwYzw+txmpuSUoTFN4FRxrg9+rGVABEvT9HKt0Ohqa/GHnCqHDDd2gFAgTLWiED\n oiSBe2FmZjBDd3Jp9FI12UaC8djq220XZioGOxi0O0yANwM+xuaydf35nx3lzyblnIYy\n 7H+w==", "X-Forwarded-Encrypted": "i=1;\n AJvYcCVBSo0ZSxiASRTcF4civFayKS9dxEI7R//jRhUFLc3ZwS3QPxkEZl2apo01y4xmSwFA9lCu5eE=@lists.denx.de", "X-Gm-Message-State": "AOJu0YwC9EnKX15y2CqDtJGSwz+QrJhMKCg/Jf/qXLuO4AgbX3UAZiQS\n 1py0sfbknWKTZTjXqG6DQHhnFRvA4yAAaVi1zzE68XTL3VWThxuEVGl/OFQiXZgmW48=", "X-Gm-Gg": "AY/fxX7jBjab96ppp3Nh2UIMGk8dCarRSBlw3gwWrf+edHzURiIWOAvo4SvNe/wj9AI\n eJMBf7M2OFXho5B4nrk6hAHhaVbJxNYJyeX8XEfl+GeNK4rBLGH328uQPJTELVGMSvVfA/M1Azg\n NOf4KttaXdgH3RYJS4Xc5o4v8attHQxjUWz6m/b2qj3+fOY9Iom00s81RG3MGDJq1nqtU7UfTcy\n HqErOwRu7AC9ApsA42S6CaQk3JXP3N/i8fyIwwFvQMQ3rwkSTpXtAcS9w9/zxmO1IYRsPVJsUjc\n x/rNPp18ZWO7VzGcABBf7gOvxVvdwSYsMLOQ5Dchi90r4+wYR027FM4Eba9r/8BR6x/JVXJuvni\n rZS8dSlWAcDq1zUBnVOrp7oCV3U2AF3bkLGLKJe21FwFR9P+e0AuGNUOKEp60IFu5HvX74UUI9Z\n hFZETeFHcykMdzIbY=", "X-Google-Smtp-Source": "\n AGHT+IEvyXThncSn6EagOHFVSrxOn3NdNxzEqwL6DvnQdCvLlcVgd0SqTkvafE1SAwDbdirO6fFG7Q==", "X-Received": "by 2002:a4a:bb92:0:b0:659:7e1b:c247 with SMTP id\n 006d021491bc7-65d0e9240cemr73605eaf.3.1766078285689;\n Thu, 18 Dec 2025 09:18:05 -0800 (PST)", "From": "David Lechner <dlechner@baylibre.com>", "Date": "Thu, 18 Dec 2025 11:17:00 -0600", "Subject": "[PATCH 2/8] clk: mediatek: add array size fields to cg gates", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20251218-clk-mtk-improvements-v1-2-72db131ba148@baylibre.com>", "References": "<20251218-clk-mtk-improvements-v1-0-72db131ba148@baylibre.com>", "In-Reply-To": "<20251218-clk-mtk-improvements-v1-0-72db131ba148@baylibre.com>", "To": "Lukasz Majewski <lukma@denx.de>, Ryder Lee <ryder.lee@mediatek.com>,\n Weijie Gao <weijie.gao@mediatek.com>,\n Chunfeng Yun <chunfeng.yun@mediatek.com>,\n Igor Belwon <igor.belwon@mentallysanemainliners.org>,\n GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,\n Tom Rini <trini@konsulko.com>", "Cc": "Julien Stephan <jstephan@baylibre.com>, u-boot@lists.denx.de,\n David Lechner <dlechner@baylibre.com>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=openpgp-sha256; l=14331;\n i=dlechner@baylibre.com; h=from:subject:message-id;\n bh=BTtPUtKZDfH5/4oUvHNTNnFidH6az8OyStLJH7nif8Q=;\n b=owEBhAF7/pANAwAKAcLMIAH/AY/AAcsmYgBpRDccOmhstAvNjyo8qGWiDIv7ifZfaQOLAG1j+\n C9p/LufeKSJAUoEAAEKADQWIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCaUQ3HBYcZGxlY2huZXJA\n YmF5bGlicmUuY29tAAoJEMLMIAH/AY/Ap3gH/izwu8cCONgIPP8vLZ+gXXrp1j1+osVOix9Ubag\n vbmWrt/+SfDSRIS/CuqeXHr5LJXmuVE1/5NYiQyidiN/rvZhla5dr+CqJEAaICX/QCfEOrjK6B1\n ghIcIBfBUJy16H2qjyJHtMqFDIy/2Rdwis+cYJut6fzVxBioAzyeCH/Fldlhl4fwIs0TkqpFO0A\n 9Vjjuu2JOLwTvGmLe2sCngmQ+ENDY9eBe+tse3HqHpM5I2sM9kmJfFdpGaJXvPATYnyKAWZ6YVS\n VWKw/rPRQUQIL1BTsoq00IZjil3kTPXFW4B2gimYueSIT2CjWkz5jBW/J+efG9ef0syswtFGbZz\n UeK4=", "X-Developer-Key": "i=dlechner@baylibre.com; a=openpgp;\n fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03", "X-Mailman-Approved-At": "Thu, 18 Dec 2025 18:18:40 +0100", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Add num_gates field to struct mtk_cg_priv and populate it for all\nexisting drivers.\n\nCurrently, there is no bounds checking when accessing the gates array.\nAdding this field will allow for bounds checking in the future.\n\nSigned-off-by: David Lechner <dlechner@baylibre.com>\n---\n drivers/clk/mediatek/clk-mt7622.c | 12 ++++++++----\n drivers/clk/mediatek/clk-mt7623.c | 12 ++++++------\n drivers/clk/mediatek/clk-mt7629.c | 15 ++++++++++-----\n drivers/clk/mediatek/clk-mt7981.c | 6 +++---\n drivers/clk/mediatek/clk-mt7986.c | 4 ++--\n drivers/clk/mediatek/clk-mt7987.c | 4 ++--\n drivers/clk/mediatek/clk-mt7988.c | 12 ++++++++----\n drivers/clk/mediatek/clk-mt8183.c | 3 ++-\n drivers/clk/mediatek/clk-mt8365.c | 6 ++++--\n drivers/clk/mediatek/clk-mt8512.c | 6 ++++--\n drivers/clk/mediatek/clk-mt8516.c | 3 ++-\n drivers/clk/mediatek/clk-mt8518.c | 3 ++-\n drivers/clk/mediatek/clk-mtk.c | 3 ++-\n drivers/clk/mediatek/clk-mtk.h | 3 ++-\n 14 files changed, 57 insertions(+), 35 deletions(-)", "diff": "diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c\nindex ccad3820c1b..16c6f024e72 100644\n--- a/drivers/clk/mediatek/clk-mt7622.c\n+++ b/drivers/clk/mediatek/clk-mt7622.c\n@@ -692,7 +692,8 @@ static int mt7622_pericfg_probe(struct udevice *dev)\n \n static int mt7622_pciesys_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7622_clk_tree, pcie_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7622_clk_tree, pcie_cgs,\n+\t\t\t\t\tARRAY_SIZE(pcie_cgs));\n }\n \n static int mt7622_pciesys_bind(struct udevice *dev)\n@@ -710,7 +711,8 @@ static int mt7622_pciesys_bind(struct udevice *dev)\n \n static int mt7622_ethsys_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7622_clk_tree, eth_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7622_clk_tree, eth_cgs,\n+\t\t\t\t\tARRAY_SIZE(eth_cgs));\n }\n \n static int mt7622_ethsys_bind(struct udevice *dev)\n@@ -728,12 +730,14 @@ static int mt7622_ethsys_bind(struct udevice *dev)\n \n static int mt7622_sgmiisys_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7622_clk_tree, sgmii_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7622_clk_tree, sgmii_cgs,\n+\t\t\t\t\tARRAY_SIZE(sgmii_cgs));\n }\n \n static int mt7622_ssusbsys_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7622_clk_tree, ssusb_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7622_clk_tree, ssusb_cgs,\n+\t\t\t\t\tARRAY_SIZE(ssusb_cgs));\n }\n \n static const struct udevice_id mt7622_apmixed_compat[] = {\ndiff --git a/drivers/clk/mediatek/clk-mt7623.c b/drivers/clk/mediatek/clk-mt7623.c\nindex cfc711ad216..5a60a86233e 100644\n--- a/drivers/clk/mediatek/clk-mt7623.c\n+++ b/drivers/clk/mediatek/clk-mt7623.c\n@@ -1057,8 +1057,8 @@ static const struct mtk_clk_tree mt7623_clk_gate_tree = {\n \n static int mt7623_infracfg_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree,\n-\t\t\t\t\tinfra_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree, infra_cgs,\n+\t\t\t\t\tARRAY_SIZE(infra_cgs));\n }\n \n static const struct mtk_clk_tree mt7623_clk_peri_tree = {\n@@ -1079,14 +1079,14 @@ static int mt7623_pericfg_probe(struct udevice *dev)\n \n static int mt7623_hifsys_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree,\n-\t\t\t\t\thif_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree, hif_cgs,\n+\t\t\t\t\tARRAY_SIZE(hif_cgs));\n }\n \n static int mt7623_ethsys_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree,\n-\t\t\t\t\teth_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree, eth_cgs,\n+\t\t\t\t\tARRAY_SIZE(eth_cgs));\n }\n \n static int mt7623_ethsys_hifsys_bind(struct udevice *dev)\ndiff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c\nindex e0eff01561c..e4132f6195f 100644\n--- a/drivers/clk/mediatek/clk-mt7629.c\n+++ b/drivers/clk/mediatek/clk-mt7629.c\n@@ -634,17 +634,20 @@ static int mt7629_topckgen_probe(struct udevice *dev)\n \n static int mt7629_infracfg_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7629_clk_tree, infra_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7629_clk_tree, infra_cgs,\n+\t\t\t\t\tARRAY_SIZE(infra_cgs));\n }\n \n static int mt7629_pericfg_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7629_peri_clk_tree, peri_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7629_peri_clk_tree, peri_cgs,\n+\t\t\t\t\tARRAY_SIZE(peri_cgs));\n }\n \n static int mt7629_ethsys_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7629_clk_tree, eth_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7629_clk_tree, eth_cgs,\n+\t\t\t\t\tARRAY_SIZE(eth_cgs));\n }\n \n static int mt7629_ethsys_bind(struct udevice *dev)\n@@ -662,12 +665,14 @@ static int mt7629_ethsys_bind(struct udevice *dev)\n \n static int mt7629_sgmiisys_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7629_clk_tree, sgmii_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7629_clk_tree, sgmii_cgs,\n+\t\t\t\t\tARRAY_SIZE(sgmii_cgs));\n }\n \n static int mt7629_ssusbsys_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7629_clk_tree, ssusb_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7629_clk_tree, ssusb_cgs,\n+\t\t\t\t\tARRAY_SIZE(ssusb_cgs));\n }\n \n static const struct udevice_id mt7629_apmixed_compat[] = {\ndiff --git a/drivers/clk/mediatek/clk-mt7981.c b/drivers/clk/mediatek/clk-mt7981.c\nindex 9cb2aff2bee..c8adbe538d9 100644\n--- a/drivers/clk/mediatek/clk-mt7981.c\n+++ b/drivers/clk/mediatek/clk-mt7981.c\n@@ -631,7 +631,7 @@ static const struct mtk_gate sgmii0_cgs[] = {\n static int mt7981_sgmii0sys_probe(struct udevice *dev)\n {\n \treturn mtk_common_clk_gate_init(dev, &mt7981_topckgen_clk_tree,\n-\t\t\t\t\tsgmii0_cgs);\n+\t\t\t\t\tsgmii0_cgs, ARRAY_SIZE(sgmii0_cgs));\n }\n \n static const struct udevice_id mt7981_sgmii0sys_compat[] = {\n@@ -658,7 +658,7 @@ static const struct mtk_gate sgmii1_cgs[] = {\n static int mt7981_sgmii1sys_probe(struct udevice *dev)\n {\n \treturn mtk_common_clk_gate_init(dev, &mt7981_topckgen_clk_tree,\n-\t\t\t\t\tsgmii1_cgs);\n+\t\t\t\t\tsgmii1_cgs, ARRAY_SIZE(sgmii1_cgs));\n }\n \n static const struct udevice_id mt7981_sgmii1sys_compat[] = {\n@@ -699,7 +699,7 @@ static const struct mtk_gate eth_cgs[] = {\n static int mt7981_ethsys_probe(struct udevice *dev)\n {\n \treturn mtk_common_clk_gate_init(dev, &mt7981_topckgen_clk_tree,\n-\t\t\t\t\teth_cgs);\n+\t\t\t\t\teth_cgs, ARRAY_SIZE(eth_cgs));\n }\n \n static int mt7981_ethsys_bind(struct udevice *dev)\ndiff --git a/drivers/clk/mediatek/clk-mt7986.c b/drivers/clk/mediatek/clk-mt7986.c\nindex afff3167284..d2ac5ad1bb1 100644\n--- a/drivers/clk/mediatek/clk-mt7986.c\n+++ b/drivers/clk/mediatek/clk-mt7986.c\n@@ -636,8 +636,8 @@ static const struct mtk_gate eth_cgs[] = {\n \n static int mt7986_ethsys_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7986_topckgen_clk_tree,\n-\t\t\t\t\teth_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7986_topckgen_clk_tree, eth_cgs,\n+\t\t\t\t\tARRAY_SIZE(eth_cgs));\n }\n \n static int mt7986_ethsys_bind(struct udevice *dev)\ndiff --git a/drivers/clk/mediatek/clk-mt7987.c b/drivers/clk/mediatek/clk-mt7987.c\nindex 8e37803e97b..e0ca82de01e 100644\n--- a/drivers/clk/mediatek/clk-mt7987.c\n+++ b/drivers/clk/mediatek/clk-mt7987.c\n@@ -818,8 +818,8 @@ static const struct mtk_gate eth_cgs[] = {\n \n static int mt7987_ethsys_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt7987_topckgen_clk_tree,\n-\t\t\t\t\teth_cgs);\n+\treturn mtk_common_clk_gate_init(dev, &mt7987_topckgen_clk_tree, eth_cgs,\n+\t\t\t\t\tARRAY_SIZE(eth_cgs));\n }\n \n static int mt7987_ethsys_bind(struct udevice *dev)\ndiff --git a/drivers/clk/mediatek/clk-mt7988.c b/drivers/clk/mediatek/clk-mt7988.c\nindex d594fc6df39..43820557ba7 100644\n--- a/drivers/clk/mediatek/clk-mt7988.c\n+++ b/drivers/clk/mediatek/clk-mt7988.c\n@@ -892,7 +892,8 @@ static const struct mtk_gate ethdma_mtk_gate[] = {\n static int mt7988_ethdma_probe(struct udevice *dev)\n {\n \treturn mtk_common_clk_gate_init(dev, &mt7988_topckgen_clk_tree,\n-\t\t\t\t\tethdma_mtk_gate);\n+\t\t\t\t\tethdma_mtk_gate,\n+\t\t\t\t\tARRAY_SIZE(ethdma_mtk_gate));\n }\n \n static int mt7988_ethdma_bind(struct udevice *dev)\n@@ -950,7 +951,8 @@ static const struct mtk_gate sgmiisys_0_mtk_gate[] = {\n static int mt7988_sgmiisys_0_probe(struct udevice *dev)\n {\n \treturn mtk_common_clk_gate_init(dev, &mt7988_topckgen_clk_tree,\n-\t\t\t\t\tsgmiisys_0_mtk_gate);\n+\t\t\t\t\tsgmiisys_0_mtk_gate,\n+\t\t\t\t\tARRAY_SIZE(sgmiisys_0_mtk_gate));\n }\n \n static const struct udevice_id mt7988_sgmiisys_0_compat[] = {\n@@ -994,7 +996,8 @@ static const struct mtk_gate sgmiisys_1_mtk_gate[] = {\n static int mt7988_sgmiisys_1_probe(struct udevice *dev)\n {\n \treturn mtk_common_clk_gate_init(dev, &mt7988_topckgen_clk_tree,\n-\t\t\t\t\tsgmiisys_1_mtk_gate);\n+\t\t\t\t\tsgmiisys_1_mtk_gate,\n+\t\t\t\t\tARRAY_SIZE(sgmiisys_1_mtk_gate));\n }\n \n static const struct udevice_id mt7988_sgmiisys_1_compat[] = {\n@@ -1040,7 +1043,8 @@ static const struct mtk_gate ethwarp_mtk_gate[] = {\n static int mt7988_ethwarp_probe(struct udevice *dev)\n {\n \treturn mtk_common_clk_gate_init(dev, &mt7988_topckgen_clk_tree,\n-\t\t\t\t\tethwarp_mtk_gate);\n+\t\t\t\t\tethwarp_mtk_gate,\n+\t\t\t\t\tARRAY_SIZE(ethwarp_mtk_gate));\n }\n \n static int mt7988_ethwarp_bind(struct udevice *dev)\ndiff --git a/drivers/clk/mediatek/clk-mt8183.c b/drivers/clk/mediatek/clk-mt8183.c\nindex 7a1953ef6fd..5b41cf4b88c 100644\n--- a/drivers/clk/mediatek/clk-mt8183.c\n+++ b/drivers/clk/mediatek/clk-mt8183.c\n@@ -777,7 +777,8 @@ static int mt8183_topckgen_probe(struct udevice *dev)\n \n static int mt8183_infracfg_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt8183_clk_tree, infra_clks);\n+\treturn mtk_common_clk_gate_init(dev, &mt8183_clk_tree, infra_clks,\n+\t\t\t\t\tARRAY_SIZE(infra_clks));\n }\n \n static const struct udevice_id mt8183_apmixed_compat[] = {\ndiff --git a/drivers/clk/mediatek/clk-mt8365.c b/drivers/clk/mediatek/clk-mt8365.c\nindex 7897044e1ad..c88545fc7cf 100644\n--- a/drivers/clk/mediatek/clk-mt8365.c\n+++ b/drivers/clk/mediatek/clk-mt8365.c\n@@ -705,12 +705,14 @@ static int mt8365_topckgen_probe(struct udevice *dev)\n \n static int mt8365_topckgen_cg_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt8365_clk_tree, top_clk_gates);\n+\treturn mtk_common_clk_gate_init(dev, &mt8365_clk_tree, top_clk_gates,\n+\t\t\t\t\tARRAY_SIZE(top_clk_gates));\n }\n \n static int mt8365_infracfg_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt8365_clk_tree, ifr_clks);\n+\treturn mtk_common_clk_gate_init(dev, &mt8365_clk_tree, ifr_clks,\n+\t\t\t\t\tARRAY_SIZE(ifr_clks));\n }\n \n static const struct udevice_id mt8365_apmixed_compat[] = {\ndiff --git a/drivers/clk/mediatek/clk-mt8512.c b/drivers/clk/mediatek/clk-mt8512.c\nindex 6d98403bc45..d4f6604c160 100644\n--- a/drivers/clk/mediatek/clk-mt8512.c\n+++ b/drivers/clk/mediatek/clk-mt8512.c\n@@ -808,12 +808,14 @@ static int mt8512_topckgen_probe(struct udevice *dev)\n \n static int mt8512_topckgen_cg_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt8512_clk_tree, top_clks);\n+\treturn mtk_common_clk_gate_init(dev, &mt8512_clk_tree, top_clks,\n+\t\t\t\t\tARRAY_SIZE(top_clks));\n }\n \n static int mt8512_infracfg_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt8512_clk_tree, infra_clks);\n+\treturn mtk_common_clk_gate_init(dev, &mt8512_clk_tree, infra_clks,\n+\t\t\t\t\tARRAY_SIZE(infra_clks));\n }\n \n static const struct udevice_id mt8512_apmixed_compat[] = {\ndiff --git a/drivers/clk/mediatek/clk-mt8516.c b/drivers/clk/mediatek/clk-mt8516.c\nindex c21b9894ad6..d5f922886a3 100644\n--- a/drivers/clk/mediatek/clk-mt8516.c\n+++ b/drivers/clk/mediatek/clk-mt8516.c\n@@ -757,7 +757,8 @@ static int mt8516_topckgen_probe(struct udevice *dev)\n \n static int mt8516_topckgen_cg_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt8516_clk_tree, top_clks);\n+\treturn mtk_common_clk_gate_init(dev, &mt8516_clk_tree, top_clks,\n+\t\t\t\t\tARRAY_SIZE(top_clks));\n }\n \n static const struct udevice_id mt8516_apmixed_compat[] = {\ndiff --git a/drivers/clk/mediatek/clk-mt8518.c b/drivers/clk/mediatek/clk-mt8518.c\nindex 48ef209ebbd..92730f3f06c 100644\n--- a/drivers/clk/mediatek/clk-mt8518.c\n+++ b/drivers/clk/mediatek/clk-mt8518.c\n@@ -1513,7 +1513,8 @@ static int mt8518_topckgen_probe(struct udevice *dev)\n \n static int mt8518_topckgen_cg_probe(struct udevice *dev)\n {\n-\treturn mtk_common_clk_gate_init(dev, &mt8518_clk_tree, top_clks);\n+\treturn mtk_common_clk_gate_init(dev, &mt8518_clk_tree, top_clks,\n+\t\t\t\t\tARRAY_SIZE(top_clks));\n }\n \n static const struct udevice_id mt8518_apmixed_compat[] = {\ndiff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c\nindex f91777e968a..ffaecbfd306 100644\n--- a/drivers/clk/mediatek/clk-mtk.c\n+++ b/drivers/clk/mediatek/clk-mtk.c\n@@ -824,7 +824,7 @@ int mtk_common_clk_infrasys_init(struct udevice *dev,\n \n int mtk_common_clk_gate_init(struct udevice *dev,\n \t\t\t const struct mtk_clk_tree *tree,\n-\t\t\t const struct mtk_gate *gates)\n+\t\t\t const struct mtk_gate *gates, int num_gates)\n {\n \tstruct mtk_cg_priv *priv = dev_get_priv(dev);\n \tstruct udevice *parent;\n@@ -845,6 +845,7 @@ int mtk_common_clk_gate_init(struct udevice *dev,\n \tpriv->parent = parent;\n \tpriv->tree = tree;\n \tpriv->gates = gates;\n+\tpriv->num_gates = num_gates;\n \n \treturn 0;\n }\ndiff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h\nindex 05c22fce10d..3259f6281dd 100644\n--- a/drivers/clk/mediatek/clk-mtk.h\n+++ b/drivers/clk/mediatek/clk-mtk.h\n@@ -284,6 +284,7 @@ struct mtk_cg_priv {\n \tvoid __iomem *base;\n \tconst struct mtk_clk_tree *tree;\n \tconst struct mtk_gate *gates;\n+\tint num_gates;\n };\n \n extern const struct clk_ops mtk_clk_apmixedsys_ops;\n@@ -298,6 +299,6 @@ int mtk_common_clk_infrasys_init(struct udevice *dev,\n \t\t\t\t const struct mtk_clk_tree *tree);\n int mtk_common_clk_gate_init(struct udevice *dev,\n \t\t\t const struct mtk_clk_tree *tree,\n-\t\t\t const struct mtk_gate *gates);\n+\t\t\t const struct mtk_gate *gates, int num_gates);\n \n #endif /* __DRV_CLK_MTK_H */\n", "prefixes": [ "2/8" ] }