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GET /api/1.0/patches/2175603/?format=api
{ "id": 2175603, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175603/?format=api", "project": { "id": 35, "url": "http://patchwork.ozlabs.org/api/1.0/projects/35/?format=api", "name": "Linux I2C development", "link_name": "linux-i2c", "list_id": "linux-i2c.vger.kernel.org", "list_email": "linux-i2c@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20251218151509.361617-7-heikki.krogerus@linux.intel.com>", "date": "2025-12-18T15:15:05", "name": "[v2,6/6] i2c: designware: Remove an unnecessary condition", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "5fe52b085988bdae12636ab98c6135e7047cab3f", "submitter": { "id": 23674, "url": "http://patchwork.ozlabs.org/api/1.0/people/23674/?format=api", "name": "Heikki Krogerus", "email": "heikki.krogerus@linux.intel.com" }, "delegate": { "id": 149066, "url": "http://patchwork.ozlabs.org/api/1.0/users/149066/?format=api", "username": "cazzacarna", "first_name": "Andi", "last_name": "Shyti", "email": "andi.shyti@kernel.org" }, "mbox": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20251218151509.361617-7-heikki.krogerus@linux.intel.com/mbox/", "series": [ { "id": 485867, "url": "http://patchwork.ozlabs.org/api/1.0/series/485867/?format=api", "date": "2025-12-18T15:14:59", "name": "i2c: designware: Enable mode swapping", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/485867/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2175603/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-i2c+bounces-14648-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-i2c@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=Hc1NBFSe;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-i2c+bounces-14648-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"Hc1NBFSe\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=192.198.163.9", "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=linux.intel.com" ], "Received": [ "from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4dXDqm1c25z1y2f\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 19 Dec 2025 02:20:04 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id B5600309443B\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 18 Dec 2025 15:15:57 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id BBDB734CFB0;\n\tThu, 18 Dec 2025 15:15:37 +0000 (UTC)", "from mgamail.intel.com (mgamail.intel.com [192.198.163.9])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E134349B12;\n\tThu, 18 Dec 2025 15:15:28 +0000 (UTC)", "from orviesa010.jf.intel.com ([10.64.159.150])\n by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 18 Dec 2025 07:15:25 -0800", "from black.igk.intel.com ([10.91.253.5])\n by orviesa010.jf.intel.com with ESMTP; 18 Dec 2025 07:15:24 -0800" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1766070934; cv=none;\n b=kt2GQ83G+jkAEz4D9eQ84pD7alsmzDAvWONx11l0ZrnCA0OzZINkFXdXvEGuQuGsYJTi4GQNVMaktHAJIODgZJ+ON8adeb/lB8hcNbTrs43RGVKSfJoyP3hP5xpFuJcEWyEwFqnyfxlCb0EzqImCz9PlKq6I6VEacWA0L7mQtGM=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1766070934; c=relaxed/simple;\n\tbh=JWsPyBdpcJM8iDKiSMRwUvtE1BNgxIullQfkoW1yEiA=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=JZs6tO5+AarLUUEEJo0/z1bSjbkhrKWoDzMYaE5+Eazx1IseYtdVXRNqrCBdEIn63ixRppVZPiCF07DnQJ86Lq6nQyGj9Ar7RKd/aY3kfvHqF4TQEkdXH2h/PWidIZ65zy2AnqW3+7tI8eCcKyDs06KF7AKiYKLJm6stgUW9HF0=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com;\n spf=pass smtp.mailfrom=linux.intel.com;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=Hc1NBFSe; arc=none smtp.client-ip=192.198.163.9", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1766070929; x=1797606929;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=JWsPyBdpcJM8iDKiSMRwUvtE1BNgxIullQfkoW1yEiA=;\n b=Hc1NBFSerV0cgW6Yi8/Iu0RJeWZObg+5DWaqd+CRBCa9z/j8GqqvXSHH\n 5BZKR3UaNRetm1tB/n3iZW59P6EXLmlB2dnNWNa1ZAFHz29aTkIx0cmoa\n nIgKcTGyrTntMkqC5QnODRqh19EF5vaxDtcAAif/MdC7rMOJ81b2rE0bM\n IFWonz4kATo3140lvYtupGjlQs807FZfMJDeJ3/YMMi9CXCzTEYduskcL\n iT/j7OImnAmtZrfV62NAAu8nQVLvYHtHtK5MfdMym43WxP34ZAEN2BRug\n 4KjNKLNeiaWh/oIKF6b3yaaXjlAQ0LdEVGKcyGJ+MPYfvrM9wR/azs29L\n g==;", "X-CSE-ConnectionGUID": [ "NqoKE5KVSzWVsktSGHbMjQ==", "X+9nPRnLRxy047bHEcrcPQ==" ], "X-CSE-MsgGUID": [ "sGIFx9XmTK2T/WZ7jT2C9w==", "QzIdjzu2SbikTLirXzpdyw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6800,10657,11646\"; a=\"78739562\"", "E=Sophos;i=\"6.21,158,1763452800\";\n d=\"scan'208\";a=\"78739562\"", "E=Sophos;i=\"6.21,158,1763452800\";\n d=\"scan'208\";a=\"197857520\"" ], "X-ExtLoop1": "1", "From": "Heikki Krogerus <heikki.krogerus@linux.intel.com>", "To": "Andi Shyti <andi.shyti@kernel.org>,\n\tMika Westerberg <mika.westerberg@linux.intel.com>", "Cc": "Andy Shevchenko <andriy.shevchenko@linux.intel.com>,\n\tJan Dabros <jsd@semihalf.com>,\n\tRaag Jadav <raag.jadav@intel.com>,\n\tlinux-i2c@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org", "Subject": "[PATCH v2 6/6] i2c: designware: Remove an unnecessary condition", "Date": "Thu, 18 Dec 2025 16:15:05 +0100", "Message-ID": "<20251218151509.361617-7-heikki.krogerus@linux.intel.com>", "X-Mailer": "git-send-email 2.50.1", "In-Reply-To": "<20251218151509.361617-1-heikki.krogerus@linux.intel.com>", "References": "<20251218151509.361617-1-heikki.krogerus@linux.intel.com>", "Precedence": "bulk", "X-Mailing-List": "linux-i2c@vger.kernel.org", "List-Id": "<linux-i2c.vger.kernel.org>", "List-Subscribe": "<mailto:linux-i2c+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-i2c+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "Writing also the high speed timing registers unconditionally.\nThe reset value for these registers is 0, so this should\nalways be safe.\n\nSuggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>\nSigned-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>\n---\n drivers/i2c/busses/i2c-designware-common.c | 8 +++-----\n 1 file changed, 3 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busses/i2c-designware-common.c\nindex aac7b1f4710f..1981dbfa260f 100644\n--- a/drivers/i2c/busses/i2c-designware-common.c\n+++ b/drivers/i2c/busses/i2c-designware-common.c\n@@ -391,11 +391,9 @@ static void i2c_dw_write_timings(struct dw_i2c_dev *dev)\n \tregmap_write(dev->map, DW_IC_FS_SCL_HCNT, dev->fs_hcnt);\n \tregmap_write(dev->map, DW_IC_FS_SCL_LCNT, dev->fs_lcnt);\n \n-\t/* Write high speed timing parameters if supported */\n-\tif (dev->hs_hcnt && dev->hs_lcnt) {\n-\t\tregmap_write(dev->map, DW_IC_HS_SCL_HCNT, dev->hs_hcnt);\n-\t\tregmap_write(dev->map, DW_IC_HS_SCL_LCNT, dev->hs_lcnt);\n-\t}\n+\t/* Write high speed timing parameters */\n+\tregmap_write(dev->map, DW_IC_HS_SCL_HCNT, dev->hs_hcnt);\n+\tregmap_write(dev->map, DW_IC_HS_SCL_LCNT, dev->hs_lcnt);\n }\n \n /**\n", "prefixes": [ "v2", "6/6" ] }