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GET /api/1.0/patches/2175508/?format=api
{ "id": 2175508, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175508/?format=api", "project": { "id": 67, "url": "http://patchwork.ozlabs.org/api/1.0/projects/67/?format=api", "name": "OpenSBI development", "link_name": "opensbi", "list_id": "opensbi.lists.infradead.org", "list_email": "opensbi@lists.infradead.org", "web_url": "https://github.com/riscv/opensbi", "scm_url": "", "webscm_url": "" }, "msgid": "<20251218104243.562667-8-ganboing@gmail.com>", "date": "2025-12-18T10:42:43", "name": "[v6,7/7] platform: generic: eswin: Add shutdown/reboot support for Hifive Premier P550", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "d619d6eb291ed4041c5b049fe7586caaf77ec277", "submitter": { "id": 86401, "url": "http://patchwork.ozlabs.org/api/1.0/people/86401/?format=api", "name": "Bo Gan", "email": "ganboing@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20251218104243.562667-8-ganboing@gmail.com/mbox/", "series": [ { "id": 485819, "url": "http://patchwork.ozlabs.org/api/1.0/series/485819/?format=api", "date": "2025-12-18T10:42:37", "name": "Initial ESWIN/EIC7700 and Hifive P550 support", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/485819/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2175508/checks/", "tags": {}, "headers": { "Return-Path": "\n <opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=YOeDLq3l;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=mWzfz0xZ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: Hifive Premier P550[1] is a Mini-DTX form factor board with\n EIC7700X. It has a STM32F407VET6 onboard MCU acting as the BMC,\n controlling\n ATX power on/off while providing remote management features. The [...]\n Content analysis details: (-2.1 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no\n trust\n [2607:f8b0:4864:20:0:0:0:435 listed in]\n [list.dnswl.org]\n -0.0 SPF_PASS SPF: sender matches SPF record\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]\n 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n provider\n [ganboing(at)gmail.com]", "X-BeenThere": "opensbi@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "<opensbi.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/opensbi/>", "List-Post": "<mailto:opensbi@lists.infradead.org>", "List-Help": "<mailto:opensbi-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"opensbi\" <opensbi-bounces@lists.infradead.org>", "Errors-To": "opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "Hifive Premier P550[1] is a Mini-DTX form factor board with EIC7700X.\nIt has a STM32F407VET6 onboard MCU acting as the BMC, controlling\nATX power on/off while providing remote management features. The\nEIC7700X SoC/SoM communicates with the BMC via UART2, using ESWIN's\nprotocol. The messages transmitted are fixed sizes (267 bytes), and\ndepending on the type, can be directional or bi-directional. The\nshutdown and cold reboot requests are directional messages from SoC\nto BMC (NOTIFY type) with CMD_POWER_OFF or CMD_RESTART. The payload\nof shutdown/cold reboot requests should be empty and are ignored by\nthe BMC at the moment. A HFP (Hifive Premier) specific reset device\nis registered in addition to the SoC reset device. For shutdown and\ncold reboot, the board-level reset takes precedence.\n\nThe definitions of the SoC <-> BMC message protocol is taken from\nESWIN's repo [2]. The only file used from that repo is `hf_common.h`\nIt's disjunctively dual licensed as (GPL-2.0-only OR BSD-2-Clause),\nhence, compatible with the license of OpenSBI. It's heavily modified\nand renamed as platform/generic/include/eswin/hfp.h. The author and\ncopyright in the original file are retained.\n\nValidated shutdown/core reboot working on Hifive Premier P550.\n\n[1] https://www.sifive.com/boards/hifive-premier-p550#documentation\n[2] https://github.com/eswincomputing/hifive-premier-p550-mcu-patches.git\n\nSigned-off-by: Bo Gan <ganboing@gmail.com>\n---\n platform/generic/eswin/eic770x.c | 2 +\n platform/generic/eswin/hfp.c | 118 +++++++++++++++++++++++\n platform/generic/eswin/objects.mk | 1 +\n platform/generic/include/eswin/eic770x.h | 22 +++++\n platform/generic/include/eswin/hfp.h | 64 ++++++++++++\n 5 files changed, 207 insertions(+)\n create mode 100644 platform/generic/eswin/hfp.c\n create mode 100644 platform/generic/include/eswin/hfp.h", "diff": "diff --git a/platform/generic/eswin/eic770x.c b/platform/generic/eswin/eic770x.c\nindex bce53a19..7330df9f 100644\n--- a/platform/generic/eswin/eic770x.c\n+++ b/platform/generic/eswin/eic770x.c\n@@ -13,6 +13,7 @@\n #include <sbi/sbi_hart_pmp.h>\n #include <sbi/sbi_hart_protection.h>\n #include <eswin/eic770x.h>\n+#include <eswin/hfp.h>\n \n static struct sbi_hart_protection eswin_eic7700_pmp_protection;\n \n@@ -393,6 +394,7 @@ static int eswin_eic7700_platform_init(const void *fdt, int nodeoff,\n }\n \n static const struct fdt_match eswin_eic7700_match[] = {\n+\t{ .compatible = \"sifive,hifive-premier-p550\", .data = &hfp_override },\n \t{ .compatible = \"eswin,eic7700\" },\n \t{ },\n };\ndiff --git a/platform/generic/eswin/hfp.c b/platform/generic/eswin/hfp.c\nnew file mode 100644\nindex 00000000..eabed191\n--- /dev/null\n+++ b/platform/generic/eswin/hfp.c\n@@ -0,0 +1,118 @@\n+/*\n+ * SPDX-License-Identifier: BSD-2-Clause\n+ *\n+ * Copyright (c) 2025 Bo Gan <ganboing@gmail.com>\n+ *\n+ */\n+\n+#include <sbi/riscv_io.h>\n+#include <sbi/sbi_string.h>\n+#include <sbi/sbi_system.h>\n+#include <sbi/sbi_hart.h>\n+#include <sbi/sbi_ecall_interface.h>\n+#include <sbi_utils/serial/uart8250.h>\n+#include <eswin/eic770x.h>\n+#include <eswin/hfp.h>\n+\n+/* HFP -> HiFive Premier P550 */\n+\n+#define HFP_MCU_UART_PORT\t2\n+#define HFP_MCU_UART_BAUDRATE\t115200\n+\n+static unsigned long eic770x_sysclk_rate(void)\n+{\n+\t/* syscfg clock is a mux of 24Mhz xtal clock and spll0_fout3/divisor */\n+\tuint32_t syscfg_clk = readl_relaxed((void*)EIC770X_SYSCRG_SYSCLK);\n+\n+\tif (EIC770X_SYSCLK_SEL(syscfg_clk))\n+\t\treturn EIC770X_XTAL_CLK_RATE;\n+\n+\treturn EIC770X_SPLL0_OUT3_RATE / EIC770X_SYSCLK_DIV(syscfg_clk);\n+}\n+\n+static void eic770x_enable_uart_clk(unsigned port)\n+{\n+\tuint32_t lsp_clk_en = readl_relaxed((void*)EIC770X_SYSCRG_LSPCLK0);\n+\n+\tlsp_clk_en |= EIC770X_UART_CLK_BIT(port);\n+\twritel(lsp_clk_en, (void*)EIC770X_SYSCRG_LSPCLK0);\n+}\n+\n+static void hfp_send_bmc_msg(uint8_t type, uint8_t cmd,\n+\t\t\t const uint8_t *data, uint8_t len)\n+{\n+\tunsigned long sysclk_rate;\n+\tstruct uart8250_device uart_dev;\n+\tunion {\n+\t\tstruct hfp_bmc_message msg;\n+\t\tchar as_char[sizeof(struct hfp_bmc_message)];\n+\t} xmit = {{\n+\t\t.header_magic = MAGIC_HEADER,\n+\t\t.type = type,\n+\t\t.cmd = cmd,\n+\t\t.data_len = len,\n+\t\t.tail_magic = MAGIC_TAIL,\n+\t}};\n+\n+\t/**\n+\t * Re-initialize UART.\n+\t * S-mode OS may have changed the clock frequency of syscfg clock\n+\t * which is the clock of all low speed peripherals, including UARTs.\n+\t * S-mode OS may also have disabled the UART2 clock via clock gate.\n+\t * (lsp_clk_en0 bit 17-21 controls UART0-4). Thus, we re-calculate\n+\t * the clock rate, enable UART clock, and re-initialize UART.\n+\t */\n+\n+\tsysclk_rate = eic770x_sysclk_rate();\n+\teic770x_enable_uart_clk(HFP_MCU_UART_PORT);\n+\n+\tuart8250_device_init(&uart_dev,\n+\t\t\tEIC770X_UART(HFP_MCU_UART_PORT),\n+\t\t\tsysclk_rate,\n+\t\t\tHFP_MCU_UART_BAUDRATE,\n+\t\t\tEIC770X_UART_REG_SHIFT,\n+\t\t\tEIC770X_UART_REG_WIDTH,\n+\t\t\t0, 0);\n+\n+\tsbi_memcpy(&xmit.msg.data, data, len);\n+\thfp_bmc_checksum_msg(&xmit.msg);\n+\n+\tfor (unsigned int i = 0; i < sizeof(xmit.as_char); i++)\n+\t\tuart8250_device_putc(&uart_dev, xmit.as_char[i]);\n+}\n+\n+static int hfp_system_reset_check(u32 type, u32 reason)\n+{\n+\tswitch (type) {\n+\tcase SBI_SRST_RESET_TYPE_COLD_REBOOT:\n+\tcase SBI_SRST_RESET_TYPE_SHUTDOWN:\n+\t\treturn 255;\n+\tdefault:\n+\t\treturn 0;\n+\t}\n+}\n+\n+static void hfp_system_reset(u32 type, u32 reason)\n+{\n+\tswitch (type) {\n+\tcase SBI_SRST_RESET_TYPE_SHUTDOWN:\n+\t\thfp_send_bmc_msg(HFP_MSG_NOTIFY, HFP_CMD_POWER_OFF,\n+\t\t\t\tNULL, 0);\n+\t\tbreak;\n+\tcase SBI_SRST_RESET_TYPE_COLD_REBOOT:\n+\t\thfp_send_bmc_msg(HFP_MSG_NOTIFY, HFP_CMD_RESTART,\n+\t\t\t\tNULL, 0);\n+\t\tbreak;\n+\t}\n+\tsbi_hart_hang();\n+}\n+\n+static struct sbi_system_reset_device hfp_reset = {\n+\t.name = \"hfp_reset\",\n+\t.system_reset_check = hfp_system_reset_check,\n+\t.system_reset = hfp_system_reset,\n+};\n+\n+const struct eic770x_board_override hfp_override = {\n+\t.reset_dev = &hfp_reset,\n+};\ndiff --git a/platform/generic/eswin/objects.mk b/platform/generic/eswin/objects.mk\nindex be5420ce..a7165aa3 100644\n--- a/platform/generic/eswin/objects.mk\n+++ b/platform/generic/eswin/objects.mk\n@@ -7,4 +7,5 @@\n ifeq ($(PLATFORM_RISCV_XLEN), 64)\n carray-platform_override_modules-$(CONFIG_PLATFORM_ESWIN_EIC770X) += eswin_eic7700\n platform-objs-$(CONFIG_PLATFORM_ESWIN_EIC770X) += eswin/eic770x.o\n+platform-objs-$(CONFIG_PLATFORM_ESWIN_EIC770X) += eswin/hfp.o\n endif\ndiff --git a/platform/generic/include/eswin/eic770x.h b/platform/generic/include/eswin/eic770x.h\nindex b1994669..67764ec0 100644\n--- a/platform/generic/include/eswin/eic770x.h\n+++ b/platform/generic/include/eswin/eic770x.h\n@@ -48,7 +48,16 @@ struct eic770x_board_override {\n #define EIC770X_SYSPORT_SIZE\t0x20000000UL\n #define EIC770X_SYSPORT_BASE(d)\t(0x40000000UL + EIC770X_SYSPORT_SIZE * (d))\n #define EIC770X_SYSPORT_LOCAL\tEIC770X_SYSPORT_BASE(current_hart_die())\n+\n+#define EIC770X_UART0\t\t(EIC770X_SYSPORT_LOCAL + 0x10900000UL)\n+#define EIC770X_UART_SIZE\t0x10000UL\n+#define EIC770X_UART(x)\t\t(EIC770X_UART0 + EIC770X_UART_SIZE * (x))\n+#define EIC770X_UART_REG_SHIFT\t2\n+#define EIC770X_UART_REG_WIDTH\t4\n+\n #define EIC770X_SYSCRG\t\t(EIC770X_SYSPORT_LOCAL + 0x11828000UL)\n+#define EIC770X_SYSCRG_LSPCLK0\t(EIC770X_SYSCRG + 0x200UL)\n+#define EIC770X_SYSCRG_SYSCLK\t(EIC770X_SYSCRG + 0x20cUL)\n #define EIC770X_SYSCRG_RST\t(EIC770X_SYSCRG + 0x300UL)\n #define EIC770X_SYSCRG_RST_VAL\t0x1AC0FFE6UL\n \n@@ -76,4 +85,17 @@ struct eic770x_board_override {\n #define EIC770X_TO_UNCACHED(x)\t((x) - EIC770X_CACHED_BASE + \\\n \t\t\t\tEIC770X_UNCACHED_BASE)\n \n+/* Clock definitions */\n+#define EIC770X_XTAL_CLK_RATE\t24000000UL\n+#define EIC770X_SPLL0_OUT1_RATE\t1600000000UL\n+#define EIC770X_SPLL0_OUT2_RATE\t800000000UL\n+#define EIC770X_SPLL0_OUT3_RATE\t400000000UL\n+#define EIC770X_UART_CLK_BIT(x)\t(1UL << ((x) + 17))\n+#define EIC770X_SYSCLK_SEL(x)\t((x) & 1)\n+#define EIC770X_SYSCLK_DIV(x) \t\t\t\t\\\n+\t({ \t\t\t\t\t\t\\\n+\t\tuint32_t divisor = ((x) >> 4) & 7; \t\\\n+\t\tdivisor > 2 ? divisor : 2; \t\t\\\n+\t})\n+\n #endif\ndiff --git a/platform/generic/include/eswin/hfp.h b/platform/generic/include/eswin/hfp.h\nnew file mode 100644\nindex 00000000..6ed1b568\n--- /dev/null\n+++ b/platform/generic/include/eswin/hfp.h\n@@ -0,0 +1,64 @@\n+// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause\n+/*\n+ * Copyright (c) 2024 Beijing ESWIN Computing Technology Co., Ltd.\n+ *\n+ * Authors:\n+ * Lin Min <linmin@eswincomputing.com>\n+ * Bo Gan <ganboing@gmail.com>\n+ *\n+ * Adapted from Core/Inc/hf_common.h from ESWIN's Hifive Premier P550\n+ * onboard BMC (MCU) source repo:\n+ * https://github.com/eswincomputing/hifive-premier-p550-mcu-patches.git\n+ *\n+ */\n+\n+#ifndef __ESWIN_HFP_H__\n+#define __ESWIN_HFP_H__\n+\n+#include <sbi/sbi_types.h>\n+\n+enum hfp_bmc_msg {\n+\tHFP_MSG_REQUEST = 1,\n+\tHFP_MSG_REPLY,\n+\tHFP_MSG_NOTIFY,\n+};\n+\n+enum hfp_bmc_cmd {\n+\tHFP_CMD_POWER_OFF = 1,\n+\tHFP_CMD_REBOOT,\n+\tHFP_CMD_READ_BOARD_INFO,\n+\tHFP_CMD_CONTROL_LED,\n+\tHFP_CMD_PVT_INFO,\n+\tHFP_CMD_BOARD_STATUS,\n+\tHFP_CMD_POWER_INFO,\n+\tHFP_CMD_RESTART, // cold reboot with power off/on\n+};\n+\n+#define MAGIC_HEADER\t0xA55AAA55\n+#define MAGIC_TAIL\t0xBDBABDBA\n+\n+struct hfp_bmc_message {\n+\tuint32_t header_magic;\n+\tuint32_t task_id;\n+\tuint8_t type;\n+\tuint8_t cmd;\n+\tuint8_t result;\n+\tuint8_t data_len;\n+\tuint8_t data[250];\n+\tuint8_t checksum;\n+\tuint32_t tail_magic;\n+} __packed;\n+\n+static inline void hfp_bmc_checksum_msg(struct hfp_bmc_message *msg)\n+{\n+\tmsg->checksum = 0;\n+\tmsg->checksum ^= msg->type;\n+\tmsg->checksum ^= msg->cmd;\n+\tmsg->checksum ^= msg->data_len;\n+\tfor (uint8_t i = 0; i != msg->data_len; i++)\n+\t\tmsg->checksum ^= msg->data[i];\n+}\n+\n+extern const struct eic770x_board_override hfp_override;\n+\n+#endif\n", "prefixes": [ "v6", "7/7" ] }