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GET /api/1.0/patches/2175493/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2175493,
    "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175493/?format=api",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/1.0/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null
    },
    "msgid": "<20251218-gicv5-host-acpi-v2-4-eec76cd1d40b@kernel.org>",
    "date": "2025-12-18T10:14:30",
    "name": "[v2,4/7] PCI/MSI: Make the pci_msi_map_rid_ctlr_node() interface firmware agnostic",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "87b78638973068f3aa037031a1c38800ad05b7c1",
    "submitter": {
        "id": 84664,
        "url": "http://patchwork.ozlabs.org/api/1.0/people/84664/?format=api",
        "name": "Lorenzo Pieralisi",
        "email": "lpieralisi@kernel.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20251218-gicv5-host-acpi-v2-4-eec76cd1d40b@kernel.org/mbox/",
    "series": [
        {
            "id": 485814,
            "url": "http://patchwork.ozlabs.org/api/1.0/series/485814/?format=api",
            "date": "2025-12-18T10:14:26",
            "name": "irqchip/gic-v5: Code first ACPI boot support",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/485814/mbox/"
        }
    ],
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2175493/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "\n <linux-pci+bounces-43277-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-pci@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=QB+UdsyI;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-43277-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
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            "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"
        ],
        "Received": [
            "from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4dX69j4MFtz1y2f\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 18 Dec 2025 21:20:09 +1100 (AEDT)",
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            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id BB4AA33D6E6;\n\tThu, 18 Dec 2025 10:15:24 +0000 (UTC)",
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        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1766052924; cv=none;\n b=VYjKKL1IQqoA4wwdd8SDXHOq7vs7eLJoWEPiGSY9B2ZcyA4EwVtLike6suLOtrUJWJVMwLMFvy54zmIHYtjNu6J2Pdb6Nr9pK+WsTj2bhhXnXBVJbed8FvveQ53bvboODrX7Ne8IQJ7MVz3jBsSgtX7ahe1eT10snCxayhRrVzA=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1766052924; c=relaxed/simple;\n\tbh=Bi06CETWErknBAzyqJH7s43TP+l23Kbig0ziz2gkwNU=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=bIFMbMJU9Mm0WIiWbDG/TAU/qV/4CGNhLyQzxGFYmnMSRS6nL56QiWMtTenLTeHmcSENTpdOlmzbZX/9cm1Hy/ChJTK14VANxWCSvHEPcTu0SJPOEScy2Qvc1YuiCPAWyGZyvMwx7a4MbrUQ7oOEoZS3UrRWLxLXunNVEx1Y/DQ=",
        "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=QB+UdsyI; arc=none smtp.client-ip=10.30.226.201",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1766052924;\n\tbh=Bi06CETWErknBAzyqJH7s43TP+l23Kbig0ziz2gkwNU=;\n\th=From:Date:Subject:References:In-Reply-To:To:Cc:From;\n\tb=QB+UdsyIWZOBLCFUBrvizDmKa5ET0ysK+9tr1s0TINduJaM24v9JNd30p05Ih1cIR\n\t 93AjPtXllVB4MfHolIfqz4asfZXcClFuPr6+HujwlDuxPX4MrWPiGmAyCSSoybzbuZ\n\t iaCo94FEMxrgCCpQfCI0Uxe8ltzb2yTjNfZer4OqdEuZcJqlVCObW34FO/YpJtbQO/\n\t wKOZs9afgWx+Rmi7q2HfRfnBwct+whVGPVLHhe2RkY3hbbrgGrszH3pkK8P9W7grvh\n\t n3DilzA+G72OmvCuBihXhVDNB3rMOoDXrWlyoqgaDStzIT3Nms+jflJTSjdw8+IXa0\n\t +TGNwszGlPDzg==",
        "From": "Lorenzo Pieralisi <lpieralisi@kernel.org>",
        "Date": "Thu, 18 Dec 2025 11:14:30 +0100",
        "Subject": "[PATCH v2 4/7] PCI/MSI: Make the pci_msi_map_rid_ctlr_node()\n interface firmware agnostic",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-pci@vger.kernel.org",
        "List-Id": "<linux-pci.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=\"utf-8\"",
        "Content-Transfer-Encoding": "7bit",
        "Message-Id": "<20251218-gicv5-host-acpi-v2-4-eec76cd1d40b@kernel.org>",
        "References": "<20251218-gicv5-host-acpi-v2-0-eec76cd1d40b@kernel.org>",
        "In-Reply-To": "<20251218-gicv5-host-acpi-v2-0-eec76cd1d40b@kernel.org>",
        "To": "\"Rafael J. Wysocki\" <rafael@kernel.org>, Len Brown <lenb@kernel.org>,\n Robert Moore <robert.moore@intel.com>, Thomas Gleixner <tglx@linutronix.de>,\n Hanjun Guo <guohanjun@huawei.com>, Sudeep Holla <sudeep.holla@arm.com>,\n Marc Zyngier <maz@kernel.org>, Bjorn Helgaas <bhelgaas@google.com>",
        "Cc": "linux-acpi@vger.kernel.org, acpica-devel@lists.linux.dev,\n linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n linux-pci@vger.kernel.org, Lorenzo Pieralisi <lpieralisi@kernel.org>",
        "X-Mailer": "b4 0.14.3"
    },
    "content": "To support booting with OF and ACPI seamlessly, GIC ITS parent code\nrequires the PCI/MSI irqdomain layer to implement a function to retrieve\nan MSI controller fwnode and map an RID in a firmware agnostic way\n(ie pci_msi_map_rid_ctlr_node()).\n\nConvert pci_msi_map_rid_ctlr_node() to an OF agnostic interface\n(fwnode_handle based) and update the GIC ITS MSI parent code to reflect\nthe pci_msi_map_rid_ctlr_node() change.\n\nSigned-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Bjorn Helgaas <bhelgaas@google.com>\nCc: Marc Zyngier <maz@kernel.org>\n---\n drivers/irqchip/irq-gic-its-msi-parent.c |  8 ++++----\n drivers/pci/msi/irqdomain.c              | 22 +++++++++++++++++-----\n include/linux/msi.h                      |  3 ++-\n 3 files changed, 23 insertions(+), 10 deletions(-)",
    "diff": "diff --git a/drivers/irqchip/irq-gic-its-msi-parent.c b/drivers/irqchip/irq-gic-its-msi-parent.c\nindex 12f45228c867..4d1ad1ee005d 100644\n--- a/drivers/irqchip/irq-gic-its-msi-parent.c\n+++ b/drivers/irqchip/irq-gic-its-msi-parent.c\n@@ -104,7 +104,7 @@ static int its_pci_msi_prepare(struct irq_domain *domain, struct device *dev,\n static int its_v5_pci_msi_prepare(struct irq_domain *domain, struct device *dev,\n \t\t\t\t  int nvec, msi_alloc_info_t *info)\n {\n-\tstruct device_node *msi_node = NULL;\n+\tstruct fwnode_handle *msi_node = NULL;\n \tstruct msi_domain_info *msi_info;\n \tstruct pci_dev *pdev;\n \tphys_addr_t pa;\n@@ -116,15 +116,15 @@ static int its_v5_pci_msi_prepare(struct irq_domain *domain, struct device *dev,\n \n \tpdev = to_pci_dev(dev);\n \n-\trid = pci_msi_map_rid_ctlr_node(pdev, &msi_node);\n+\trid = pci_msi_map_rid_ctlr_node(domain->parent, pdev, &msi_node);\n \tif (!msi_node)\n \t\treturn -ENODEV;\n \n-\tret = its_translate_frame_address(msi_node, &pa);\n+\tret = its_translate_frame_address(to_of_node(msi_node), &pa);\n \tif (ret)\n \t\treturn -ENODEV;\n \n-\tof_node_put(msi_node);\n+\tfwnode_handle_put(msi_node);\n \n \t/* ITS specific DeviceID */\n \tinfo->scratchpad[0].ul = rid;\ndiff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c\nindex a329060287b5..3136341e802c 100644\n--- a/drivers/pci/msi/irqdomain.c\n+++ b/drivers/pci/msi/irqdomain.c\n@@ -376,23 +376,35 @@ u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev)\n }\n \n /**\n- * pci_msi_map_rid_ctlr_node - Get the MSI controller node and MSI requester id (RID)\n+ * pci_msi_map_rid_ctlr_node - Get the MSI controller fwnode_handle and MSI requester id (RID)\n+ * @domain:\tThe interrupt domain\n  * @pdev:\tThe PCI device\n- * @node:\tPointer to store the MSI controller device node\n+ * @node:\tPointer to store the MSI controller fwnode_handle\n  *\n- * Use the firmware data to find the MSI controller node for @pdev.\n+ * Use the firmware data to find the MSI controller fwnode_handle for @pdev.\n  * If found map the RID and initialize @node with it. @node value must\n  * be set to NULL on entry.\n  *\n  * Returns: The RID.\n  */\n-u32 pci_msi_map_rid_ctlr_node(struct pci_dev *pdev, struct device_node **node)\n+u32 pci_msi_map_rid_ctlr_node(struct irq_domain *domain, struct pci_dev *pdev,\n+\t\t\t      struct fwnode_handle **node)\n {\n+\tstruct device_node *of_node;\n \tu32 rid = pci_dev_id(pdev);\n \n \tpci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);\n \n-\treturn of_msi_xlate(&pdev->dev, node, rid);\n+\tof_node = irq_domain_get_of_node(domain);\n+\tif (of_node) {\n+\t\tstruct device_node *msi_ctlr_node = NULL;\n+\n+\t\trid = of_msi_xlate(&pdev->dev, &msi_ctlr_node, rid);\n+\t\tif (msi_ctlr_node)\n+\t\t\t*node = of_fwnode_handle(msi_ctlr_node);\n+\t}\n+\n+\treturn rid;\n }\n \n /**\ndiff --git a/include/linux/msi.h b/include/linux/msi.h\nindex 8003e3218c46..8ddb05d5c96a 100644\n--- a/include/linux/msi.h\n+++ b/include/linux/msi.h\n@@ -702,7 +702,8 @@ void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);\n void pci_msi_mask_irq(struct irq_data *data);\n void pci_msi_unmask_irq(struct irq_data *data);\n u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);\n-u32 pci_msi_map_rid_ctlr_node(struct pci_dev *pdev, struct device_node **node);\n+u32 pci_msi_map_rid_ctlr_node(struct irq_domain *domain, struct pci_dev *pdev,\n+\t\t\t      struct fwnode_handle **node);\n struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);\n void pci_msix_prepare_desc(struct irq_domain *domain, msi_alloc_info_t *arg,\n \t\t\t   struct msi_desc *desc);\n",
    "prefixes": [
        "v2",
        "4/7"
    ]
}