Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.0/patches/2175422/?format=api
{ "id": 2175422, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175422/?format=api", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.0/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20251218061557.1999367-2-varadarajan.narayanan@oss.qualcomm.com>", "date": "2025-12-18T06:15:52", "name": "[RESEND,v2,1/6] clk/qcom: Add USB related clocks for IPQ9574", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "57b7780056633d614f81f145d56120ad66586f60", "submitter": { "id": 92283, "url": "http://patchwork.ozlabs.org/api/1.0/people/92283/?format=api", "name": "Varadarajan Narayanan", "email": "varadarajan.narayanan@oss.qualcomm.com" }, "delegate": { "id": 151538, "url": "http://patchwork.ozlabs.org/api/1.0/users/151538/?format=api", "username": "kcxt", "first_name": "Casey", "last_name": "Connolly", "email": "casey.connolly@linaro.org" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20251218061557.1999367-2-varadarajan.narayanan@oss.qualcomm.com/mbox/", "series": [ { "id": 485788, "url": "http://patchwork.ozlabs.org/api/1.0/series/485788/?format=api", "date": "2025-12-18T06:15:51", "name": "Enable fastboot support for IPQ9574 based boards", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/485788/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2175422/checks/", "tags": {}, "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=HBS/dSTC;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=Acs5jc4z;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=oss.qualcomm.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"HBS/dSTC\";\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"Acs5jc4z\";\n\tdkim-atps=neutral", "phobos.denx.de; dmarc=none (p=none dis=none)\n header.from=oss.qualcomm.com", "phobos.denx.de; spf=pass\n smtp.mailfrom=varadarajan.narayanan@oss.qualcomm.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4dX0mW0lctz1y3k\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 18 Dec 2025 17:16:27 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id D3C0B83C54;\n\tThu, 18 Dec 2025 07:16:18 +0100 (CET)", "by phobos.denx.de (Postfix, from userid 109)\n id 9EB6E83C8C; Thu, 18 Dec 2025 07:16:17 +0100 (CET)", "from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com\n [205.220.168.131])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 5815D83B55\n for <u-boot@lists.denx.de>; Thu, 18 Dec 2025 07:16:15 +0100 (CET)", "from pps.filterd (m0279866.ppops.net [127.0.0.1])\n by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 5BI1YiO53717103\n for <u-boot@lists.denx.de>; Thu, 18 Dec 2025 06:16:13 GMT", "from mail-pg1-f199.google.com (mail-pg1-f199.google.com\n [209.85.215.199])\n by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4b40n79yb4-1\n (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n for <u-boot@lists.denx.de>; Thu, 18 Dec 2025 06:16:13 +0000 (GMT)", "by mail-pg1-f199.google.com with SMTP id\n 41be03b00d2f7-b993eb2701bso353573a12.0\n for <u-boot@lists.denx.de>; Wed, 17 Dec 2025 22:16:13 -0800 (PST)", "from hu-varada-blr.qualcomm.com\n (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. [103.229.18.19])\n by smtp.gmail.com with ESMTPSA id\n 41be03b00d2f7-c1d2fa228b5sm1198995a12.18.2025.12.17.22.16.08\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 17 Dec 2025 22:16:11 -0800 (PST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED,\n RCVD_IN_VALIDITY_RPBL_BLOCKED,RCVD_IN_VALIDITY_SAFE_BLOCKED,\n SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2", "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n content-transfer-encoding:date:from:in-reply-to:message-id\n :mime-version:references:subject:to; s=qcppdkim1; bh=FUlB4ggavQv\n 7d+/MWOxCmq31vHT/VJEabCgfxQ3qG90=; b=HBS/dSTCexzKBg58TvMB3fGwLXm\n vk4fwE1jLCnl3F0rr9s3DCT0fx86eRc1CLSfWfakMhgu9/VxQaRSRavWVMddAQW8\n uMmeqd6mloIxHx2TVxMI3bnqV4uYWqY1TTld1C5HUr7izSknqMhShghnRXjmBGz8\n nmHSut144xAhZlGpMdbcodY3cPOjBwIw5X5qetMfZfcErHPBqA9w5Odo+Lx+3EOV\n GHmnG0A2VX6xJIGSLCMmNIm0cxiOu6L2G5ZA3FdgSq2cNYVXmjn37H0ZMqKIpj+a\n gDhdJ3viLd+sFnVZ86DMD/grqA5Aghax4s6WU3RpO/6giDFuGLyIaKjS5Ow==", "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=oss.qualcomm.com; s=google; t=1766038573; x=1766643373; darn=lists.denx.de;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:to:from:from:to:cc:subject:date:message-id\n :reply-to; bh=FUlB4ggavQv7d+/MWOxCmq31vHT/VJEabCgfxQ3qG90=;\n b=Acs5jc4zk+OpM+v3eTSMXWjwX89NO2/vtEgMfpDpJ6+TYlh8brtAQ/kjluPtNUekGz\n Sa0xeBE/FmF6QbTwQmGDQPXPJQeC1PnldbZwgVtpM+ODUzXnyHj7p0asEmFh9HtmkAaH\n rjufgT+hE+YqzRerrt/wNgf2yxa6ZE5sQq8DoPWmzJnTabtY7bhPew8N9fkwaUPDfswf\n MeEdvxulaXhJvv3CMBuVYWedCJOBnnWkBpIDLudrFE6+2xAzf1kO4+0VbL1afy09Zz/W\n Yt3JrIsPitwVtcaNvNiUu9GKJjYaElZ8N1ReZMt3m/JaWWfaKUxo70kSvodcW3MzFdBr\n TVNQ==" ], "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20230601; t=1766038573; x=1766643373;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to\n :cc:subject:date:message-id:reply-to;\n bh=FUlB4ggavQv7d+/MWOxCmq31vHT/VJEabCgfxQ3qG90=;\n b=jGFFMJVTkmMwQzONZ3cVBVEeppHr+f4ThAx6L1qtrrlkPJVrZYup2PdW7DiH/sfrBN\n oK7vvPMuzLy0R4OEAXsNzxy43g3v9a7SAIbkchiAu+lUyTp0oUd0VQXt1q0CR5jtyWe/\n WebnVOD8iA15j6o+VJmgMGMrm14DvcyfcDEqXP1GOhlYXXjgTYj7jW1lX59GVl4Cc1uK\n Gkf95Ge8ZSExa8AsE0Uy0DaHYmB6pC2RAX7ZL+tNLBhZj0gnObHwkEcSYnFFnSjN916g\n yu1UQ/hb2Pk348QXHRIx4fM4IwnS1KGIexB6X0pb3CZDTIj8dUQTtDWZr1C5+5oD4AMQ\n r4bw==", "X-Forwarded-Encrypted": "i=1;\n AJvYcCXHO4guTIvU3/Xkz8yuR7csfYNlwl4VycBebyKONXJKVoBQjZN/14nSFaGp/EzFbKDfj9b2USw=@lists.denx.de", "X-Gm-Message-State": "AOJu0YxfzXI6pdxBgqBthuiKSVk4ldX0MZxoyqPLDVsVc5aVr2nQ2FR3\n TOLMhMpsbtOgG87hJv2gMARhfUauRF3FUm5nTTOrs/Z2hhxwdu8rO471HTnht5JkNzRGPuRVN7O\n g6SWAPeNm76bGvxipHf6v553c53wMcTmoI5PuF2ou+5hx48NE82vPNJOW", "X-Gm-Gg": "AY/fxX48yk39pSXZAf58UFFkBzHPt1eu93Vx2njyXoxTa5Us6J4Hl/ufIv5p6kXhSbY\n 7o8qwH6wS/xeyWNQ8pZRd9AsOntSNYHYpnum0jGRkKfn67kgqCdRlVY+Vwmla27952jujmGcThz\n vDAduhFw8ZZa++/zw1wsjseYbgJf347oTOBRmqTANvFaYH1+A6OhIVQcJOaW3Pg4fFZbtteUKdN\n m0WFDg/G2z3BYaU65WB14oOXYkEsqq2otR3hMll+FXrBRGNH50VD7ZPxF0vwYjm1wbtcY/d4NV4\n /8ymn8JmMDege2D8+wgaUhzrcKQrPCAkAj74or/ndXhoG6PRR8LM/hyu06tqoRXbHTfUnwxmICc\n FDWtAFI7rribxIQfWk1o8KERMDmGgocnhRtdyXAosqlFczJdeOMn7A8RJjuK9AVDMm9yhQrsLz6\n WZjAuy2yHtq7Pk9DSGs0oIQbahLjkUR/ehwruZYFo=", "X-Received": [ "by 2002:a05:6a20:548d:b0:34e:cc0a:40b2 with SMTP id\n adf61e73a8af0-369adfb4e79mr19976215637.30.1766038572700;\n Wed, 17 Dec 2025 22:16:12 -0800 (PST)", "by 2002:a05:6a20:548d:b0:34e:cc0a:40b2 with SMTP id\n adf61e73a8af0-369adfb4e79mr19976190637.30.1766038572214;\n Wed, 17 Dec 2025 22:16:12 -0800 (PST)" ], "X-Google-Smtp-Source": "\n AGHT+IHRAkACv8qlzcqCARPxEOj6QTDQD1cRXrmSQOEJyTy0NoHogxE/72Q0B4SptyWR3tlInsDwmw==", "From": "Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>", "To": "trini@konsulko.com, casey.connolly@linaro.org, neil.armstrong@linaro.org,\n sumit.garg@kernel.org, peng.fan@nxp.com, jh80.chung@samsung.com,\n lukma@denx.de, varadarajan.narayanan@oss.qualcomm.com,\n marek.vasut+renesas@mailbox.org, michal.simek@amd.com,\n alexeymin@postmarketos.org, u-boot@lists.denx.de, u-boot-qcom@groups.io", "Subject": "[RESEND v2 1/6] clk/qcom: Add USB related clocks for IPQ9574", "Date": "Thu, 18 Dec 2025 11:45:52 +0530", "Message-Id": "<20251218061557.1999367-2-varadarajan.narayanan@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20251218061557.1999367-1-varadarajan.narayanan@oss.qualcomm.com>", "References": "<20251218061557.1999367-1-varadarajan.narayanan@oss.qualcomm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Proofpoint-GUID": "bJ0FVfpgbDPbjHbI1mklkXi9192_mWcz", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjUxMjE4MDA0OSBTYWx0ZWRfX0K7t5G7V18EI\n DordHmTWtp8jp7IxCcGil/wMYkeZmgf1aHEpvMQy+W0GO60etzCUSFScOw1vfDC33ym347STuTm\n g/1yUKNrFqEjr/dxmQMGh0LoPvtb/gOXiwuN59fgHNhEAv/9dcRZEjoRdtjIHqp3Cz68CWt3LWp\n s6cfYZ7ljWlEXDEI077YVV8nkOlgb8CcWNLl+p5NaqUpu36XQvN6LqbhLBQ+YQtDS+zplIGka0C\n +X4PBwqaDY5Y4dBE5+jhnoDzYN7rqC3H4satKGawDMeGJfC7xxqFrXWytHImJSz2JuR+odLFW/9\n hi3793dWgkvqhWNTALyY7ksJ7OvdYRk9QLkY5Ok/j1jxcgkZD2DWc5OIN4Vbr81GsaelmHSQE+Z\n cB8WddlIwuweKxXEepMk0hv67AEVQw==", "X-Authority-Analysis": "v=2.4 cv=TZebdBQh c=1 sm=1 tr=0 ts=69439c2d cx=c_pps\n a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17\n a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=EUspDBNiAAAA:8 a=fbqHkSEcfmD6VvpdCmIA:9 a=_Vgx9l1VpLgwpw_dHYaR:22", "X-Proofpoint-ORIG-GUID": "bJ0FVfpgbDPbjHbI1mklkXi9192_mWcz", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49\n definitions=2025-12-18_01,2025-12-17_02,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n suspectscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0\n spamscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 adultscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512180049", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Add the USB controller and phy related clocks.\n\nSigned-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>\n---\n drivers/clk/qcom/clock-ipq9574.c | 28 ++++++++++++++++++++++++++++\n 1 file changed, 28 insertions(+)", "diff": "diff --git a/drivers/clk/qcom/clock-ipq9574.c b/drivers/clk/qcom/clock-ipq9574.c\nindex b0af4036059..1f5146b29a1 100644\n--- a/drivers/clk/qcom/clock-ipq9574.c\n+++ b/drivers/clk/qcom/clock-ipq9574.c\n@@ -25,6 +25,9 @@\n #define GCC_SDCC1_AHB_CBCR\t\t\t0x33034\n #define GCC_SDCC1_APPS_CMD_RCGR\t\t\t0x33004\n #define GCC_SDCC1_ICE_CORE_CBCR\t\t\t0x33030\n+#define GCC_USB0_MASTER_CMD_RCGR\t\t0x2c004\n+#define GCC_USB0_MOCK_UTMI_CMD_RCGR\t\t0x2c02c\n+#define GCC_USB0_AUX_CMD_RCGR\t\t\t0x2C018\n \n static ulong ipq9574_set_rate(struct clk *clk, ulong rate)\n {\n@@ -39,6 +42,17 @@ static ulong ipq9574_set_rate(struct clk *clk, ulong rate)\n \t\tclk_rcg_set_rate_mnd(priv->base, GCC_SDCC1_APPS_CMD_RCGR,\n \t\t\t\t 11, 0, 0, CFG_CLK_SRC_GPLL2, 16);\n \t\treturn rate;\n+\tcase GCC_USB0_MASTER_CLK:\n+\t\tclk_rcg_set_rate(priv->base, GCC_USB0_MASTER_CMD_RCGR,\n+\t\t\t\t 4, CFG_CLK_SRC_GPLL0);\n+\t\treturn rate;\n+\tcase GCC_USB0_MOCK_UTMI_CLK:\n+\t\tclk_rcg_set_rate_mnd(priv->base, GCC_USB0_MOCK_UTMI_CMD_RCGR,\n+\t\t\t\t 0, 0, 0, CFG_CLK_SRC_CXO, 8);\n+\t\treturn rate;\n+\tcase GCC_USB0_AUX_CLK:\n+\t\tclk_rcg_set_rate_mnd(priv->base, GCC_USB0_AUX_CMD_RCGR, 0, 0, 0,\n+\t\t\t\t CFG_CLK_SRC_CXO, 8);\n \tdefault:\n \t\treturn -EINVAL;\n \t}\n@@ -50,6 +64,14 @@ static const struct gate_clk ipq9574_clks[] = {\n \tGATE_CLK(GCC_SDCC1_AHB_CLK,\t\t0x33034, 0x00000001),\n \tGATE_CLK(GCC_SDCC1_APPS_CLK,\t\t0x3302C, 0x00000001),\n \tGATE_CLK(GCC_SDCC1_ICE_CORE_CLK,\t0x33030, 0x00000001),\n+\tGATE_CLK(GCC_SNOC_USB_CLK,\t\t0x2e058, 0x00000001),\n+\tGATE_CLK(GCC_USB0_MASTER_CLK,\t\t0x2c044, 0x00000001),\n+\tGATE_CLK(GCC_ANOC_USB_AXI_CLK,\t\t0x2e084, 0x00000001),\n+\tGATE_CLK(GCC_USB0_SLEEP_CLK,\t\t0x2c058, 0x00000001),\n+\tGATE_CLK(GCC_USB0_MOCK_UTMI_CLK,\t0x2c04c, 0x00000001),\n+\tGATE_CLK(GCC_USB0_PHY_CFG_AHB_CLK,\t0x2c05c, 0x00000001),\n+\tGATE_CLK(GCC_USB0_AUX_CLK,\t\t0x2c048, 0x00000001),\n+\tGATE_CLK(GCC_USB0_PIPE_CLK,\t\t0x2c054, 0x00000001),\n };\n \n static int ipq9574_enable(struct clk *clk)\n@@ -67,6 +89,10 @@ static int ipq9574_enable(struct clk *clk)\n }\n \n static const struct qcom_reset_map ipq9574_gcc_resets[] = {\n+\t[GCC_USB_BCR] = { 0x2c000 },\n+\t[GCC_QUSB2_0_PHY_BCR] = { 0x2c068 },\n+\t[GCC_USB0_PHY_BCR] = {0x2c06c, 0},\n+\t[GCC_USB3PHY_0_PHY_BCR] = {0x2c070, 0},\n \t[GCC_SDCC_BCR] = { 0x33000 },\n };\n \n@@ -75,6 +101,8 @@ static struct msm_clk_data ipq9574_gcc_data = {\n \t.num_resets = ARRAY_SIZE(ipq9574_gcc_resets),\n \t.enable = ipq9574_enable,\n \t.set_rate = ipq9574_set_rate,\n+\t.clks = ipq9574_clks,\n+\t.num_clks = ARRAY_SIZE(ipq9574_clks),\n };\n \n static const struct udevice_id gcc_ipq9574_of_match[] = {\n", "prefixes": [ "RESEND", "v2", "1/6" ] }