get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/1.0/patches/2175275/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2175275,
    "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175275/?format=api",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/1.0/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null
    },
    "msgid": "<20251217151609.3162665-28-den@valinux.co.jp>",
    "date": "2025-12-17T15:16:01",
    "name": "[RFC,v3,27/35] NTB: epf: Provide db_vector_count/db_vector_mask callbacks",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "1721de000578f81354d587fa414bf102a510ee9f",
    "submitter": {
        "id": 91573,
        "url": "http://patchwork.ozlabs.org/api/1.0/people/91573/?format=api",
        "name": "Koichiro Den",
        "email": "den@valinux.co.jp"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20251217151609.3162665-28-den@valinux.co.jp/mbox/",
    "series": [
        {
            "id": 485709,
            "url": "http://patchwork.ozlabs.org/api/1.0/series/485709/?format=api",
            "date": "2025-12-17T15:15:53",
            "name": "NTB transport backed by endpoint DW eDMA",
            "version": 3,
            "mbox": "http://patchwork.ozlabs.org/series/485709/mbox/"
        }
    ],
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2175275/checks/",
    "tags": {},
    "headers": {
        "Return-Path": "\n <linux-pci+bounces-43227-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-pci@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=valinux.co.jp header.i=@valinux.co.jp\n header.a=rsa-sha256 header.s=selector1 header.b=Gc9MiSa2;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-43227-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
            "smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=valinux.co.jp header.i=@valinux.co.jp\n header.b=\"Gc9MiSa2\"",
            "smtp.subspace.kernel.org;\n arc=fail smtp.client-ip=52.101.229.24",
            "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=valinux.co.jp",
            "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=valinux.co.jp",
            "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=valinux.co.jp;"
        ],
        "Received": [
            "from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4dWg5D3CMbz1y0P\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 18 Dec 2025 03:59:44 +1100 (AEDT)",
            "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id DD64B305DED7\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 17 Dec 2025 16:54:17 +0000 (UTC)",
            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 682242248A4;\n\tWed, 17 Dec 2025 16:51:29 +0000 (UTC)",
            "from TY3P286CU002.outbound.protection.outlook.com\n (mail-japaneastazon11010024.outbound.protection.outlook.com [52.101.229.24])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 5622034C986;\n\tWed, 17 Dec 2025 16:51:23 +0000 (UTC)",
            "from TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:24c::11)\n by TYCP286MB2863.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:306::14) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9434.6; Wed, 17 Dec\n 2025 15:16:38 +0000",
            "from TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM\n ([fe80::fb7e:f4ed:a580:9d03]) by TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM\n ([fe80::fb7e:f4ed:a580:9d03%5]) with mapi id 15.20.9434.001; Wed, 17 Dec 2025\n 15:16:38 +0000"
        ],
        "ARC-Seal": [
            "i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1765990289; cv=fail;\n b=uH0IcDTdumiHbgmDMwkhZ5kJkIEU6LSD2paaaPXXWWfD6EyjD7UF97jKOqxhmR0UTKkd0b71fNSZDLDspP+XooJHlA9ZUZPUqK7jOVs4n3xBhYDUCID+kjVGAep6aOMTIZCbFRaVYE8e5xN/+RUG3LTjrPaVORrpZ/NFnEk9wtA=",
            "i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none;\n b=XHD8cods0irIIy09MyOugNPY6GA9FcP0QdcezMFDHXq1vQJH92IR7enu2LS8ywJvrlvhOGCS5WqIKAlIvubO7IeSLov79P3aujA1coLEpv/XqoPQam8XhMbjkO4ARM0G7Am6b7H4JRwNtyujTLs9wKS7xIfdfCo181a03A2v60V88crTJG5px/iR34Wv8X+/+MoD9Q/zmuVrTa3RTezXxnTkyB8VPt2qyeSiTHU5beFjqvS96mbs41Osmofv7bZOgnkwLrkhUtRZU3/7Xaru8J7+cVIsdIH1tj9tgP3HUphRNxdANWpqZI3upwgBd6Zp+LMN7nPG4njGdRB4Px5rjA=="
        ],
        "ARC-Message-Signature": [
            "i=2; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1765990289; c=relaxed/simple;\n\tbh=8/qQNmtlnXto+tyqn4YMVyv35slMxXS48SuROZp6/as=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t Content-Type:MIME-Version;\n b=IiopoQHnXqbQNrG9Xt+Uh2QD8ULd57jtMp2ipncHxs0F+UmIyXEtAm1suas1wWEFj4LrvSDsQt/Bq0Km2ufY5/SVJR9DnT4cuaQ5B3TYANmUQZ+72wFGyREGiqG7mQV4C+qFutfC2+kZMMJkc0ZGQIt4aq7ig+COY4j0uH0muk4=",
            "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector10001;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=CJyF2DKW5ad2jiOFfko7k3RP3AiZhrVA2ovXjyjQ77Q=;\n b=Q9ci9XPopzCU/+XuoWaG4fXNJMVa74UieTmoBrHZTxEd8645O4v1WjKm/AU4oYBx6ILC96MSAuJ2sVt7OouJeIgiubvwvaXGDVqXfKKEtI4yoUuesKxf70NG6KdBbTFMDXMHc+XHPP2GHE2OE5G+a63ZzyJob0Wz2ZsnEHsY6pM+L6w858TkFZDL2DJ9JB1LJxqhLml/tZZNjQsnICEu6+ZzN3ybiTMKdPavM+T9rVqd1pp24s3L2VKzc2Xayn4B7mkD15pbtHA2V7R0NjmOqWkfbT+p11W1P3BbIGqNF11JmmFIsucay/D4TR7J12lsTOyQC0glDJQlnI5oq9Kc6w=="
        ],
        "ARC-Authentication-Results": [
            "i=2; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=valinux.co.jp;\n spf=pass smtp.mailfrom=valinux.co.jp;\n dkim=pass (1024-bit key) header.d=valinux.co.jp header.i=@valinux.co.jp\n header.b=Gc9MiSa2; arc=fail smtp.client-ip=52.101.229.24",
            "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=valinux.co.jp; dmarc=pass action=none\n header.from=valinux.co.jp; dkim=pass header.d=valinux.co.jp; arc=none"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=valinux.co.jp;\n s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=CJyF2DKW5ad2jiOFfko7k3RP3AiZhrVA2ovXjyjQ77Q=;\n b=Gc9MiSa2Tfr+j3un14KOLs/L9hNedfzAOngxTmLXj82Cmld2fxFmt3kMnC83l3Tz/oAqphI3+MeYcLd2W/GK71nhCBv/EwKj4QjiyC8Wv4uUsCYOTFjwS5SrYrR/4zmV8Durj2s1JzAnA3XdrZ3NdZLNPaGnXYyIBcueC9FdiIA=",
        "From": "Koichiro Den <den@valinux.co.jp>",
        "To": "Frank.Li@nxp.com,\n\tdave.jiang@intel.com,\n\tntb@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tdmaengine@vger.kernel.org,\n\tlinux-renesas-soc@vger.kernel.org,\n\tnetdev@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org",
        "Cc": "mani@kernel.org,\n\tkwilczynski@kernel.org,\n\tkishon@kernel.org,\n\tbhelgaas@google.com,\n\tcorbet@lwn.net,\n\tgeert+renesas@glider.be,\n\tmagnus.damm@gmail.com,\n\trobh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tvkoul@kernel.org,\n\tjoro@8bytes.org,\n\twill@kernel.org,\n\trobin.murphy@arm.com,\n\tjdmason@kudzu.us,\n\tallenbh@gmail.com,\n\tandrew+netdev@lunn.ch,\n\tdavem@davemloft.net,\n\tedumazet@google.com,\n\tkuba@kernel.org,\n\tpabeni@redhat.com,\n\tBasavaraj.Natikar@amd.com,\n\tShyam-sundar.S-k@amd.com,\n\tkurt.schwemmer@microsemi.com,\n\tlogang@deltatee.com,\n\tjingoohan1@gmail.com,\n\tlpieralisi@kernel.org,\n\tutkarsh02t@gmail.com,\n\tjbrunet@baylibre.com,\n\tdlemoal@kernel.org,\n\tarnd@arndb.de,\n\telfring@users.sourceforge.net,\n\tden@valinux.co.jp",
        "Subject": "[RFC PATCH v3 27/35] NTB: epf: Provide db_vector_count/db_vector_mask\n callbacks",
        "Date": "Thu, 18 Dec 2025 00:16:01 +0900",
        "Message-ID": "<20251217151609.3162665-28-den@valinux.co.jp>",
        "X-Mailer": "git-send-email 2.51.0",
        "In-Reply-To": "<20251217151609.3162665-1-den@valinux.co.jp>",
        "References": "<20251217151609.3162665-1-den@valinux.co.jp>",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-ClientProxiedBy": "TYCP286CA0098.JPNP286.PROD.OUTLOOK.COM\n (2603:1096:400:2b4::19) To TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM\n (2603:1096:400:24c::11)",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-pci@vger.kernel.org",
        "List-Id": "<linux-pci.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "X-MS-PublicTrafficType": "Email",
        "X-MS-TrafficTypeDiagnostic": "TYWP286MB2697:EE_|TYCP286MB2863:EE_",
        "X-MS-Office365-Filtering-Correlation-Id": "bed16d64-fd65-4656-614a-08de3d7f4656",
        "X-MS-Exchange-SenderADCheck": "1",
        "X-MS-Exchange-AntiSpam-Relay": "0",
        "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|7416014|376014|10070799003|1800799024|366016;",
        "X-Microsoft-Antispam-Message-Info": "\n bxnUK0xs6gXzHDZs+BMj+kl3mVIJxFuJqyoW3wNLcrlIIz+m77IoWZYoKKOMYFBbJ0NPfhZcIk+LVbKCCBt2V/oEoavdvgnvk+X8NOn0su/Z4hMxr1hJT4XhcksdMwGwAARbMDvZyzlFIf+yZwUBwy0/RyS9hng1n8L1g7+DzASdQgt9NyTyFGhpoNKEkRHJqjWMcRHjNNFsaYEJU+Y8ESkR2xVZQsDjaFHnxf8yqaqy7PyIqIHeyVxW1M47zZ6JIFcPpyi27slQbOizQQHpFEE06spobLLSRGWWxgZI0bUt9iX7qOjAD4vYXsN78FpgPFNb4KJX3VWXwkA3mWUyh6VP441eVAlbcV057fosJUZi6uGrjaSjiiihIa5jNPiFVJbboyWs4QgCpURHTHyMzImDrxoWla0Y3ucHLn49CrVE868amXfIE7UNpqXsWWXEuHZ8n+O99pDyiJLDUqO0RLZOGOgCRVG//82/CF4CBUAeSjNb0kktPQkd5Q5F8E77kgqVONrHDsmYhwIHd59+FWgQYokIU0rx+slQePmFb4Y/zg1RBBM/anMP/5JE+s1iAs5XKnek09bvU0/fdYQD6mJUsoIJH+LnhUSfc0Y7oaXZPqZQLoSIAgHZlyNNPKUPp4SRM8+E6jt/2qi3w8fnR1RES0jBnhdgt7DttZHQ6BMWzPF5oW/aQCgYeT4PCL8J1WC5BZmJ+zt/ASDboiunxANPekXszQeHWNvityV1QejOnCVsUQV3VraoWLAFNVVqWvqeawouJLhzRJI2v4ek4QItFIW9xl5q4FMUCocsIJ3UXGyy7uO4kcLOF+lLhivQsf9WXS6yHnKboiQTEwsO+gUVCrcBrTJHVa1JXOfXMdmdDjFcnVPVJ4hC5jOBDbGKncAA7vJ5RSB6qEy0rv6cs5SqOhFv/pCvKFQ5/8iKo67lzd28pvkpA5rCRebUkRen0BvkIQKFb3fwitJP4x1KzC1vaN93o18TokhWRw7SID7Gj2Uta5YgQIsiyS+/lFgAzUWn04DqMVC1ggF32HSuDuwHNZIaiJxXiwbEvK9n1eoXh86O+4MvdCL+ji3txYmAF3B/T/VHFLJPZHXQ4J0yqtsUZc8LWOBB9zgv+GUZuXEynFoctx5ATDAavRmpoGMPdOE1qZVvvPhN6TkBcmfRnB/ZwcNs5wiNkABdxeh9msCTSKB/gDhw8kij7jQBYDjDt0RVwT2Z2ms0nPYHwxe7kTLYJoVqDW5PGV2+PnsWNpQqzWFJutpySc5e+o9FtyJj5hzKXn6wnV3xmSOIkBW0hmQA3kTGdHEIAf9BGNZkgqRAP1JOViHGZ7UaZbWFbHvFCSiGW4rNHHk0WbeGByyPM4W+dYlOGwOQ6kEmfD50uC0B3nJA4m+38O9bNSI0pwPmVqtM/kA+RDsZ2Os/WbTkSwvQEcPnIGd8Gnp/Iia+uwN1YNZmgL/e80sMP/RJCOqY",
        "X-Forefront-Antispam-Report": "\n\tCIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(7416014)(376014)(10070799003)(1800799024)(366016);DIR:OUT;SFP:1101;",
        "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1",
        "X-MS-Exchange-AntiSpam-MessageData-0": "\n FVV/dTVZFs/i686KLFGOiLpYbOhgHhBJBpswRdHSOsGWvloMFXam/6kakbEENfTD8aXX5rFT+GVKq8r+uFYP92st8F/08hPSlJJmfWMdXEVPhAIuhlSgaOkAKo7ToFaU2owSTe7sheFh7MqaMP8nsvGLQOCotUgh9U5r586zkFB93u+hfYdhAN6WR99SaDjt9uapWN/QgpVIM/hps0PDaW8iyUbN53m/jS7KebCQCypJoLb4W6ltQ6XOPb5e2s9erAC4g3RvDIx+HtUnmqcMi+HkBBfaCm+tDWmWK2v+TB/h3D4/zcyj07ykcvH45Qgm7t/yvmXxRJ6OG9lLcTcd0FVBFwYFBBMUw5q0HrjKrCDshhV3QvQ7YXCf18mw+qVr1KN0yitV5Lwf7Zlot+LiTLYJ1R/fXbTLxs3OHtTfXjxpkzr+4NouwM9FTy/rWavUI4O/qpOwuDU8U1sjUwMfswcpZpYpK2biNVzgK9vCI0fkaTG9MJhhYE6P3iNEeYgm12SzuEkHUgAdtPn62zhx8H03h7e2N5VHwS/49quqCEyRZdhD+hcv5XJKcOKio+cCwEf0OUl0+cM6onzSTD2zy7g7akHsMeDUuJrxGqcwc6F6/v8S43NbQUMxsIC7X++JHdyBhAcQhRngRiUIPeJd7b0podBQHsDKH0xNko6tEQaGxW/fHQJBvNQkYLsSx1W8Vegp0qqFfNshjSd33MnKmJ+zgUYRpve3SnXGE0HQUbXJlphy0SRxOlEwdrtHpACQ5L8qdydF9UKSYpk/oEtwGtG62Rg9EbBEgE+BxQYOjXBv7ZaoU1K8v+Gt4lnLSiiuzkjyphM9lDOVF5wX4wDgmWCVTztruhOFjnOkUyhvor91GnQEGtEnbaFJ+0c5WTBHg/zNlPQvsOLZO1H/DdJrUvupF50MiYxOG+A+f4Ne5xBggNYrxaznU2qVTSDddKnQImQ7zULa6/Thg6fmWipEz8qkDQn0MrNSwK2oO4VAPsvZKMog3/k+WBdl1R6yLRaKYNEhut1pO+cp2ibtU+G+Bv51C+Lzjj6oe45jOkmps9Qz3XF/4qgKcY0WWUraZJ5/G9hwUQYhXssLn88od9I5xhY3yR2lMK812+jck9gybomwNeTWCJUzqQJISHMQNC36HhNKVx41aSpl4CheKlC2gRuL3ZYcXM2aU+ub7tZV9j5878/Y1jXE/ZgPhE6o/LyDZGGuCAGouYL/R2usJcmtKW2JdTrso4eukQNJHHQ0+52GKQInui7YWlVJa11rolgEcLabnuMRKiemFXjDpBDH3czlyrNAs8l9EGU57HP5EkeDEpvLqElM0SaENgnOagtLh5qAFVhVG/o1UkNcTQuyP9JIX5e/ytTSPlCQM5wPLPCRuFvZDzcFZRs5BEylrAT0xTCKqhtNBcqPCeyYPKwah8fOhf0pJEMR/S9nXV/jY8h6uIVwaYlPaPtcqJCvi8yM2FVvgTpax07QLsFESzbBDbs3tYXsnjTs/PW9a9mzvbW11e2YRmjsBuszdkW1nbXnOqP725U4nR6O1heG6YilFltqauRBmA2R7JOoIUB74tOPKRXWaxiLZUZwVB7cdOefIHAXaTFp6+Ej3uoFtvQbYrONHuQ4U/aEpw64kEsyOC8=",
        "X-OriginatorOrg": "valinux.co.jp",
        "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n bed16d64-fd65-4656-614a-08de3d7f4656",
        "X-MS-Exchange-CrossTenant-AuthSource": "TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM",
        "X-MS-Exchange-CrossTenant-AuthAs": "Internal",
        "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "17 Dec 2025 15:16:38.4206\n (UTC)",
        "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted",
        "X-MS-Exchange-CrossTenant-Id": "7a57bee8-f73d-4c5f-a4f7-d72c91c8c111",
        "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED",
        "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n 2ohPDDGGsA3cX41B+LwtYzL59olKhS28UD7AIV1KW1Yj+CGL+ZiyzCcmDrDzIamGPZPOeo7NUOoQwJP00b1wZA==",
        "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "TYCP286MB2863"
    },
    "content": "Provide db_vector_count() and db_vector_mask() implementations for both\nntb_hw_epf and pci-epf-vntb so that ntb_transport can map MSI vectors to\ndoorbell bits. Without them, the upper layer cannot identify which\ndoorbell vector fired and ends up scheduling rxc_db_work() for all queue\npairs, resulting in a thundering-herd effect when multiple queue pairs\n(QPs) are enabled.\n\nWith this change, .peer_db_set() must honor the db_bits mask and raise\nall requested doorbell interrupts, so update those implementations\naccordingly.\n\nSigned-off-by: Koichiro Den <den@valinux.co.jp>\n---\n drivers/ntb/hw/epf/ntb_hw_epf.c               | 47 ++++++++++++-------\n drivers/pci/endpoint/functions/pci-epf-vntb.c | 40 +++++++++++++---\n 2 files changed, 63 insertions(+), 24 deletions(-)",
    "diff": "diff --git a/drivers/ntb/hw/epf/ntb_hw_epf.c b/drivers/ntb/hw/epf/ntb_hw_epf.c\nindex 4ecc6b2177b4..5303a8944019 100644\n--- a/drivers/ntb/hw/epf/ntb_hw_epf.c\n+++ b/drivers/ntb/hw/epf/ntb_hw_epf.c\n@@ -375,7 +375,7 @@ static int ntb_epf_init_isr(struct ntb_epf_dev *ndev, int msi_min, int msi_max)\n \t\t}\n \t}\n \n-\tndev->db_count = irq;\n+\tndev->db_count = irq - 1;\n \n \tret = ntb_epf_send_command(ndev, CMD_CONFIGURE_DOORBELL,\n \t\t\t\t   argument | irq);\n@@ -409,6 +409,22 @@ static u64 ntb_epf_db_valid_mask(struct ntb_dev *ntb)\n \treturn ntb_ndev(ntb)->db_valid_mask;\n }\n \n+static int ntb_epf_db_vector_count(struct ntb_dev *ntb)\n+{\n+\treturn ntb_ndev(ntb)->db_count;\n+}\n+\n+static u64 ntb_epf_db_vector_mask(struct ntb_dev *ntb, int db_vector)\n+{\n+\tstruct ntb_epf_dev *ndev = ntb_ndev(ntb);\n+\n+\tdb_vector--; /* vector 0 is reserved for link events */\n+\tif (db_vector < 0 || db_vector >= ndev->db_count)\n+\t\treturn 0;\n+\n+\treturn ndev->db_valid_mask & BIT_ULL(db_vector);\n+}\n+\n static int ntb_epf_db_set_mask(struct ntb_dev *ntb, u64 db_bits)\n {\n \treturn 0;\n@@ -492,26 +508,21 @@ static int ntb_epf_peer_mw_get_addr(struct ntb_dev *ntb, int idx,\n static int ntb_epf_peer_db_set(struct ntb_dev *ntb, u64 db_bits)\n {\n \tstruct ntb_epf_dev *ndev = ntb_ndev(ntb);\n-\tu32 interrupt_num = ffs(db_bits) + 1;\n-\tstruct device *dev = ndev->dev;\n+\tu32 interrupt_num;\n \tu32 db_entry_size;\n \tu32 db_offset;\n \tu32 db_data;\n-\n-\tif (interrupt_num >= ndev->db_count) {\n-\t\tdev_err(dev, \"DB interrupt %d greater than Max Supported %d\\n\",\n-\t\t\tinterrupt_num, ndev->db_count);\n-\t\treturn -EINVAL;\n-\t}\n+\tint i;\n \n \tdb_entry_size = readl(ndev->ctrl_reg + NTB_EPF_DB_ENTRY_SIZE);\n \n-\tdb_data = readl(ndev->ctrl_reg + NTB_EPF_DB_DATA(interrupt_num));\n-\tdb_offset = readl(ndev->ctrl_reg + NTB_EPF_DB_OFFSET(interrupt_num));\n-\n-\twritel(db_data, ndev->db_reg + (db_entry_size * interrupt_num) +\n-\t       db_offset);\n-\n+\tfor_each_set_bit(i, (unsigned long *)&db_bits, ndev->db_count) {\n+\t\tinterrupt_num = i + 1;\n+\t\tdb_data = readl(ndev->ctrl_reg + NTB_EPF_DB_DATA(interrupt_num));\n+\t\tdb_offset = readl(ndev->ctrl_reg + NTB_EPF_DB_OFFSET(interrupt_num));\n+\t\twritel(db_data, ndev->db_reg + (db_entry_size * interrupt_num) +\n+\t\t       db_offset);\n+\t}\n \treturn 0;\n }\n \n@@ -541,6 +552,8 @@ static const struct ntb_dev_ops ntb_epf_ops = {\n \t.spad_count\t\t= ntb_epf_spad_count,\n \t.peer_mw_count\t\t= ntb_epf_peer_mw_count,\n \t.db_valid_mask\t\t= ntb_epf_db_valid_mask,\n+\t.db_vector_count\t= ntb_epf_db_vector_count,\n+\t.db_vector_mask\t\t= ntb_epf_db_vector_mask,\n \t.db_set_mask\t\t= ntb_epf_db_set_mask,\n \t.mw_set_trans\t\t= ntb_epf_mw_set_trans,\n \t.mw_clear_trans\t\t= ntb_epf_mw_clear_trans,\n@@ -591,8 +604,8 @@ static int ntb_epf_init_dev(struct ntb_epf_dev *ndev)\n \tint ret;\n \n \t/* One Link interrupt and rest doorbell interrupt */\n-\tret = ntb_epf_init_isr(ndev, NTB_EPF_MIN_DB_COUNT + NTB_EPF_IRQ_RESERVE,\n-\t\t\t       NTB_EPF_MAX_DB_COUNT + NTB_EPF_IRQ_RESERVE);\n+\tret = ntb_epf_init_isr(ndev, NTB_EPF_MIN_DB_COUNT + 1 + NTB_EPF_IRQ_RESERVE,\n+\t\t\t       NTB_EPF_MAX_DB_COUNT + 1 + NTB_EPF_IRQ_RESERVE);\n \tif (ret) {\n \t\tdev_err(dev, \"Failed to init ISR\\n\");\n \t\treturn ret;\ndiff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/endpoint/functions/pci-epf-vntb.c\nindex c89f5b0775fa..c47186fe4f75 100644\n--- a/drivers/pci/endpoint/functions/pci-epf-vntb.c\n+++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c\n@@ -1384,6 +1384,22 @@ static u64 vntb_epf_db_valid_mask(struct ntb_dev *ntb)\n \treturn BIT_ULL(ntb_ndev(ntb)->db_count) - 1;\n }\n \n+static int vntb_epf_db_vector_count(struct ntb_dev *ntb)\n+{\n+\treturn ntb_ndev(ntb)->db_count;\n+}\n+\n+static u64 vntb_epf_db_vector_mask(struct ntb_dev *ntb, int db_vector)\n+{\n+\tstruct epf_ntb *ndev = ntb_ndev(ntb);\n+\n+\tdb_vector--; /* vector 0 is reserved for link events */\n+\tif (db_vector < 0 || db_vector >= ndev->db_count)\n+\t\treturn 0;\n+\n+\treturn BIT_ULL(db_vector);\n+}\n+\n static int vntb_epf_db_set_mask(struct ntb_dev *ntb, u64 db_bits)\n {\n \treturn 0;\n@@ -1509,20 +1525,28 @@ static int vntb_epf_peer_spad_write(struct ntb_dev *ndev, int pidx, int idx, u32\n \n static int vntb_epf_peer_db_set(struct ntb_dev *ndev, u64 db_bits)\n {\n-\tu32 interrupt_num = ffs(db_bits) + 1;\n \tstruct epf_ntb *ntb = ntb_ndev(ndev);\n \tu8 func_no, vfunc_no;\n-\tint ret;\n+\tu64 failed = 0;\n+\tint i;\n \n \tfunc_no = ntb->epf->func_no;\n \tvfunc_no = ntb->epf->vfunc_no;\n \n-\tret = pci_epc_raise_irq(ntb->epf->epc, func_no, vfunc_no,\n-\t\t\t\tPCI_IRQ_MSI, interrupt_num + 1);\n-\tif (ret)\n-\t\tdev_err(&ntb->ntb.dev, \"Failed to raise IRQ\\n\");\n+\tfor_each_set_bit(i, (unsigned long *)&db_bits, ntb->db_count) {\n+\t\t/*\n+\t\t * DB bit i is MSI interrupt (i + 2).\n+\t\t * Vector 0 is used for link events and MSI vectors are\n+\t\t * 1-based for pci_epc_raise_irq().\n+\t\t */\n+\t\tif (pci_epc_raise_irq(ntb->epf->epc, func_no, vfunc_no,\n+\t\t\t\t      PCI_IRQ_MSI, i + 2))\n+\t\t\tfailed |= BIT_ULL(i);\n+\t}\n+\tif (failed)\n+\t\tdev_err(&ntb->ntb.dev, \"Failed to raise IRQ (0x%llx)\\n\", failed);\n \n-\treturn ret;\n+\treturn failed ? -EIO : 0;\n }\n \n static u64 vntb_epf_db_read(struct ntb_dev *ndev)\n@@ -1596,6 +1620,8 @@ static const struct ntb_dev_ops vntb_epf_ops = {\n \t.spad_count\t\t= vntb_epf_spad_count,\n \t.peer_mw_count\t\t= vntb_epf_peer_mw_count,\n \t.db_valid_mask\t\t= vntb_epf_db_valid_mask,\n+\t.db_vector_count\t= vntb_epf_db_vector_count,\n+\t.db_vector_mask\t\t= vntb_epf_db_vector_mask,\n \t.db_set_mask\t\t= vntb_epf_db_set_mask,\n \t.mw_set_trans\t\t= vntb_epf_mw_set_trans,\n \t.mw_clear_trans\t\t= vntb_epf_mw_clear_trans,\n",
    "prefixes": [
        "RFC",
        "v3",
        "27/35"
    ]
}