Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/1.0/patches/2175250/?format=api
{ "id": 2175250, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175250/?format=api", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.0/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20251217-dt-bindings-pci-qcom-v2-9-873721599754@oss.qualcomm.com>", "date": "2025-12-17T16:19:15", "name": "[v2,09/12] dt-bindings: PCI: qcom,pcie-ipq9574: Move IPQ9574 to dedicated schema", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "961154f33c34519031ddd49a892598d3d3dd2714", "submitter": { "id": 92171, "url": "http://patchwork.ozlabs.org/api/1.0/people/92171/?format=api", "name": "Krzysztof Kozlowski", "email": "krzysztof.kozlowski@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20251217-dt-bindings-pci-qcom-v2-9-873721599754@oss.qualcomm.com/mbox/", "series": [ { "id": 485718, "url": "http://patchwork.ozlabs.org/api/1.0/series/485718/?format=api", "date": "2025-12-17T16:19:09", "name": "dt-bindings: PCI: qcom: Move remaining devices to dedicated schema", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/485718/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2175250/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-43218-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=bwiV23b2;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=R9vuH8jZ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-43218-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"bwiV23b2\";\n\tdkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"R9vuH8jZ\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.168.131", "smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=oss.qualcomm.com" ], "Received": [ "from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4dWfVX4WVyz1xty\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 18 Dec 2025 03:33:08 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id E8C58311A96D\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 17 Dec 2025 16:21:46 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 10BFB34CFB8;\n\tWed, 17 Dec 2025 16:19:46 +0000 (UTC)", "from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com\n [205.220.168.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 038AE342502\n\tfor <linux-pci@vger.kernel.org>; Wed, 17 Dec 2025 16:19:43 +0000 (UTC)", "from pps.filterd (m0279862.ppops.net [127.0.0.1])\n\tby mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 5BHCKuNY2683891\n\tfor <linux-pci@vger.kernel.org>; Wed, 17 Dec 2025 16:19:43 GMT", "from mail-qt1-f200.google.com (mail-qt1-f200.google.com\n [209.85.160.200])\n\tby mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4b3kketjjp-1\n\t(version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n\tfor <linux-pci@vger.kernel.org>; Wed, 17 Dec 2025 16:19:43 +0000 (GMT)", "by mail-qt1-f200.google.com with SMTP id\n d75a77b69052e-4f35f31000cso28021cf.2\n for <linux-pci@vger.kernel.org>; Wed, 17 Dec 2025 08:19:42 -0800 (PST)", "from [127.0.1.1] ([178.197.218.51])\n by smtp.gmail.com with ESMTPSA id\n a640c23a62f3a-b7cfa29be92sm1987868666b.10.2025.12.17.08.19.39\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 17 Dec 2025 08:19:40 -0800 (PST)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1765988385; cv=none;\n b=PbbL56Q6gHG+rge1KjQycsBvHyQsUI8h7/clj+VSwwJ9Aqcnz2U99LIAtailP9jdhkX/17HuosVTrZKAiK9TqTJla4L4bRZKCLfZTMt6e72EsGeevTY57Z01WErve8iUMN88xsia12C7/y2myte6LwQRqQ7Q1mx6Wo6Pcy4og7c=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1765988385; c=relaxed/simple;\n\tbh=2yHNq+A8EbEEwQw6b4BOZaAByKFV8pbwjkYxT+gl/j4=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=gpVchRg/j2n5qa/FTG/JOKeaeCDV0WGVgnGfwbLnKitlukbxa+CAuDb+WEDSzk9HFrPKcfv97TJqnpZ2mZfxI7AUUaOjulnt4VSHPTtpA4HSzxr+9Ar0eaRpu71fp1s0sS4A/M693I7kSeLMgM0nSbi2c9DdB2MgvUsp4hFcVWc=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com;\n spf=pass smtp.mailfrom=oss.qualcomm.com;\n dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=bwiV23b2;\n dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=R9vuH8jZ; arc=none smtp.client-ip=205.220.168.131", "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n\tcc:content-transfer-encoding:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to; s=qcppdkim1; bh=\n\tKdMqkp7j+UNmZFoGwgZFjxLirfOk2yTnZ7OFrV0YjIc=; b=bwiV23b2NPPwUezj\n\tV7etyRblY/Fq4RjD3ldj1Qlsrq503BBOEVazKpNpgA0W+Ax7qluL/fxjAcQUurvf\n\tdJjayGFR2QhqB3fwVTdmRx7fkiPHBgDNtV6Atq7hcEMQP3kQggAsZB9bY4YbUYP2\n\t/dY02zLrRWlTbLLYq0goshdh7omSMfxOI95+0VzhwxIHS6bAk2dvSEzS0JitnDIB\n\tVC+2KkPeSyoK125i/jO/iMP2Jy4PtvG5jqVL6hv4eHZTCY9IO/+TBbbOcZpUanG0\n\tFjDstJwQw58slvng0mU79b4ZdIlnqC8GfdQnDCjBkNf3rFnuQE0VvQzVfaJMRHHE\n\tSpdYaA==", "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=oss.qualcomm.com; s=google; t=1765988382; x=1766593182;\n darn=vger.kernel.org;\n h=cc:to:in-reply-to:references:message-id:content-transfer-encoding\n :mime-version:subject:date:from:from:to:cc:subject:date:message-id\n :reply-to;\n bh=KdMqkp7j+UNmZFoGwgZFjxLirfOk2yTnZ7OFrV0YjIc=;\n b=R9vuH8jZJJ9ztw+5eXeHYm+/zs2qr3FxJRgqaFyMSptACcC2AiXZu3Apd65r7FB7jA\n XiOTVE/msywgWLVEhV4+cEyYAokqP6Y1NL4mOjn8VJePEVclyia0DcXKGeXl6QsuY3n3\n 44d7z99isgJNLqA3hj7LJUL1w9fMktZKq86MYqXjcL7qP5stOynP+WIT3KkbxY3wxhdD\n rCR6jtsoRqpeFAQEUJuxKbN9Hjzw7zFLJB26lhXkB0Dkg93pteTFhZ75Zlq5EYgMqeB5\n LT6XublG7/cvVw81UVJNjRxciFbjxAm5GgnwIRC3fHXpGeuCZpj14bMMz9ongWURWBZD\n pKjQ==" ], "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20230601; t=1765988382; x=1766593182;\n h=cc:to:in-reply-to:references:message-id:content-transfer-encoding\n :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to\n :cc:subject:date:message-id:reply-to;\n bh=KdMqkp7j+UNmZFoGwgZFjxLirfOk2yTnZ7OFrV0YjIc=;\n b=NlzuMxTxF2ynSX7UyDK8GQyH9KGOG3iafXfXHmCtuWuQ5O4qdvmoruiq6Eaq5QDGzK\n 5YpG2b58VSaX6eH0f2L1moeUbUm5p6Sfj741jhkvgn5FWBgZuVpS1ohMXAoiTQWYWcyv\n BDrgBXC9ecammvAQ6eC1WQQ/ro+ie7SFzmx60kqYZ+zR2KqX8VYhWRsNbwmXlv4fH2M8\n tMtHMHrrpTEhv65lZQosshBM2R3aasiMEZXbDtEFmKIOjVSO0Scf+cueNtESaEkBnEmU\n aENKMyPk2WI8tUUXuA7MZLeu61gyCBae5xV37jChT9KMouDNOgWJa4lEyEQ+4booDZqK\n Kswg==", "X-Forwarded-Encrypted": "i=1;\n AJvYcCVjmoRHVHzWb3mhn6FQBDX5gUdR9Ll5vtG4d3qHFUpaEvhTtZ/LxgaTaDlL/pn9XzAeploydE7XFjo=@vger.kernel.org", "X-Gm-Message-State": "AOJu0YywRw4ZtNn/lR0S+lo1VZ771/jrqnltW52O+YZhmmqkyvjsDALy\n\tRapZn4yyfw8RsUTBJOWK96SbxzfZIluBoS6UkD0KxLcRNlY+J7qnY5vUOtoa263K94jCD+fun7M\n\tKZ7c4r3wU7wvCh2Jnsggmb8zl8Q4X8TJLhMWCduGAU3LNBSZQ05HxOTN4jyvqVt4=", "X-Gm-Gg": "AY/fxX7qD5Dbmc94WmdXmaeYW+P/mFyrs3Ip89JIi/fggMYITlVG67l+hWzRFuheasi\n\t+XvDb5EtPNolXDDwoPNWHjW3XZLELhZE+vZA2WnOMapnCntLcbgv6rfA/EQOPhoPt2Kdpr4NNmD\n\tn35tuG0MxscKneHPr/MDYHl5Chl1S0+YKcqC45fB++4Xci4h5NkNUKfq31HhSxyqucQxOKsjyF4\n\t6SfUhXUuYK0tvjjwNPp8i0qTTB6K5Z174GkD/NazLNf+RHhhG2WIHKbKIDrQL4tLTkU1bKHflay\n\taC2WCxGK75+aZtlGt6UpItAnul5xL24hxU0RsbnpOpzNllE8wfijgEoGtwq0ijjeyhbjKRRC776\n\tM1mtrNM1IPoVhg9hrZqGosf1F9wJLzkov", "X-Received": [ "by 2002:ac8:7f03:0:b0:4ed:e337:2e68 with SMTP id\n d75a77b69052e-4f1d066fd5bmr232308091cf.81.1765988381758;\n Wed, 17 Dec 2025 08:19:41 -0800 (PST)", "by 2002:ac8:7f03:0:b0:4ed:e337:2e68 with SMTP id\n d75a77b69052e-4f1d066fd5bmr232307671cf.81.1765988381245;\n Wed, 17 Dec 2025 08:19:41 -0800 (PST)" ], "X-Google-Smtp-Source": "\n AGHT+IEZggKhCF+fCoATF9m3KZ7X2nrflQRDVmVQmmPVOo4IuApG9g8GPhZ8z6hd1r5bxclop4dkwg==", "From": "Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>", "Date": "Wed, 17 Dec 2025 17:19:15 +0100", "Subject": "[PATCH v2 09/12] dt-bindings: PCI: qcom,pcie-ipq9574: Move IPQ9574\n to dedicated schema", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20251217-dt-bindings-pci-qcom-v2-9-873721599754@oss.qualcomm.com>", "References": "<20251217-dt-bindings-pci-qcom-v2-0-873721599754@oss.qualcomm.com>", "In-Reply-To": "\n <20251217-dt-bindings-pci-qcom-v2-0-873721599754@oss.qualcomm.com>", "To": "Bjorn Helgaas <bhelgaas@google.com>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kwilczynski@kernel.org>,\n Manivannan Sadhasivam <mani@kernel.org>, Rob Herring <robh@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>,\n Bjorn Andersson <andersson@kernel.org>", "Cc": "linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=openpgp-sha256; l=9948;\n i=krzysztof.kozlowski@oss.qualcomm.com; h=from:subject:message-id;\n bh=2yHNq+A8EbEEwQw6b4BOZaAByKFV8pbwjkYxT+gl/j4=;\n b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBpQtgEpWwoONQMmmr4QLBb31eFmw0CEb3T/qjhC\n MYFWL+KjWyJAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCaULYBAAKCRDBN2bmhouD\n 12cRD/94ty5auu057eYabeIUTwK6A/pyY8k3KnX27YS15spf+DlYRh87xkQEuI4VkYSdJkNgWkg\n YdYpPub9bh8fDJK0k8h0XFa8+yHMsTWdki71K0sa7nbQZAk7IaSdgpd6wLrf86RT8Qo8lAyr198\n yBLkQOC4C6gpkjwxSANeqAa1I9JjZzmx5d+96MGjaUqLX5vkL/p+hd5648ENKt7Xw2J75uSz0cw\n R3qjjyBahTKYShTeyOvqTzgSPcHXt5Ky/DWJG2e3X4flzryXewJMRF7fi2sdRo2IT1U6NfFBwYI\n nDc73Q4HfvT8tnxuiKvK4HltiZHA6vaCjbzYJrijpbEYVC47xnUMH51+F1uDKQK74RohWIcIXJ/\n rEWTHrfRcoseylsyePnYCuCBNEvewvkFOciKNHScEux8JStIn2PFzNBwB4bQRqQhPtf5S+auXEE\n mJG2/YBulRk/0v+pRnBlyQ6hhPQ3ms9VWHbNOgYh+RLBD1AKfYJfCHZ1C4RHwUSEOYV/FGwhYC+\n iLUr1OhVngakSwpw4dgpkMJZPd3noJp4kpVOBKd/mlixg8CUSxzO5HS66SpJ46WKPL1nsAxFXvP\n xBKyLn4DIUaIyLSOy7eYfP/u33cNaGkTHKmhf1sXFd3A5FoHDCT5UmM3vbwSB6JWCUITO9xs1rP\n J3EafGnzZO1UCZQ==", "X-Developer-Key": "i=krzysztof.kozlowski@oss.qualcomm.com; a=openpgp;\n fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjUxMjE3MDEyOCBTYWx0ZWRfX0cQp9ZNL5hox\n SyrkTbQxMa7SNbKiRfeou6caUZr/WVGObIPVeBsyeji1LA3NUlJK3Dn9Yfy8Ev2wH1au3/DwHF+\n 7RBzI2prD9uBjzbep+JTfhGuKC/RnioIurbf246cCP3/o/gOIP+etp5QYt+0cnuCQd+hUofK6B4\n R5OYb8xEPOSnxaEj8SphcmzdxtCyiarYduGnHPApqbDUUp3bCmLEvxXuGMm9BwdWpnlWYA/C3yy\n p99+XqaQFj59BoYyQn7HkitfdxwcBR0UCQOd+nGiLQSd46+vK/mcfTRyHwnVICDU+u5jkI93l+u\n kRAYMrZlpGGz9Upi236MD3RnrNt+6PWoJpEiGxwO/5yLUcBdFtP+5BWJGorT6LGCEStzYCyxi/r\n IetlZaJb8mUJMuLzpCQEVmusCuePrA==", "X-Proofpoint-GUID": "hvQ2t2_oTUssFUW55F1lJwB6SQ-V00bz", "X-Authority-Analysis": "v=2.4 cv=Fcw6BZ+6 c=1 sm=1 tr=0 ts=6942d81f cx=c_pps\n a=JbAStetqSzwMeJznSMzCyw==:117 a=hmARNUlj3OVxZ3RlbIsQyw==:17\n a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=gEfo2CItAAAA:8 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8\n a=d0cN-5R3_aeRheYbsGEA:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22\n a=sptkURWiP4Gy88Gu7hUp:22", "X-Proofpoint-ORIG-GUID": "hvQ2t2_oTUssFUW55F1lJwB6SQ-V00bz", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49\n definitions=2025-12-17_03,2025-12-16_05,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n lowpriorityscore=0 clxscore=1015 malwarescore=0 spamscore=0 suspectscore=0\n impostorscore=0 priorityscore=1501 phishscore=0 bulkscore=0 adultscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512170128" }, "content": "Move IPQ9574 and compatible PCIe devices from qcom,pcie.yaml binding to\na dedicated file to make reviewing and maintenance easier.\n\nNew schema is equivalent to the old one with few changes:\n - Adding a required compatible, which is actually redundant.\n - Drop the really obvious comments next to clock/reg/reset-names items.\n - Make last \"reg\" entry \"mhi\" a required one, because all in-tree DTS\n were updated to include it.\n\nReviewed-by: Rob Herring (Arm) <robh@kernel.org>\nSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>\n---\n .../devicetree/bindings/pci/qcom,pcie-ipq9574.yaml | 183 +++++++++++++++++++++\n .../devicetree/bindings/pci/qcom,pcie.yaml | 77 ---------\n 2 files changed, 183 insertions(+), 77 deletions(-)", "diff": "diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ipq9574.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq9574.yaml\nnew file mode 100644\nindex 000000000000..4be342cc04e1\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ipq9574.yaml\n@@ -0,0 +1,183 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/pci/qcom,pcie-ipq9574.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: Qualcomm IPQ9574 PCI Express Root Complex\n+\n+maintainers:\n+ - Bjorn Andersson <andersson@kernel.org>\n+ - Manivannan Sadhasivam <mani@kernel.org>\n+\n+properties:\n+ compatible:\n+ oneOf:\n+ - enum:\n+ - qcom,pcie-ipq9574\n+ - items:\n+ - enum:\n+ - qcom,pcie-ipq5332\n+ - qcom,pcie-ipq5424\n+ - const: qcom,pcie-ipq9574\n+\n+ reg:\n+ maxItems: 6\n+\n+ reg-names:\n+ items:\n+ - const: dbi\n+ - const: elbi\n+ - const: atu\n+ - const: parf\n+ - const: config\n+ - const: mhi\n+\n+ clocks:\n+ maxItems: 6\n+\n+ clock-names:\n+ items:\n+ - const: axi_m # AXI Master clock\n+ - const: axi_s # AXI Slave clock\n+ - const: axi_bridge\n+ - const: rchng\n+ - const: ahb\n+ - const: aux\n+\n+ interrupts:\n+ minItems: 8\n+ maxItems: 9\n+\n+ interrupt-names:\n+ minItems: 8\n+ items:\n+ - const: msi0\n+ - const: msi1\n+ - const: msi2\n+ - const: msi3\n+ - const: msi4\n+ - const: msi5\n+ - const: msi6\n+ - const: msi7\n+ - const: global\n+\n+ resets:\n+ maxItems: 8\n+\n+ reset-names:\n+ items:\n+ - const: pipe\n+ - const: sticky # Core sticky reset\n+ - const: axi_s_sticky # AXI Slave Sticky reset\n+ - const: axi_s # AXI slave reset\n+ - const: axi_m_sticky # AXI Master Sticky reset\n+ - const: axi_m # AXI master reset\n+ - const: aux\n+ - const: ahb\n+\n+required:\n+ - resets\n+ - reset-names\n+\n+allOf:\n+ - $ref: qcom,pcie-common.yaml#\n+\n+unevaluatedProperties: false\n+\n+examples:\n+ - |\n+ #include <dt-bindings/clock/qcom,ipq9574-gcc.h>\n+ #include <dt-bindings/gpio/gpio.h>\n+ #include <dt-bindings/interconnect/qcom,ipq9574.h>\n+ #include <dt-bindings/interrupt-controller/arm-gic.h>\n+ #include <dt-bindings/reset/qcom,ipq9574-gcc.h>\n+\n+ pcie@10000000 {\n+ compatible = \"qcom,pcie-ipq9574\";\n+ reg = <0x10000000 0xf1d>,\n+ <0x10000f20 0xa8>,\n+ <0x10001000 0x1000>,\n+ <0x000f8000 0x4000>,\n+ <0x10100000 0x1000>,\n+ <0x000fe000 0x1000>;\n+ reg-names = \"dbi\",\n+ \"elbi\",\n+ \"atu\",\n+ \"parf\",\n+ \"config\",\n+ \"mhi\";\n+ ranges = <0x01000000 0x0 0x00000000 0x10200000 0x0 0x100000>,\n+ <0x02000000 0x0 0x10300000 0x10300000 0x0 0x7d00000>;\n+\n+ device_type = \"pci\";\n+ linux,pci-domain = <1>;\n+ bus-range = <0x00 0xff>;\n+ num-lanes = <1>;\n+ #address-cells = <3>;\n+ #size-cells = <2>;\n+\n+ clocks = <&gcc GCC_PCIE1_AXI_M_CLK>,\n+ <&gcc GCC_PCIE1_AXI_S_CLK>,\n+ <&gcc GCC_PCIE1_AXI_S_BRIDGE_CLK>,\n+ <&gcc GCC_PCIE1_RCHNG_CLK>,\n+ <&gcc GCC_PCIE1_AHB_CLK>,\n+ <&gcc GCC_PCIE1_AUX_CLK>;\n+ clock-names = \"axi_m\",\n+ \"axi_s\",\n+ \"axi_bridge\",\n+ \"rchng\",\n+ \"ahb\",\n+ \"aux\";\n+\n+ interconnects = <&gcc MASTER_ANOC_PCIE1 &gcc SLAVE_ANOC_PCIE1>,\n+ <&gcc MASTER_SNOC_PCIE1 &gcc SLAVE_SNOC_PCIE1>;\n+ interconnect-names = \"pcie-mem\", \"cpu-pcie\";\n+\n+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;\n+ interrupt-names = \"msi0\",\n+ \"msi1\",\n+ \"msi2\",\n+ \"msi3\",\n+ \"msi4\",\n+ \"msi5\",\n+ \"msi6\",\n+ \"msi7\";\n+\n+ #interrupt-cells = <1>;\n+ interrupt-map-mask = <0 0 0 0x7>;\n+ interrupt-map = <0 0 0 1 &intc 0 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,\n+ <0 0 0 2 &intc 0 GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,\n+ <0 0 0 3 &intc 0 GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,\n+ <0 0 0 4 &intc 0 GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n+\n+ resets = <&gcc GCC_PCIE1_PIPE_ARES>,\n+ <&gcc GCC_PCIE1_CORE_STICKY_ARES>,\n+ <&gcc GCC_PCIE1_AXI_S_STICKY_ARES>,\n+ <&gcc GCC_PCIE1_AXI_S_ARES>,\n+ <&gcc GCC_PCIE1_AXI_M_STICKY_ARES>,\n+ <&gcc GCC_PCIE1_AXI_M_ARES>,\n+ <&gcc GCC_PCIE1_AUX_ARES>,\n+ <&gcc GCC_PCIE1_AHB_ARES>;\n+ reset-names = \"pipe\",\n+ \"sticky\",\n+ \"axi_s_sticky\",\n+ \"axi_s\",\n+ \"axi_m_sticky\",\n+ \"axi_m\",\n+ \"aux\",\n+ \"ahb\";\n+\n+ phys = <&pcie1_phy>;\n+ phy-names = \"pciephy\";\n+\n+ perst-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;\n+ wake-gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;\n+ };\ndiff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml\nindex 1ff63d7e772a..5af56911d204 100644\n--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml\n+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml\n@@ -22,13 +22,7 @@ properties:\n - qcom,pcie-apq8084\n - qcom,pcie-ipq8064\n - qcom,pcie-ipq8064-v2\n- - qcom,pcie-ipq9574\n - qcom,pcie-msm8996\n- - items:\n- - enum:\n- - qcom,pcie-ipq5332\n- - qcom,pcie-ipq5424\n- - const: qcom,pcie-ipq9574\n - items:\n - const: qcom,pcie-msm8998\n - const: qcom,pcie-msm8996\n@@ -153,27 +147,6 @@ allOf:\n - const: parf # Qualcomm specific registers\n - const: config # PCIe configuration space\n \n- - if:\n- properties:\n- compatible:\n- contains:\n- enum:\n- - qcom,pcie-ipq9574\n- then:\n- properties:\n- reg:\n- minItems: 5\n- maxItems: 6\n- reg-names:\n- minItems: 5\n- items:\n- - const: dbi # DesignWare PCIe registers\n- - const: elbi # External local bus interface registers\n- - const: atu # ATU address space\n- - const: parf # Qualcomm specific registers\n- - const: config # PCIe configuration space\n- - const: mhi # MHI registers\n-\n - if:\n properties:\n compatible:\n@@ -277,55 +250,6 @@ allOf:\n resets: false\n reset-names: false\n \n- - if:\n- properties:\n- compatible:\n- contains:\n- enum:\n- - qcom,pcie-ipq9574\n- then:\n- properties:\n- clocks:\n- minItems: 6\n- maxItems: 6\n- clock-names:\n- items:\n- - const: axi_m # AXI Master clock\n- - const: axi_s # AXI Slave clock\n- - const: axi_bridge\n- - const: rchng\n- - const: ahb\n- - const: aux\n-\n- resets:\n- minItems: 8\n- maxItems: 8\n- reset-names:\n- items:\n- - const: pipe # PIPE reset\n- - const: sticky # Core Sticky reset\n- - const: axi_s_sticky # AXI Slave Sticky reset\n- - const: axi_s # AXI Slave reset\n- - const: axi_m_sticky # AXI Master Sticky reset\n- - const: axi_m # AXI Master reset\n- - const: aux # AUX Reset\n- - const: ahb # AHB Reset\n-\n- interrupts:\n- minItems: 8\n- interrupt-names:\n- minItems: 8\n- items:\n- - const: msi0\n- - const: msi1\n- - const: msi2\n- - const: msi3\n- - const: msi4\n- - const: msi5\n- - const: msi6\n- - const: msi7\n- - const: global\n-\n - if:\n not:\n properties:\n@@ -335,7 +259,6 @@ allOf:\n - qcom,pcie-apq8064\n - qcom,pcie-ipq8064\n - qcom,pcie-ipq8064v2\n- - qcom,pcie-ipq9574\n then:\n required:\n - power-domains\n", "prefixes": [ "v2", "09/12" ] }