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GET /api/1.0/patches/2175241/?format=api
{ "id": 2175241, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175241/?format=api", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.0/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20251217-dt-bindings-pci-qcom-v2-4-873721599754@oss.qualcomm.com>", "date": "2025-12-17T16:19:10", "name": "[v2,04/12] dt-bindings: PCI: qcom,pcie-qcs404: Move QCS404 to dedicated schema", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "5e055def2a39dd4a52cd8923c62149558686ba35", "submitter": { "id": 92171, "url": "http://patchwork.ozlabs.org/api/1.0/people/92171/?format=api", "name": "Krzysztof Kozlowski", "email": "krzysztof.kozlowski@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20251217-dt-bindings-pci-qcom-v2-4-873721599754@oss.qualcomm.com/mbox/", "series": [ { "id": 485718, "url": "http://patchwork.ozlabs.org/api/1.0/series/485718/?format=api", "date": "2025-12-17T16:19:09", "name": "dt-bindings: PCI: qcom: Move remaining devices to dedicated schema", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/485718/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2175241/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-43213-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=pgcYrUT1;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=WtdtijWd;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20251217-dt-bindings-pci-qcom-v2-4-873721599754@oss.qualcomm.com>", "References": "<20251217-dt-bindings-pci-qcom-v2-0-873721599754@oss.qualcomm.com>", "In-Reply-To": "\n <20251217-dt-bindings-pci-qcom-v2-0-873721599754@oss.qualcomm.com>", "To": "Bjorn Helgaas <bhelgaas@google.com>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kwilczynski@kernel.org>,\n Manivannan Sadhasivam <mani@kernel.org>, Rob Herring <robh@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>,\n Bjorn Andersson <andersson@kernel.org>", "Cc": "linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=openpgp-sha256; l=6948;\n i=krzysztof.kozlowski@oss.qualcomm.com; h=from:subject:message-id;\n bh=5jy6pUocsOcDboYaHFYJ7u9mrr4iWYgI8qULuMPdMlg=;\n b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBpQtf/8wTTVCNj4octtmgeym/q7H5Ge3YxDt4+U\n jWQQT2sMY2JAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCaULX/wAKCRDBN2bmhouD\n 18ewD/9YgvokU2D9BFpzzVq1CctSbrwe2IVET1DT6Dov9JPrGsVSha7dO9jxSD9ze6z7y3WJCfc\n PL52WsbiIMu/Y2w6p1ioAJER5L/cAd5kmcrZJvskQ4wRawISJSZfY4XhrdRIQ3PbyO+0EDY3VRn\n qKfPdE0NlJ1WLkKJLz4hXfj2Xf/+bvIj8/tCQVXgjpMkFj9wd+zE5hrzjvsKqWzfJvInhFSn2vW\n yTs2FRpQNcwwiGYiqjZwE/XNNbGQfdKn0WcRPlqxUmgIZ2Xvag14hgSxuWona++DsPYxDnh6qIA\n vF17YDo5pM7AaHXM7wSmZUgyO/bkQLi7NxvElR5XzMBYUY9cfzJbTSymBkExdKOqCNF9WrNQr80\n uJQLD3J/iKNdqcEB7QIp2j0IsBDAWtYH42EqoYuKauvmq9sbgo2nyKiUwdBi3A1APyDDtKpDytK\n 1LrYKVfoe7fqxTimFaf83kSxvyHRjjUw7BpmNWlZhjy83PB0eGjXiya4KJ0hE2++TxyuAx6T54Z\n MMYG4cxaPNO5Bnfa2bJhiB9Kcd068fWyF5b2IPAtkcWCCmWdSNCDA69Z6He50Af6Gsgl5AKmMNZ\n b78AdU25VPnjP144TzgeeruDBXIdRsOv4H+RnTrkpRb227IrQYb0hhadmG04fuFMRXpxulwS5nU\n nX6anpwpRLEeZ6Q==", "X-Developer-Key": "i=krzysztof.kozlowski@oss.qualcomm.com; a=openpgp;\n fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B", "X-Authority-Analysis": "v=2.4 cv=VLjQXtPX c=1 sm=1 tr=0 ts=6942d812 cx=c_pps\n a=72HoHk1woDtn7btP4rdmlg==:117 a=hmARNUlj3OVxZ3RlbIsQyw==:17\n a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=gEfo2CItAAAA:8 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8\n a=EisBvoLQgbKCbwdZyrgA:9 a=QEXdDO2ut3YA:10 a=kA6IBgd4cpdPkAWqgNAz:22\n a=sptkURWiP4Gy88Gu7hUp:22", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjUxMjE3MDEyOCBTYWx0ZWRfXwROIeVL+k44X\n 4h9halW+f4dVf5YDm0iZk1/XFT5A7I0oHu22cSc8+BMhW9W/hFLlgbBEiTPzysFTePG5z2WwOa/\n LVw/dam1V53FtWEE8k3FPXsYXXnVnjkJuF381oIKzRxplTA6L/9UAn+D/svgL0EA23y1x5SLCi+\n dD23O37trfdagbefyf2lfv6jiWxZG6yrOYjmkFAWmsBXh2nvwBtkOyxj8RUAgVmw5WLrvuoxtCh\n 3L5hCnpx/hQTnEjSPLZjikMU8GfyCMbzXyyrWicmRdiODHtomzsjicY+UlkLQFoELf7A10Mfp8X\n +LjIqdDrNrYPTKkCVPkWQmLDkT44wGMG+EUbMHunRdrwc0kW7Tcwh8mB0F7iLItDOj/XQnTwurp\n sVWxTRlchRZD2GSh4J/BWHQ9hPsXew==", "X-Proofpoint-ORIG-GUID": "BHfYLz1oIRZ4CADQMHP_qxLZTG1XNtgX", "X-Proofpoint-GUID": "BHfYLz1oIRZ4CADQMHP_qxLZTG1XNtgX", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49\n definitions=2025-12-17_03,2025-12-16_05,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n spamscore=0 adultscore=0 suspectscore=0 bulkscore=0 malwarescore=0\n priorityscore=1501 impostorscore=0 clxscore=1015 lowpriorityscore=0\n phishscore=0 classifier=typeunknown authscore=0 authtc= authcc=\n route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001\n definitions=main-2512170128" }, "content": "Move QCS404 PCIe devices from qcom,pcie.yaml binding to a dedicated file\nto make reviewing and maintenance easier.\n\nNew schema is equivalent to the old one with few changes:\n - Adding a required compatible, which is actually redundant.\n - Drop the really obvious comments next to clock/reg/reset-names items.\n\nReviewed-by: Rob Herring (Arm) <robh@kernel.org>\nSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>\n---\n .../devicetree/bindings/pci/qcom,pcie-qcs404.yaml | 131 +++++++++++++++++++++\n .../devicetree/bindings/pci/qcom,pcie.yaml | 33 ------\n 2 files changed, 131 insertions(+), 33 deletions(-)", "diff": "diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-qcs404.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-qcs404.yaml\nnew file mode 100644\nindex 000000000000..99b3ed43b87c\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-qcs404.yaml\n@@ -0,0 +1,131 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/pci/qcom,pcie-qcs404.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: Qualcomm QCS404 PCI Express Root Complex\n+\n+maintainers:\n+ - Bjorn Andersson <andersson@kernel.org>\n+ - Manivannan Sadhasivam <mani@kernel.org>\n+\n+properties:\n+ compatible:\n+ enum:\n+ - qcom,pcie-qcs404\n+\n+ reg:\n+ maxItems: 4\n+\n+ reg-names:\n+ items:\n+ - const: dbi\n+ - const: elbi\n+ - const: parf\n+ - const: config\n+\n+ clocks:\n+ maxItems: 4\n+\n+ clock-names:\n+ items:\n+ - const: iface # AHB clock\n+ - const: aux\n+ - const: master_bus # AXI Master clock\n+ - const: slave_bus # AXI Slave clock\n+\n+ interrupts:\n+ maxItems: 1\n+\n+ interrupt-names:\n+ items:\n+ - const: msi\n+\n+ resets:\n+ maxItems: 6\n+\n+ reset-names:\n+ items:\n+ - const: axi_m # AXI Master reset\n+ - const: axi_s # AXI Slave reset\n+ - const: axi_m_sticky # AXI Master Sticky reset\n+ - const: pipe_sticky\n+ - const: pwr\n+ - const: ahb\n+\n+required:\n+ - resets\n+ - reset-names\n+\n+allOf:\n+ - $ref: qcom,pcie-common.yaml#\n+\n+unevaluatedProperties: false\n+\n+examples:\n+ - |\n+ #include <dt-bindings/clock/qcom,gcc-qcs404.h>\n+ #include <dt-bindings/gpio/gpio.h>\n+ #include <dt-bindings/interrupt-controller/arm-gic.h>\n+\n+ pcie@10000000 {\n+ compatible = \"qcom,pcie-qcs404\";\n+ reg = <0x10000000 0xf1d>,\n+ <0x10000f20 0xa8>,\n+ <0x07780000 0x2000>,\n+ <0x10001000 0x2000>;\n+ reg-names = \"dbi\", \"elbi\", \"parf\", \"config\";\n+ ranges = <0x81000000 0x0 0x00000000 0x10003000 0x0 0x00010000>, /* I/O */\n+ <0x82000000 0x0 0x10013000 0x10013000 0x0 0x007ed000>; /* memory */\n+\n+ device_type = \"pci\";\n+ linux,pci-domain = <0>;\n+ bus-range = <0x00 0xff>;\n+ num-lanes = <1>;\n+ #address-cells = <3>;\n+ #size-cells = <2>;\n+\n+ clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>,\n+ <&gcc GCC_PCIE_0_AUX_CLK>,\n+ <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,\n+ <&gcc GCC_PCIE_0_SLV_AXI_CLK>;\n+ clock-names = \"iface\", \"aux\", \"master_bus\", \"slave_bus\";\n+\n+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;\n+ interrupt-names = \"msi\";\n+ #interrupt-cells = <1>;\n+ interrupt-map-mask = <0 0 0 0x7>;\n+ interrupt-map = <0 0 0 1 &intc GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, /* int_a */\n+ <0 0 0 2 &intc GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, /* int_b */\n+ <0 0 0 3 &intc GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, /* int_c */\n+ <0 0 0 4 &intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; /* int_d */\n+\n+ phys = <&pcie_phy>;\n+ phy-names = \"pciephy\";\n+\n+ perst-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;\n+\n+ resets = <&gcc GCC_PCIE_0_AXI_MASTER_ARES>,\n+ <&gcc GCC_PCIE_0_AXI_SLAVE_ARES>,\n+ <&gcc GCC_PCIE_0_AXI_MASTER_STICKY_ARES>,\n+ <&gcc GCC_PCIE_0_CORE_STICKY_ARES>,\n+ <&gcc GCC_PCIE_0_BCR>,\n+ <&gcc GCC_PCIE_0_AHB_ARES>;\n+ reset-names = \"axi_m\",\n+ \"axi_s\",\n+ \"axi_m_sticky\",\n+ \"pipe_sticky\",\n+ \"pwr\",\n+ \"ahb\";\n+\n+ pcie@0 {\n+ device_type = \"pci\";\n+ reg = <0x0 0x0 0x0 0x0 0x0>;\n+ bus-range = <0x01 0xff>;\n+\n+ #address-cells = <3>;\n+ #size-cells = <2>;\n+ ranges;\n+ };\n+ };\ndiff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml\nindex 0a3ce5a46372..db7d91d42af8 100644\n--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml\n+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml\n@@ -29,7 +29,6 @@ properties:\n - qcom,pcie-ipq8074-gen3\n - qcom,pcie-ipq9574\n - qcom,pcie-msm8996\n- - qcom,pcie-qcs404\n - items:\n - enum:\n - qcom,pcie-ipq5332\n@@ -149,7 +148,6 @@ allOf:\n - qcom,pcie-ipq8064\n - qcom,pcie-ipq8064v2\n - qcom,pcie-ipq8074\n- - qcom,pcie-qcs404\n then:\n properties:\n reg:\n@@ -483,35 +481,6 @@ allOf:\n - const: msi7\n - const: global\n \n- - if:\n- properties:\n- compatible:\n- contains:\n- enum:\n- - qcom,pcie-qcs404\n- then:\n- properties:\n- clocks:\n- minItems: 4\n- maxItems: 4\n- clock-names:\n- items:\n- - const: iface # AHB clock\n- - const: aux # Auxiliary clock\n- - const: master_bus # AXI Master clock\n- - const: slave_bus # AXI Slave clock\n- resets:\n- minItems: 6\n- maxItems: 6\n- reset-names:\n- items:\n- - const: axi_m # AXI Master reset\n- - const: axi_s # AXI Slave reset\n- - const: axi_m_sticky # AXI Master Sticky reset\n- - const: pipe_sticky # PIPE sticky reset\n- - const: pwr # PWR reset\n- - const: ahb # AHB reset\n-\n - if:\n not:\n properties:\n@@ -526,7 +495,6 @@ allOf:\n - qcom,pcie-ipq8074\n - qcom,pcie-ipq8074-gen3\n - qcom,pcie-ipq9574\n- - qcom,pcie-qcs404\n then:\n required:\n - power-domains\n@@ -588,7 +556,6 @@ allOf:\n - qcom,pcie-ipq4019\n - qcom,pcie-ipq8064\n - qcom,pcie-ipq8064-v2\n- - qcom,pcie-qcs404\n then:\n properties:\n interrupts:\n", "prefixes": [ "v2", "04/12" ] }