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GET /api/1.0/patches/2175219/?format=api
{ "id": 2175219, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175219/?format=api", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.0/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20251217151609.3162665-12-den@valinux.co.jp>", "date": "2025-12-17T15:15:45", "name": "[RFC,v3,11/35] NTB: ntb_transport: Move TX memory window setup into setup_qp_mw()", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "3cdfcef8c69edb9d8a4b63ad255e93cfcdfbdf31", "submitter": { "id": 91573, "url": "http://patchwork.ozlabs.org/api/1.0/people/91573/?format=api", "name": "Koichiro Den", "email": "den@valinux.co.jp" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20251217151609.3162665-12-den@valinux.co.jp/mbox/", "series": [ { "id": 485709, "url": "http://patchwork.ozlabs.org/api/1.0/series/485709/?format=api", "date": "2025-12-17T15:15:53", "name": "NTB transport backed by endpoint DW eDMA", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/485709/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2175219/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-43180-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=valinux.co.jp header.i=@valinux.co.jp\n header.a=rsa-sha256 header.s=selector1 header.b=pyIwc27d;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n 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bh=WhYXTzIUkx70sdTDrWwodMO1dxR+UYO3uw1/O8oDCQ4=;\n b=pyIwc27df7uFkxg3oHyH0NnJAVivanX/R1UQsUKEfB0x1I300kYLbN3FlqZ7Z37wK5qcQ8sEFdqKHDNNQL2cZdkmdvDmk4YzlT8Snx3BflIeB37womuyHuJVOBmPNxOTbiRlG1DRSffXXWl6wg7Hf150FGbLrEAAmYhqr2wCTAI=", "From": "Koichiro Den <den@valinux.co.jp>", "To": "Frank.Li@nxp.com,\n\tdave.jiang@intel.com,\n\tntb@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tdmaengine@vger.kernel.org,\n\tlinux-renesas-soc@vger.kernel.org,\n\tnetdev@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org", "Cc": "mani@kernel.org,\n\tkwilczynski@kernel.org,\n\tkishon@kernel.org,\n\tbhelgaas@google.com,\n\tcorbet@lwn.net,\n\tgeert+renesas@glider.be,\n\tmagnus.damm@gmail.com,\n\trobh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tvkoul@kernel.org,\n\tjoro@8bytes.org,\n\twill@kernel.org,\n\trobin.murphy@arm.com,\n\tjdmason@kudzu.us,\n\tallenbh@gmail.com,\n\tandrew+netdev@lunn.ch,\n\tdavem@davemloft.net,\n\tedumazet@google.com,\n\tkuba@kernel.org,\n\tpabeni@redhat.com,\n\tBasavaraj.Natikar@amd.com,\n\tShyam-sundar.S-k@amd.com,\n\tkurt.schwemmer@microsemi.com,\n\tlogang@deltatee.com,\n\tjingoohan1@gmail.com,\n\tlpieralisi@kernel.org,\n\tutkarsh02t@gmail.com,\n\tjbrunet@baylibre.com,\n\tdlemoal@kernel.org,\n\tarnd@arndb.de,\n\telfring@users.sourceforge.net,\n\tden@valinux.co.jp", "Subject": "[RFC PATCH v3 11/35] NTB: ntb_transport: Move TX memory window setup\n into setup_qp_mw()", "Date": "Thu, 18 Dec 2025 00:15:45 +0900", "Message-ID": "<20251217151609.3162665-12-den@valinux.co.jp>", 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CaGtZsmqJ+UxxL1crOoR9iwNQXnYX9ue9N2JDO2Rz4/f4EomK/kJVzZ2AqTn5T21t1c2n7EjgI5KVnic9PEr6c2lgxWux0bVSQweBgTVhcw5TlfwrIGNynv/abJ65HUrxsMCtuEsw8bcsaCWG/mCxp/ZT4MYZ4ixUI9bhxuYg4PEkhX+22OOZsF0jvTgArYlf4hJ5sY32k9WNzFFgF0bybK7yIuKxra6plOt8noeC2ri2u4QY/3+BFP0T45CvVAthC4lmFfkUDZGIvuMcQVSPmKGABN47Qvuvpn4bFfmuSOPtKuAAJtBuqLGA7/lgOdX5bmZIwnMw9rAR1ZUBa3tdTsSkPToKgYIMcFHRQrCJDTno/VuY9Vc4VH3ebdtuyxp3GQ8TOYXC2nPWzztjaPULhk8Tl8g59wpnhntCoZ06xzLewbtrqaoWTuJRelHLJlK/ZyT3882lyz3hv60hdVRElG0qkrWOLzeucpyo1D0y9FvcPafDn5tFF2eGdlvcNCi8ULweUNk2L6WEJipnksTihr/n3tcRbBfNRFHkV3iMyhs/BEu/Se+J60i8TSCIRNnwIxE1z5J2ghRJ7cSeu+a5NJQAhcnhe8mMvuouHExVmABMzQr5FYc3xAjhXqBX5Wea8exxLw1I9WbvNj2altlSJl7Fcm/r/pPeex8XlU0IKH5oPn7yDMYafprTVwk5yyjDiuksIee1EBhGesizV/Xz8DngWQwJO433qZAsgnsEm5wUx9ORcafzOEe/ywvWWAXC65rFw0th99GhadoG/ccvnH58x9EaCsIxeIBOGIldSTR+qorl2F47qrWPMzGdhTdkqaolQoZozujhcpV6lsZM3L8syKQup2a3TkpGcBzfSjv180rW57APDj1xXXc+7wjYCdGnD2vrAv2Phe4wAEO1o2tsmAXztSyRFDAfZ6TWZVcGA3wizoK1dwCVhh+kRcMGQ3MxeBgnGI2YJEQtv8WWjyuGmazxPsDQsj/YbS7ziHzcct3nJT6z+H6Mpb5+Q1LzqGloNJKSx4B3ydeguIcBwbrl3qPXrhANUCAdEQ2SAqkJd/rFyTOvobNRhdNVNRciMdMZwEKdF8/Q/IuB2FMpcJ9au9X6N9/T8qOQx2raqYfELaBj10h8EsosFvQPJDMc+46hpvaSh1pa9WgGlF8mdoRY69U2NiLyqIAyaGF5WQ3H/CtGXGsnMXI5siAPpJINY3b6+2n5jLKZTxY+lf+BQpXd7xFeTNZa5o2mQOR6DoCupYilDYcJvMgSIRLn+W4EAcwhzdEP9gVG/suG+OTasfFXWrQ9EmBYeWLOOE0x/30IXBz8I7ket7XNgy8wFGoQ4wEZ3cHrbt3tj9rUt0UfBpR7rcT7sxsr5t71Fknp/AGlmBm3x6DyRsn9Za6XiY//P1dclZzr075O6XSvDXZEIhoAW3hQB6cUylmhQhFmInYarwQyJj+XBYxsxJwA05xp5WhJjSb2H+Oznt7lmqc1mwHk1VZ6jvNbpL+KMsAJDGme04Mr9vZ6p7RebhFhfUkyVZlZdA6p5oWWczR0tDAfDTxSsR/qOI6XWAxhTVDnwMGOz/mv7CAeZIazEQbcQW25DXdLfsqA2/qg8gCwUIdLAVl3fNCl5c8LXx4K/xvZI0=", "X-OriginatorOrg": "valinux.co.jp", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 25dcbf3b-eaa1-41bc-8016-08de3d7f3d28", "X-MS-Exchange-CrossTenant-AuthSource": "TYWP286MB2697.JPNP286.PROD.OUTLOOK.COM", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "17 Dec 2025 15:16:23.0288\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "7a57bee8-f73d-4c5f-a4f7-d72c91c8c111", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n 7JPH+8J+sTAYOZrEj4y03oyEaVbi5qYutqIbh6/jBMv9RpIk4886HWr58jBLGI+Bj8O/0q4TIGJE0zg1cjkhKQ==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "OS9P286MB4633" }, "content": "Historically both TX and RX have assumed the same per-QP MW slice\n(tx_max_entry == remote rx_max_entry), while those are calculated\nseparately in different places (pre and post the link-up negotiation\npoint). This has been safe because nt->link_is_up is never set to true\nunless the pre-determined qp_count are the same among them, and qp_count\nis typically limited to nt->mw_count, which should be carefully\nconfigured by admin.\n\nHowever, setup_qp_mw can actually split mw and handle multi-qps in one\nMW properly, so qp_count needs not to be limited by nt->mw_count. Once\nwe relaxing the limitation, pre-determined qp_count can differ among\nhost side and endpoint, and link-up negotiation can easily fail.\n\nMove the TX MW configuration (per-QP offset and size) into\nntb_transport_setup_qp_mw() so that both RX and TX layout decisions are\ncentralized in a single helper. ntb_transport_init_queue() now deals\nonly with per-QP software state, not with MW layout.\n\nThis keeps the previous behaviour, while preparing for relaxing the\nqp_count limitation and improving readibility.\n\nNo functional change is intended.\n\nSigned-off-by: Koichiro Den <den@valinux.co.jp>\n---\n drivers/ntb/ntb_transport.c | 76 ++++++++++++++++---------------------\n 1 file changed, 32 insertions(+), 44 deletions(-)", "diff": "diff --git a/drivers/ntb/ntb_transport.c b/drivers/ntb/ntb_transport.c\nindex 57b4c0511927..42abd1ce02d5 100644\n--- a/drivers/ntb/ntb_transport.c\n+++ b/drivers/ntb/ntb_transport.c\n@@ -569,7 +569,10 @@ static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt,\n \tstruct ntb_transport_mw *mw;\n \tstruct ntb_dev *ndev = nt->ndev;\n \tstruct ntb_queue_entry *entry;\n-\tunsigned int rx_size, num_qps_mw;\n+\tphys_addr_t mw_base;\n+\tresource_size_t mw_size;\n+\tunsigned int rx_size, tx_size, num_qps_mw;\n+\tu64 qp_offset;\n \tunsigned int mw_num, mw_count, qp_count;\n \tunsigned int i;\n \tint node;\n@@ -588,13 +591,38 @@ static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt,\n \telse\n \t\tnum_qps_mw = qp_count / mw_count;\n \n-\trx_size = (unsigned int)mw->xlat_size / num_qps_mw;\n-\tqp->rx_buff = mw->virt_addr + rx_size * (qp_num / mw_count);\n-\trx_size -= sizeof(struct ntb_rx_info);\n+\tmw_base = nt->mw_vec[mw_num].phys_addr;\n+\tmw_size = nt->mw_vec[mw_num].phys_size;\n+\n+\tif (mw_size > mw->xlat_size)\n+\t\tmw_size = mw->xlat_size;\n+\tif (max_mw_size && mw_size > max_mw_size)\n+\t\tmw_size = max_mw_size;\n+\n+\ttx_size = (unsigned int)mw_size / num_qps_mw;\n+\tqp_offset = tx_size * (qp_num / mw_count);\n+\n+\tqp->rx_buff = mw->virt_addr + qp_offset;\n+\n+\tqp->tx_mw_size = tx_size;\n+\tqp->tx_mw = nt->mw_vec[mw_num].vbase + qp_offset;\n+\tif (!qp->tx_mw)\n+\t\treturn -EINVAL;\n+\n+\tqp->tx_mw_phys = mw_base + qp_offset;\n+\tif (!qp->tx_mw_phys)\n+\t\treturn -EINVAL;\n \n+\trx_size = tx_size;\n+\trx_size -= sizeof(struct ntb_rx_info);\n \tqp->remote_rx_info = qp->rx_buff + rx_size;\n \n+\ttx_size -= sizeof(struct ntb_rx_info);\n+\tqp->rx_info = qp->tx_mw + tx_size;\n+\n \t/* Due to housekeeping, there must be atleast 2 buffs */\n+\tqp->tx_max_frame = min(transport_mtu, tx_size / 2);\n+\tqp->tx_max_entry = tx_size / qp->tx_max_frame;\n \tqp->rx_max_frame = min(transport_mtu, rx_size / 2);\n \tqp->rx_max_entry = rx_size / qp->rx_max_frame;\n \tqp->rx_index = 0;\n@@ -1133,16 +1161,6 @@ static int ntb_transport_init_queue(struct ntb_transport_ctx *nt,\n \t\t\t\t unsigned int qp_num)\n {\n \tstruct ntb_transport_qp *qp;\n-\tphys_addr_t mw_base;\n-\tresource_size_t mw_size;\n-\tunsigned int num_qps_mw, tx_size;\n-\tunsigned int mw_num, mw_count, qp_count;\n-\tu64 qp_offset;\n-\n-\tmw_count = nt->mw_count;\n-\tqp_count = nt->qp_count;\n-\n-\tmw_num = QP_TO_MW(nt, qp_num);\n \n \tqp = &nt->qp_vec[qp_num];\n \tqp->qp_num = qp_num;\n@@ -1152,36 +1170,6 @@ static int ntb_transport_init_queue(struct ntb_transport_ctx *nt,\n \tqp->event_handler = NULL;\n \tntb_qp_link_context_reset(qp);\n \n-\tif (mw_num < qp_count % mw_count)\n-\t\tnum_qps_mw = qp_count / mw_count + 1;\n-\telse\n-\t\tnum_qps_mw = qp_count / mw_count;\n-\n-\tmw_base = nt->mw_vec[mw_num].phys_addr;\n-\tmw_size = nt->mw_vec[mw_num].phys_size;\n-\n-\tif (max_mw_size && mw_size > max_mw_size)\n-\t\tmw_size = max_mw_size;\n-\n-\ttx_size = (unsigned int)mw_size / num_qps_mw;\n-\tqp_offset = tx_size * (qp_num / mw_count);\n-\n-\tqp->tx_mw_size = tx_size;\n-\tqp->tx_mw = nt->mw_vec[mw_num].vbase + qp_offset;\n-\tif (!qp->tx_mw)\n-\t\treturn -EINVAL;\n-\n-\tqp->tx_mw_phys = mw_base + qp_offset;\n-\tif (!qp->tx_mw_phys)\n-\t\treturn -EINVAL;\n-\n-\ttx_size -= sizeof(struct ntb_rx_info);\n-\tqp->rx_info = qp->tx_mw + tx_size;\n-\n-\t/* Due to housekeeping, there must be atleast 2 buffs */\n-\tqp->tx_max_frame = min(transport_mtu, tx_size / 2);\n-\tqp->tx_max_entry = tx_size / qp->tx_max_frame;\n-\n \tif (nt->debugfs_node_dir) {\n \t\tchar debugfs_name[8];\n \n", "prefixes": [ "RFC", "v3", "11/35" ] }