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GET /api/1.0/patches/2175155/?format=api
{ "id": 2175155, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175155/?format=api", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.0/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20251217-eyeq6lplus-v1-7-e9cdbd3af4c2@bootlin.com>", "date": "2025-12-17T13:35:57", "name": "[07/13] clk: eyeq: Skip post-divisor when computing PLL frequency", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f2755f90a5ef3c72298518ef0d82835865a1ac14", "submitter": { "id": 91083, "url": "http://patchwork.ozlabs.org/api/1.0/people/91083/?format=api", "name": "Benoît Monin", "email": "benoit.monin@bootlin.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20251217-eyeq6lplus-v1-7-e9cdbd3af4c2@bootlin.com/mbox/", "series": [ { "id": 485688, "url": "http://patchwork.ozlabs.org/api/1.0/series/485688/?format=api", "date": "2025-12-17T13:35:54", "name": "Introducing the Mobileye EyeQ6Lplus SoC", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/485688/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2175155/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-gpio+bounces-29702-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=ct8m0FHE;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim;\n\tt=1765978584; h=from:subject:date:message-id:to:cc:mime-version:content-type:\n\t content-transfer-encoding:in-reply-to:references;\n\tbh=cMM9rHXVDDAVjpqacJOwBMRQUCSdXDMyytqvCHPp5HQ=;\n\tb=ct8m0FHEVF4z8HdVRSeAYnYveUk/Dg8iUITZ+wGlx+re6WsV/roBWQZXd32Qu9++BU92Cg\n\tfFVGDxbUHR/zx8K0FtmhMrlRR7Fkm+fPMmic9GiTDhKPSM0hTp/HsAI+ZrX6udmJOHuqkp\n\t9imzlf1Av3FJY60D9E/+xq0n0TbJwHweeMdIBZsh0BHiOE4OSX5yLr21rcAL5dlLSrHWL3\n\tU7lBLdCjXPqKO64pjoFdJwBm5B2VzNekvCdj3U6oz3ShA7q5NfYDz3UhO98WFI5NIE50cD\n\tEyB1eBc7a/1z0Ac2SKN4Xvpx01NjjGC+cl+HuIXykGogRIb+mhwpwfihNZOgZw==", "From": "=?utf-8?q?Beno=C3=AEt_Monin?= <benoit.monin@bootlin.com>", "Date": "Wed, 17 Dec 2025 14:35:57 +0100", "Subject": "[PATCH 07/13] clk: eyeq: Skip post-divisor when computing PLL\n frequency", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "8bit", "Message-Id": "<20251217-eyeq6lplus-v1-7-e9cdbd3af4c2@bootlin.com>", "References": "<20251217-eyeq6lplus-v1-0-e9cdbd3af4c2@bootlin.com>", "In-Reply-To": "<20251217-eyeq6lplus-v1-0-e9cdbd3af4c2@bootlin.com>", "To": "Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>,\n Gregory CLEMENT <gregory.clement@bootlin.com>,\n =?utf-8?q?Th=C3=A9o_Lebrun?= <theo.lebrun@bootlin.com>,\n Thomas Bogendoerfer <tsbogend@alpha.franken.de>,\n Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>,\n Michael Turquette <mturquette@baylibre.com>,\n Stephen Boyd <sboyd@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>,\n Linus Walleij <linusw@kernel.org>", "Cc": "Thomas Petazzoni <thomas.petazzoni@bootlin.com>,\n Tawfik Bayouk <tawfik.bayouk@mobileye.com>, linux-mips@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?Beno?=\n\t=?utf-8?q?=C3=AEt_Monin?= <benoit.monin@bootlin.com>", "X-Mailer": "b4 0.14.3", "X-Last-TLS-Session-Version": "TLSv1.3" }, "content": "The output of the PLL is routed before the post-divisor so it should be\nignored when computing the frequency of the PLL, functional change is\nimplemented to reflect how the clock signal is wired internally.\n\nFor the PLL of the EyeQ5, EyeQ6L, and EyeQ6H, this change has no impact\nas the post-divisor is either reported as disabled or set to 1. The PLL\nfrequency is the same before and after the post-divisor.\n\nFor the PLL in EyeQ6Lplus, however, the post-divisor is not 1, so it must\nbe ignored to compute the correct frequency.\n\nSigned-off-by: Benoît Monin <benoit.monin@bootlin.com>\n---\n drivers/clk/clk-eyeq.c | 2 --\n 1 file changed, 2 deletions(-)", "diff": "diff --git a/drivers/clk/clk-eyeq.c b/drivers/clk/clk-eyeq.c\nindex ea1c3d78e7cd..182b408b6aa4 100644\n--- a/drivers/clk/clk-eyeq.c\n+++ b/drivers/clk/clk-eyeq.c\n@@ -177,8 +177,6 @@ static int eqc_pll_parse_registers(u32 r0, u32 r1, unsigned long *mult,\n \n \t*mult = FIELD_GET(PCSR0_INTIN, r0);\n \t*div = FIELD_GET(PCSR0_REF_DIV, r0);\n-\tif (r0 & PCSR0_FOUTPOSTDIV_EN)\n-\t\t*div *= FIELD_GET(PCSR0_POST_DIV1, r0) * FIELD_GET(PCSR0_POST_DIV2, r0);\n \n \t/* Fractional mode, in 2^20 (0x100000) parts. */\n \tif (r0 & PCSR0_DSM_EN) {\n", "prefixes": [ "07/13" ] }