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GET /api/1.0/patches/2175143/?format=api
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{
    "id": 2175143,
    "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175143/?format=api",
    "project": {
        "id": 67,
        "url": "http://patchwork.ozlabs.org/api/1.0/projects/67/?format=api",
        "name": "OpenSBI development",
        "link_name": "opensbi",
        "list_id": "opensbi.lists.infradead.org",
        "list_email": "opensbi@lists.infradead.org",
        "web_url": "https://github.com/riscv/opensbi",
        "scm_url": "",
        "webscm_url": ""
    },
    "msgid": "<20251217132959.545197-5-ganboing@gmail.com>",
    "date": "2025-12-17T13:29:56",
    "name": "[v5,4/7] lib: sbi: give platform choice of using single memregion to cover OpenSBI",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": false,
    "hash": "7c74f4b96b0e18b9bfc2b19b017e274721bc285c",
    "submitter": {
        "id": 86401,
        "url": "http://patchwork.ozlabs.org/api/1.0/people/86401/?format=api",
        "name": "Bo Gan",
        "email": "ganboing@gmail.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20251217132959.545197-5-ganboing@gmail.com/mbox/",
    "series": [
        {
            "id": 485687,
            "url": "http://patchwork.ozlabs.org/api/1.0/series/485687/?format=api",
            "date": "2025-12-17T13:29:55",
            "name": "Initial ESWIN/EIC7700 and Hifive P550 support",
            "version": 5,
            "mbox": "http://patchwork.ozlabs.org/series/485687/mbox/"
        }
    ],
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2175143/checks/",
    "tags": {},
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        "From": "Bo Gan <ganboing@gmail.com>",
        "To": "opensbi@lists.infradead.org",
        "Cc": "linmin@eswincomputing.com,\n\tpinkesh.vaghela@einfochips.com,\n\tgaohan@iscas.ac.cn,\n\tsamuel@sholland.org,\n\twangxiang@iscas.ac.cn",
        "Subject": "[PATCH v5 4/7] lib: sbi: give platform choice of using single\n memregion to cover OpenSBI",
        "Date": "Wed, 17 Dec 2025 05:29:56 -0800",
        "Message-Id": "<20251217132959.545197-5-ganboing@gmail.com>",
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        "In-Reply-To": "<20251217132959.545197-1-ganboing@gmail.com>",
        "References": "<20251217132959.545197-1-ganboing@gmail.com>",
        "MIME-Version": "1.0",
        "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ",
        "X-CRM114-CacheID": "sfid-20251217_053151_125069_6F1B69BA ",
        "X-CRM114-Status": "GOOD (  14.78  )",
        "X-Spam-Score": "-2.1 (--)",
        "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam.  The original\n message has been attached to this so you can view it or label\n similar future email.  If you have any questions, see\n the administrator of that system for details.\n Content preview:  By default the OpenSBI itself is covered by 2 memregions\n for\n    RX/RW sections. This is required by platforms with Smepmp to enforce\n proper\n    permissions in M mode. Note: M-mode only regions can't have RWX [...]\n Content analysis details:   (-2.1 points, 5.0 required)\n  pts rule name              description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE     RBL: Sender listed at https://www.dnswl.org/, no\n                             trust\n                             [2607:f8b0:4864:20:0:0:0:434 listed in]\n                             [list.dnswl.org]\n -0.0 SPF_PASS               SPF: sender matches SPF record\n  0.0 SPF_HELO_NONE          SPF: HELO does not publish an SPF Record\n -0.1 DKIM_VALID_EF          Message has a valid DKIM or DK signature from\n                             envelope-from domain\n -0.1 DKIM_VALID_AU          Message has a valid DKIM or DK signature from\n author's\n                             domain\n -0.1 DKIM_VALID             Message has at least one valid DKIM or DK\n signature\n  0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n not necessarily valid\n -1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n                             [score: 0.0000]\n  0.0 FREEMAIL_FROM          Sender email is commonly abused enduser mail\n provider\n                             [ganboing(at)gmail.com]",
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        "Sender": "\"opensbi\" <opensbi-bounces@lists.infradead.org>",
        "Errors-To": "opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"
    },
    "content": "By default the OpenSBI itself is covered by 2 memregions for RX/RW\nsections. This is required by platforms with Smepmp to enforce\nproper permissions in M mode. Note: M-mode only regions can't\nhave RWX permissions with Smepmp. Platforms with traditional PMPs\nwon't be able to benefit from it, as both regions are effectively\nRWX in M mode, but usually it's harmless to so. Now we provide\nthese platforms with an option to disable this logic. It saves 1\nPMP entry. For platforms really in short of PMPs, it does make a\ndifference.\n\nNote: Platform requesting single OpenSBI memregion must be using\n      traditional (old) PMP. We expect the platform code to do\n      the right thing.\n\nSigned-off-by: Bo Gan <ganboing@gmail.com>\n---\n include/sbi/sbi_platform.h | 21 +++++++++++++++++++++\n lib/sbi/sbi_domain.c       | 36 ++++++++++++++++++++++++------------\n 2 files changed, 45 insertions(+), 12 deletions(-)",
    "diff": "diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h\nindex d75c12de..e65d9877 100644\n--- a/include/sbi/sbi_platform.h\n+++ b/include/sbi/sbi_platform.h\n@@ -76,6 +76,9 @@ struct sbi_platform_operations {\n \t/* Check if specified HART is allowed to do cold boot */\n \tbool (*cold_boot_allowed)(u32 hartid);\n \n+\t/* Check if platform requires single firmware region */\n+\tbool (*single_fw_region)(void);\n+\n \t/* Platform nascent initialization */\n \tint (*nascent_init)(void);\n \n@@ -347,6 +350,24 @@ static inline bool sbi_platform_cold_boot_allowed(\n \treturn true;\n }\n \n+/**\n+ * Check whether platform requires single firmware region\n+ *\n+ * Note: Single firmware region only works with legacy PMP because with\n+ * Smepmp M-mode only regions can't have RWX permissions.\n+ *\n+ * @param plat pointer to struct sbi_platform\n+ *\n+ * @return true if single firmware region required and false otherwise\n+ */\n+static inline bool sbi_platform_single_fw_region(\n+\t\t\t\t\tconst struct sbi_platform *plat)\n+{\n+\tif (plat && sbi_platform_ops(plat)->single_fw_region)\n+\t\treturn sbi_platform_ops(plat)->single_fw_region();\n+\treturn false;\n+}\n+\n /**\n  * Nascent (very early) initialization for current HART\n  *\ndiff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c\nindex a19bf25b..90cbb540 100644\n--- a/lib/sbi/sbi_domain.c\n+++ b/lib/sbi/sbi_domain.c\n@@ -923,18 +923,30 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)\n \troot.possible_harts = root_hmask;\n \n \t/* Root domain firmware memory region */\n-\tsbi_domain_memregion_init(scratch->fw_start, scratch->fw_rw_offset,\n-\t\t\t\t  (SBI_DOMAIN_MEMREGION_M_READABLE |\n-\t\t\t\t   SBI_DOMAIN_MEMREGION_M_EXECUTABLE |\n-\t\t\t\t   SBI_DOMAIN_MEMREGION_FW),\n-\t\t\t\t  &root_memregs[root_memregs_count++]);\n-\n-\tsbi_domain_memregion_init((scratch->fw_start + scratch->fw_rw_offset),\n-\t\t\t\t  (scratch->fw_size - scratch->fw_rw_offset),\n-\t\t\t\t  (SBI_DOMAIN_MEMREGION_M_READABLE |\n-\t\t\t\t   SBI_DOMAIN_MEMREGION_M_WRITABLE |\n-\t\t\t\t   SBI_DOMAIN_MEMREGION_FW),\n-\t\t\t\t  &root_memregs[root_memregs_count++]);\n+\tif (sbi_platform_single_fw_region(sbi_platform_ptr(scratch))) {\n+\t\tsbi_domain_memregion_init(scratch->fw_start, scratch->fw_size,\n+\t\t\t\t\t  (SBI_DOMAIN_MEMREGION_M_READABLE |\n+\t\t\t\t\t   SBI_DOMAIN_MEMREGION_M_WRITABLE |\n+\t\t\t\t\t   SBI_DOMAIN_MEMREGION_M_EXECUTABLE |\n+\t\t\t\t\t   SBI_DOMAIN_MEMREGION_FW),\n+\t\t\t\t\t  &root_memregs[root_memregs_count++]);\n+\t} else {\n+\t\tsbi_domain_memregion_init(scratch->fw_start,\n+\t\t\t\t\t  scratch->fw_rw_offset,\n+\t\t\t\t\t  (SBI_DOMAIN_MEMREGION_M_READABLE |\n+\t\t\t\t\t   SBI_DOMAIN_MEMREGION_M_EXECUTABLE |\n+\t\t\t\t\t   SBI_DOMAIN_MEMREGION_FW),\n+\t\t\t\t\t  &root_memregs[root_memregs_count++]);\n+\n+\t\tsbi_domain_memregion_init((scratch->fw_start +\n+\t\t\t\t\t   scratch->fw_rw_offset),\n+\t\t\t\t\t  (scratch->fw_size -\n+\t\t\t\t\t   scratch->fw_rw_offset),\n+\t\t\t\t\t  (SBI_DOMAIN_MEMREGION_M_READABLE |\n+\t\t\t\t\t   SBI_DOMAIN_MEMREGION_M_WRITABLE |\n+\t\t\t\t\t   SBI_DOMAIN_MEMREGION_FW),\n+\t\t\t\t\t  &root_memregs[root_memregs_count++]);\n+\t}\n \n \troot.fw_region_inited = true;\n \n",
    "prefixes": [
        "v5",
        "4/7"
    ]
}