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GET /api/1.0/patches/2175120/?format=api
{ "id": 2175120, "url": "http://patchwork.ozlabs.org/api/1.0/patches/2175120/?format=api", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.0/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20251217-staging-ad4062-v4-7-7890a2951a8f@analog.com>", "date": "2025-12-17T12:13:30", "name": "[v4,7/9] iio: adc: ad4062: Add IIO Events support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d1d96adfb1c96ad98543b5fe77f0258a06e00dda", "submitter": { "id": 90425, "url": "http://patchwork.ozlabs.org/api/1.0/people/90425/?format=api", "name": "Jorge Marques", "email": "jorge.marques@analog.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20251217-staging-ad4062-v4-7-7890a2951a8f@analog.com/mbox/", "series": [ { "id": 485673, "url": "http://patchwork.ozlabs.org/api/1.0/series/485673/?format=api", "date": "2025-12-17T12:13:23", "name": "Add support for AD4062 device family", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/485673/mbox/" } ], "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2175120/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-gpio+bounces-29687-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=analog.com header.i=@analog.com header.a=rsa-sha256\n header.s=DKIM header.b=kbVKa8X/;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-ID": "<20251217-staging-ad4062-v4-7-7890a2951a8f@analog.com>", "References": "<20251217-staging-ad4062-v4-0-7890a2951a8f@analog.com>", "In-Reply-To": "<20251217-staging-ad4062-v4-0-7890a2951a8f@analog.com>", "To": "Lars-Peter Clausen <lars@metafoo.de>,\n Michael Hennerich <Michael.Hennerich@analog.com>,\n Jonathan Cameron <jic23@kernel.org>, \"David Lechner\" <dlechner@baylibre.com>,\n\t=?utf-8?q?Nuno_S=C3=A1?= <nuno.sa@analog.com>,\n Andy Shevchenko <andy@kernel.org>, Rob Herring <robh@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>,\n Jonathan Corbet <corbet@lwn.net>, Linus Walleij <linus.walleij@linaro.org>,\n Bartosz Golaszewski <brgl@bgdev.pl>", "CC": "<linux-iio@vger.kernel.org>, <devicetree@vger.kernel.org>,\n <linux-kernel@vger.kernel.org>, <linux-doc@vger.kernel.org>,\n <linux-gpio@vger.kernel.org>, Jorge Marques <jorge.marques@analog.com>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1765973610; l=17372;\n i=jorge.marques@analog.com; s=20250303; h=from:subject:message-id;\n bh=c5sxELgxedBXy9/Ij3kKXZWr3/c8v9Q6WMmKuYjKC5o=;\n b=o9KNm64Ei5wL3Ycn4jYOfLwiH5eWBl598nFvjuPsAh+8sii4yYG7WK6pEk9bpWrUV6+wRp4yE\n XGdWkqwcqYuC/uFc4V0yp4WhOrDfrIWCnltSQpkhIbRJTHTSC1Qrhcj", "X-Developer-Key": "i=jorge.marques@analog.com; a=ed25519;\n pk=NUR1IZZMH0Da3QbJ2tBSznSPVfRpuoWdhBzKGSpAdbg=", "X-ADIRuleOP-NewSCL": "Rule Triggered", "X-Proofpoint-ORIG-GUID": "sxj_IoQzF0gH5z0LEd3mZtSroXNlQCri", "X-Authority-Analysis": "v=2.4 cv=Ct6ys34D c=1 sm=1 tr=0 ts=69429e8b cx=c_pps\n a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17\n a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=VkNPw1HP01LnGYTKEx00:22\n a=gAnH3GRIAAAA:8 a=ctgkBTGrW6sVLClIBwcA:9 a=QEXdDO2ut3YA:10", "X-Proofpoint-GUID": "sxj_IoQzF0gH5z0LEd3mZtSroXNlQCri", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjUxMjE3MDA5NSBTYWx0ZWRfXyhoKX3g30VIp\n tUxTAJXVsXFQUwPgBeyMr/u82rLhkafSlvdUvTy50FjO2uhvGp2gp7GfsJTFwP23VD1CDQthKC4\n SmM/sb7Rgkg2y8MiHXtghRhlHw6RlDbG+tDtnGh0PdTw6sZgGXhfoSbFha/qB4E0geTXGb4w9GJ\n LlqRzz9tuyz1VKREHiOHYSceFdCsGGfBoVC4NBHWuYMmHQAmGpCFDUz0vfmLKC0J7FBU8xEhWY0\n WilyZvpWuDAV/F2HobKkuTyk/jpEMP/ZVD6fO0yQjDWs+SinXd7iaF8LAKd3KjpPnK2dv56sj8M\n LOTmZ2cmDEddWSBmib2r7SaCpg/tY6OcbamV0NMyY/paIjg3c5lcl4P+MDdxLMNg2RulZXsm5dJ\n H3/5tK4sVEdxC20lZJ96XGhkdsdGbQ==", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49\n definitions=2025-12-17_01,2025-12-16_05,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n bulkscore=0 spamscore=0 adultscore=0 priorityscore=1501 phishscore=0\n suspectscore=0 clxscore=1015 malwarescore=0 lowpriorityscore=0\n impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc=\n route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001\n definitions=main-2512170095" }, "content": "Adds support for IIO Events. Optionally, gp0 is assigned as Threshold\nEither signal, if not present, fallback to an I3C IBI with the same\nrole.\n\nSigned-off-by: Jorge Marques <jorge.marques@analog.com>\n---\n drivers/iio/adc/ad4062.c | 407 ++++++++++++++++++++++++++++++++++++++++++++++-\n 1 file changed, 406 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/iio/adc/ad4062.c b/drivers/iio/adc/ad4062.c\nindex afc8b6969cf08..2084f0058627d 100644\n--- a/drivers/iio/adc/ad4062.c\n+++ b/drivers/iio/adc/ad4062.c\n@@ -14,7 +14,9 @@\n #include <linux/i3c/device.h>\n #include <linux/i3c/master.h>\n #include <linux/iio/buffer.h>\n+#include <linux/iio/events.h>\n #include <linux/iio/iio.h>\n+#include <linux/iio/sysfs.h>\n #include <linux/iio/trigger.h>\n #include <linux/iio/trigger_consumer.h>\n #include <linux/iio/triggered_buffer.h>\n@@ -51,14 +53,22 @@\n #define AD4062_REG_ADC_CONFIG_SCALE_EN_MSK\t\tBIT(4)\n #define AD4062_REG_AVG_CONFIG\t\t\t\t0x23\n #define AD4062_REG_GP_CONF\t\t\t\t0x24\n+#define AD4062_REG_GP_CONF_MODE_MSK_0\t\tGENMASK(2, 0)\n #define AD4062_REG_GP_CONF_MODE_MSK_1\t\tGENMASK(6, 4)\n #define AD4062_REG_INTR_CONF\t\t\t\t0x25\n+#define AD4062_REG_INTR_CONF_EN_MSK_0\t\tGENMASK(1, 0)\n #define AD4062_REG_INTR_CONF_EN_MSK_1\t\tGENMASK(5, 4)\n #define AD4062_REG_TIMER_CONFIG\t\t\t\t0x27\n #define AD4062_REG_TIMER_CONFIG_FS_MASK\t\tGENMASK(7, 4)\n+#define AD4062_REG_MAX_LIMIT\t\t\t\t0x29\n+#define AD4062_REG_MIN_LIMIT\t\t\t\t0x2B\n+#define AD4062_REG_MAX_HYST\t\t\t\t0x2C\n+#define AD4062_REG_MIN_HYST\t\t\t\t0x2D\n #define AD4062_REG_MON_VAL\t\t\t\t0x2F\n #define AD4062_REG_ADC_IBI_EN\t\t\t\t0x31\n #define AD4062_REG_ADC_IBI_EN_CONV_TRIGGER\t\tBIT(2)\n+#define AD4062_REG_ADC_IBI_EN_MAX\t\t\tBIT(1)\n+#define AD4062_REG_ADC_IBI_EN_MIN\t\t\tBIT(0)\n #define AD4062_REG_FUSE_CRC\t\t\t\t0x40\n #define AD4062_REG_DEVICE_STATUS\t\t\t0x41\n #define AD4062_REG_DEVICE_STATUS_DEVICE_RESET\tBIT(6)\n@@ -78,9 +88,13 @@\n #define AD4060_PROD_ID\t\t0x7A\n #define AD4062_PROD_ID\t\t0x7C\n \n+#define AD4062_GP_INTR\t\t0x1\n #define AD4062_GP_DRDY\t\t0x2\n \n+#define AD4062_LIMIT_BITS\t12\n+\n #define AD4062_INTR_EN_NEITHER\t0x0\n+#define AD4062_INTR_EN_EITHER\t0x3\n \n #define AD4062_TCONV_NS\t\t270\n \n@@ -149,10 +163,12 @@ struct ad4062_state {\n \tstruct iio_dev *indio_dev;\n \tstruct i3c_device *i3cdev;\n \tstruct regmap *regmap;\n+\tbool wait_event;\n \tint vref_uV;\n \tunsigned int samp_freqs[ARRAY_SIZE(ad4062_conversion_freqs)];\n \tbool gpo_irq[2];\n \tu16 sampling_frequency;\n+\tu16 events_frequency;\n \tu8 oversamp_ratio;\n \tu8 conv_sizeof;\n \tu8 conv_addr;\n@@ -188,6 +204,26 @@ static const struct regmap_access_table ad4062_regmap_wr_table = {\n \t.n_yes_ranges = ARRAY_SIZE(ad4062_regmap_wr_ranges),\n };\n \n+static const struct iio_event_spec ad4062_events[] = {\n+\t{\n+\t\t.type = IIO_EV_TYPE_THRESH,\n+\t\t.dir = IIO_EV_DIR_EITHER,\n+\t\t.mask_shared_by_all = BIT(IIO_EV_INFO_ENABLE),\n+\t},\n+\t{\n+\t\t.type = IIO_EV_TYPE_THRESH,\n+\t\t.dir = IIO_EV_DIR_RISING,\n+\t\t.mask_shared_by_all = BIT(IIO_EV_INFO_VALUE) |\n+\t\t\t\t BIT(IIO_EV_INFO_HYSTERESIS),\n+\t},\n+\t{\n+\t\t.type = IIO_EV_TYPE_THRESH,\n+\t\t.dir = IIO_EV_DIR_FALLING,\n+\t\t.mask_shared_by_all = BIT(IIO_EV_INFO_VALUE) |\n+\t\t\t\t BIT(IIO_EV_INFO_HYSTERESIS),\n+\t},\n+};\n+\n #define AD4062_CHAN(bits) {\t\t\t\t\t\t\t\t\\\n \t.type = IIO_VOLTAGE,\t\t\t\t\t\t\t\t\\\n \t.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_RAW) |\t\t\t\t\\\n@@ -199,6 +235,8 @@ static const struct regmap_access_table ad4062_regmap_wr_table = {\n \t.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),\t\t\\\n \t.indexed = 1,\t\t\t\t\t\t\t\t\t\\\n \t.channel = 0,\t\t\t\t\t\t\t\t\t\\\n+\t.event_spec = ad4062_events,\t\t\t\t\t\t\t\\\n+\t.num_event_specs = ARRAY_SIZE(ad4062_events),\t\t\t\t\t\\\n \t.has_ext_scan_type = 1,\t\t\t\t\t\t\t\t\\\n \t.ext_scan_type = ad4062_scan_type_##bits##_s,\t\t\t\t\t\\\n \t.num_ext_scan_type = ARRAY_SIZE(ad4062_scan_type_##bits##_s),\t\t\t\\\n@@ -218,6 +256,73 @@ static const struct ad4062_chip_info ad4062_chip_info = {\n \t.avg_max = 4096,\n };\n \n+static ssize_t sampling_frequency_show(struct device *dev,\n+\t\t\t\t struct device_attribute *attr, char *buf)\n+{\n+\tstruct ad4062_state *st = iio_priv(dev_to_iio_dev(dev));\n+\n+\treturn sysfs_emit(buf, \"%d\\n\", ad4062_conversion_freqs[st->events_frequency]);\n+}\n+\n+static int sampling_frequency_store_dispatch(struct iio_dev *indio_dev,\n+\t\t\t\t\t const char *buf)\n+{\n+\tstruct ad4062_state *st = iio_priv(indio_dev);\n+\tint val, ret;\n+\n+\tif (st->wait_event)\n+\t\treturn -EBUSY;\n+\n+\tret = kstrtoint(buf, 10, &val);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tst->events_frequency = find_closest_descending(val, ad4062_conversion_freqs,\n+\t\t\t\t\t\t ARRAY_SIZE(ad4062_conversion_freqs));\n+\treturn 0;\n+}\n+\n+static ssize_t sampling_frequency_store(struct device *dev,\n+\t\t\t\t\tstruct device_attribute *attr,\n+\t\t\t\t\tconst char *buf, size_t len)\n+{\n+\tstruct iio_dev *indio_dev = dev_to_iio_dev(dev);\n+\tint ret;\n+\n+\tif (!iio_device_claim_direct(indio_dev))\n+\t\treturn -EBUSY;\n+\n+\tret = sampling_frequency_store_dispatch(indio_dev, buf);\n+\tiio_device_release_direct(indio_dev);\n+\treturn ret ?: len;\n+}\n+\n+static IIO_DEVICE_ATTR_RW(sampling_frequency, 0);\n+\n+static ssize_t sampling_frequency_available_show(struct device *dev,\n+\t\t\t\t\t\t struct device_attribute *attr,\n+\t\t\t\t\t\t char *buf)\n+{\n+\tint ret = 0;\n+\n+\tfor (u8 i = 0; i < ARRAY_SIZE(ad4062_conversion_freqs); i++)\n+\t\tret += sysfs_emit_at(buf, ret, \"%d%s\", ad4062_conversion_freqs[i],\n+\t\t\t\t i != (ARRAY_SIZE(ad4062_conversion_freqs) - 1) ? \" \" : \"\\n\");\n+\treturn ret;\n+}\n+\n+static IIO_DEVICE_ATTR_RO(sampling_frequency_available, 0);\n+\n+static struct attribute *ad4062_event_attributes[] = {\n+\t&iio_dev_attr_sampling_frequency.dev_attr.attr,\n+\t&iio_dev_attr_sampling_frequency_available.dev_attr.attr,\n+\tNULL\n+};\n+\n+static const struct attribute_group ad4062_event_attribute_group = {\n+\t.attrs = ad4062_event_attributes,\n+};\n+\n static int ad4062_set_oversampling_ratio(struct ad4062_state *st, int val, int val2)\n {\n \tconst u32 _max = st->chip->avg_max;\n@@ -344,9 +449,11 @@ static int ad4062_conversion_frequency_set(struct ad4062_state *st, u8 val)\n static int ad4062_set_operation_mode(struct ad4062_state *st,\n \t\t\t\t enum ad4062_operation_mode mode)\n {\n+\tconst unsigned int samp_freq = mode == AD4062_MONITOR_MODE ?\n+\t\t\t\t st->events_frequency : st->sampling_frequency;\n \tint ret;\n \n-\tret = ad4062_conversion_frequency_set(st, st->sampling_frequency);\n+\tret = ad4062_conversion_frequency_set(st, samp_freq);\n \tif (ret)\n \t\treturn ret;\n \n@@ -355,6 +462,17 @@ static int ad4062_set_operation_mode(struct ad4062_state *st,\n \tif (ret)\n \t\treturn ret;\n \n+\tif (mode == AD4062_MONITOR_MODE) {\n+\t\t/* Change address pointer to enter monitor mode */\n+\t\tstruct i3c_priv_xfer xfer_trigger = {\n+\t\t\t.data.out = &st->conv_addr,\n+\t\t\t.len = sizeof(st->conv_addr),\n+\t\t\t.rnw = false,\n+\t\t};\n+\t\tst->conv_addr = AD4062_REG_CONV_TRIGGER_32BITS;\n+\t\treturn i3c_device_do_priv_xfers(st->i3cdev, &xfer_trigger, 1);\n+\t}\n+\n \treturn regmap_write(st->regmap, AD4062_REG_MODE_SET,\n \t\t\t AD4062_REG_MODE_SET_ENTER_ADC);\n }\n@@ -385,6 +503,13 @@ static int ad4062_setup(struct iio_dev *indio_dev, struct iio_chan_spec const *c\n \tif (IS_ERR(scan_type))\n \t\treturn PTR_ERR(scan_type);\n \n+\tret = regmap_update_bits(st->regmap, AD4062_REG_GP_CONF,\n+\t\t\t\t AD4062_REG_GP_CONF_MODE_MSK_0,\n+\t\t\t\t FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_0,\n+\t\t\t\t\t AD4062_GP_INTR));\n+\tif (ret)\n+\t\treturn ret;\n+\n \tret = regmap_update_bits(st->regmap, AD4062_REG_GP_CONF,\n \t\t\t\t AD4062_REG_GP_CONF_MODE_MSK_1,\n \t\t\t\t FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_1,\n@@ -404,6 +529,13 @@ static int ad4062_setup(struct iio_dev *indio_dev, struct iio_chan_spec const *c\n \tif (ret)\n \t\treturn ret;\n \n+\tret = regmap_update_bits(st->regmap, AD4062_REG_INTR_CONF,\n+\t\t\t\t AD4062_REG_INTR_CONF_EN_MSK_0,\n+\t\t\t\t FIELD_PREP(AD4062_REG_INTR_CONF_EN_MSK_0,\n+\t\t\t\t\t AD4062_INTR_EN_EITHER));\n+\tif (ret)\n+\t\treturn ret;\n+\n \tret = regmap_update_bits(st->regmap, AD4062_REG_INTR_CONF,\n \t\t\t\t AD4062_REG_INTR_CONF_EN_MSK_1,\n \t\t\t\t FIELD_PREP(AD4062_REG_INTR_CONF_EN_MSK_1,\n@@ -416,6 +548,19 @@ static int ad4062_setup(struct iio_dev *indio_dev, struct iio_chan_spec const *c\n \t\t\t\t &st->buf.be16, sizeof(st->buf.be16));\n }\n \n+static irqreturn_t ad4062_irq_handler_thresh(int irq, void *private)\n+{\n+\tstruct iio_dev *indio_dev = private;\n+\n+\tiio_push_event(indio_dev,\n+\t\t IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,\n+\t\t\t\t\t IIO_EV_TYPE_THRESH,\n+\t\t\t\t\t IIO_EV_DIR_EITHER),\n+\t\t iio_get_time_ns(indio_dev));\n+\n+\treturn IRQ_HANDLED;\n+}\n+\n static irqreturn_t ad4062_irq_handler_drdy(int irq, void *private)\n {\n \tstruct iio_dev *indio_dev = private;\n@@ -434,6 +579,14 @@ static void ad4062_ibi_handler(struct i3c_device *i3cdev,\n {\n \tstruct ad4062_state *st = i3cdev_get_drvdata(i3cdev);\n \n+\tif (st->wait_event) {\n+\t\tiio_push_event(st->indio_dev,\n+\t\t\t IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,\n+\t\t\t\t\t\t IIO_EV_TYPE_THRESH,\n+\t\t\t\t\t\t IIO_EV_DIR_EITHER),\n+\t\t\t iio_get_time_ns(st->indio_dev));\n+\t\treturn;\n+\t}\n \tif (iio_buffer_enabled(st->indio_dev))\n \t\tiio_trigger_poll_nested(st->trigger);\n \telse\n@@ -529,6 +682,25 @@ static int ad4062_request_irq(struct iio_dev *indio_dev)\n \tstruct device *dev = &st->i3cdev->dev;\n \tint ret;\n \n+\tret = fwnode_irq_get_byname(dev_fwnode(&st->i3cdev->dev), \"gp0\");\n+\tif (ret == -EPROBE_DEFER)\n+\t\treturn ret;\n+\n+\tif (ret < 0) {\n+\t\tret = regmap_update_bits(st->regmap, AD4062_REG_ADC_IBI_EN,\n+\t\t\t\t\t AD4062_REG_ADC_IBI_EN_MAX | AD4062_REG_ADC_IBI_EN_MIN,\n+\t\t\t\t\t AD4062_REG_ADC_IBI_EN_MAX | AD4062_REG_ADC_IBI_EN_MIN);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t} else {\n+\t\tret = devm_request_threaded_irq(dev, ret, NULL,\n+\t\t\t\t\t\tad4062_irq_handler_thresh,\n+\t\t\t\t\t\tIRQF_ONESHOT, indio_dev->name,\n+\t\t\t\t\t\tindio_dev);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\n \tret = fwnode_irq_get_byname(dev_fwnode(&st->i3cdev->dev), \"gp1\");\n \tif (ret == -EPROBE_DEFER)\n \t\treturn ret;\n@@ -720,6 +892,9 @@ static int ad4062_read_chan_raw(struct ad4062_state *st, int *val)\n static int ad4062_read_raw_dispatch(struct ad4062_state *st,\n \t\t\t\t int *val, int *val2, long info)\n {\n+\tif (st->wait_event)\n+\t\treturn -EBUSY;\n+\n \tswitch (info) {\n \tcase IIO_CHAN_INFO_RAW:\n \t\treturn ad4062_read_chan_raw(st, val);\n@@ -761,6 +936,9 @@ static int ad4062_read_raw(struct iio_dev *indio_dev,\n static int ad4062_write_raw_dispatch(struct ad4062_state *st, int val, int val2,\n \t\t\t\t long info)\n {\n+\tif (st->wait_event)\n+\t\treturn -EBUSY;\n+\n \tswitch (info) {\n \tcase IIO_CHAN_INFO_OVERSAMPLING_RATIO:\n \t\treturn ad4062_set_oversampling_ratio(st, val, val2);\n@@ -789,7 +967,224 @@ static int ad4062_write_raw(struct iio_dev *indio_dev,\n \t\treturn -EBUSY;\n \n \tret = ad4062_write_raw_dispatch(st, val, val2, info);\n+\tiio_device_release_direct(indio_dev);\n+\treturn ret;\n+}\n+\n+static int pm_ad4062_monitor_mode_enable(struct ad4062_state *st)\n+{\n+\tint ret;\n+\n+\tPM_RUNTIME_ACQUIRE(&st->i3cdev->dev, pm);\n+\tret = PM_RUNTIME_ACQUIRE_ERR(&pm);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\treturn ad4062_set_operation_mode(st, AD4062_MONITOR_MODE);\n+}\n+\n+static int ad4062_monitor_mode_enable(struct ad4062_state *st)\n+{\n+\tint ret;\n+\n+\tret = pm_ad4062_monitor_mode_enable(st);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tpm_runtime_get_noresume(&st->i3cdev->dev);\n+\treturn 0;\n+}\n \n+static int ad4062_monitor_mode_disable(struct ad4062_state *st)\n+{\n+\tpm_runtime_put_autosuspend(&st->i3cdev->dev);\n+\treturn 0;\n+}\n+\n+static int ad4062_read_event_config(struct iio_dev *indio_dev,\n+\t\t\t\t const struct iio_chan_spec *chan,\n+\t\t\t\t enum iio_event_type type,\n+\t\t\t\t enum iio_event_direction dir)\n+{\n+\tstruct ad4062_state *st = iio_priv(indio_dev);\n+\n+\treturn st->wait_event;\n+}\n+\n+static int ad4062_write_event_config_dispatch(struct iio_dev *indio_dev,\n+\t\t\t\t\t bool state)\n+{\n+\tstruct ad4062_state *st = iio_priv(indio_dev);\n+\tint ret;\n+\n+\tif (st->wait_event == state)\n+\t\tret = 0;\n+\telse if (state)\n+\t\tret = ad4062_monitor_mode_enable(st);\n+\telse\n+\t\tret = ad4062_monitor_mode_disable(st);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tst->wait_event = state;\n+\treturn 0;\n+}\n+\n+static int ad4062_write_event_config(struct iio_dev *indio_dev,\n+\t\t\t\t const struct iio_chan_spec *chan,\n+\t\t\t\t enum iio_event_type type,\n+\t\t\t\t enum iio_event_direction dir,\n+\t\t\t\t bool state)\n+{\n+\tint ret;\n+\n+\tif (!iio_device_claim_direct(indio_dev))\n+\t\treturn -EBUSY;\n+\n+\tret = ad4062_write_event_config_dispatch(indio_dev, state);\n+\tiio_device_release_direct(indio_dev);\n+\treturn ret;\n+}\n+\n+static int __ad4062_read_event_info_value(struct ad4062_state *st,\n+\t\t\t\t\t enum iio_event_direction dir, int *val)\n+{\n+\tint ret;\n+\tu8 reg;\n+\n+\tif (dir == IIO_EV_DIR_RISING)\n+\t\treg = AD4062_REG_MAX_LIMIT;\n+\telse\n+\t\treg = AD4062_REG_MIN_LIMIT;\n+\n+\tret = regmap_bulk_read(st->regmap, reg, &st->buf.be16,\n+\t\t\t sizeof(st->buf.be16));\n+\tif (ret)\n+\t\treturn ret;\n+\n+\t*val = sign_extend32(be16_to_cpu(st->buf.be16), AD4062_LIMIT_BITS - 1);\n+\n+\treturn 0;\n+}\n+\n+static int __ad4062_read_event_info_hysteresis(struct ad4062_state *st,\n+\t\t\t\t\t enum iio_event_direction dir, int *val)\n+{\n+\tu8 reg;\n+\n+\tif (dir == IIO_EV_DIR_RISING)\n+\t\treg = AD4062_REG_MAX_HYST;\n+\telse\n+\t\treg = AD4062_REG_MIN_HYST;\n+\treturn regmap_read(st->regmap, reg, val);\n+}\n+\n+static int ad4062_read_event_config_dispatch(struct iio_dev *indio_dev,\n+\t\t\t\t\t enum iio_event_direction dir,\n+\t\t\t\t\t enum iio_event_info info, int *val)\n+{\n+\tstruct ad4062_state *st = iio_priv(indio_dev);\n+\n+\tif (st->wait_event)\n+\t\treturn -EBUSY;\n+\n+\tswitch (info) {\n+\tcase IIO_EV_INFO_VALUE:\n+\t\treturn __ad4062_read_event_info_value(st, dir, val);\n+\tcase IIO_EV_INFO_HYSTERESIS:\n+\t\treturn __ad4062_read_event_info_hysteresis(st, dir, val);\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static int ad4062_read_event_value(struct iio_dev *indio_dev,\n+\t\t\t\t const struct iio_chan_spec *chan,\n+\t\t\t\t enum iio_event_type type,\n+\t\t\t\t enum iio_event_direction dir,\n+\t\t\t\t enum iio_event_info info, int *val,\n+\t\t\t\t int *val2)\n+{\n+\tint ret;\n+\n+\tif (!iio_device_claim_direct(indio_dev))\n+\t\treturn -EBUSY;\n+\n+\tret = ad4062_read_event_config_dispatch(indio_dev, dir, info, val);\n+\tiio_device_release_direct(indio_dev);\n+\treturn ret ?: IIO_VAL_INT;\n+}\n+\n+static int __ad4062_write_event_info_value(struct ad4062_state *st,\n+\t\t\t\t\t enum iio_event_direction dir, int val)\n+{\n+\tu8 reg;\n+\n+\tif (val != sign_extend32(val, AD4062_LIMIT_BITS - 1))\n+\t\treturn -EINVAL;\n+\tif (dir == IIO_EV_DIR_RISING)\n+\t\treg = AD4062_REG_MAX_LIMIT;\n+\telse\n+\t\treg = AD4062_REG_MIN_LIMIT;\n+\tst->buf.be16 = cpu_to_be16(val);\n+\n+\treturn regmap_bulk_write(st->regmap, reg, &st->buf.be16,\n+\t\t\t\t sizeof(st->buf.be16));\n+}\n+\n+static int __ad4062_write_event_info_hysteresis(struct ad4062_state *st,\n+\t\t\t\t\t\tenum iio_event_direction dir, int val)\n+{\n+\tu8 reg;\n+\n+\tif (val > BIT(7) - 1)\n+\t\treturn -EINVAL;\n+\tif (dir == IIO_EV_DIR_RISING)\n+\t\treg = AD4062_REG_MAX_HYST;\n+\telse\n+\t\treg = AD4062_REG_MIN_HYST;\n+\n+\treturn regmap_write(st->regmap, reg, val);\n+}\n+\n+static int ad4062_write_event_value_dispatch(struct iio_dev *indio_dev,\n+\t\t\t\t\t enum iio_event_type type,\n+\t\t\t\t\t enum iio_event_direction dir,\n+\t\t\t\t\t enum iio_event_info info, int val)\n+{\n+\tstruct ad4062_state *st = iio_priv(indio_dev);\n+\n+\tif (st->wait_event)\n+\t\treturn -EBUSY;\n+\n+\tswitch (type) {\n+\tcase IIO_EV_TYPE_THRESH:\n+\t\tswitch (info) {\n+\t\tcase IIO_EV_INFO_VALUE:\n+\t\t\treturn __ad4062_write_event_info_value(st, dir, val);\n+\t\tcase IIO_EV_INFO_HYSTERESIS:\n+\t\t\treturn __ad4062_write_event_info_hysteresis(st, dir, val);\n+\t\tdefault:\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static int ad4062_write_event_value(struct iio_dev *indio_dev,\n+\t\t\t\t const struct iio_chan_spec *chan,\n+\t\t\t\t enum iio_event_type type,\n+\t\t\t\t enum iio_event_direction dir,\n+\t\t\t\t enum iio_event_info info, int val,\n+\t\t\t\t int val2)\n+{\n+\tint ret;\n+\n+\tif (!iio_device_claim_direct(indio_dev))\n+\t\treturn -EBUSY;\n+\n+\tret = ad4062_write_event_value_dispatch(indio_dev, type, dir, info, val);\n \tiio_device_release_direct(indio_dev);\n \treturn ret;\n }\n@@ -825,6 +1220,9 @@ static int pm_ad4062_triggered_buffer_postenable(struct ad4062_state *st)\n \tif (ret)\n \t\treturn ret;\n \n+\tif (st->wait_event)\n+\t\treturn -EBUSY;\n+\n \tret = ad4062_set_operation_mode(st, st->mode);\n \tif (ret)\n \t\treturn ret;\n@@ -900,6 +1298,11 @@ static const struct iio_info ad4062_info = {\n \t.read_raw = ad4062_read_raw,\n \t.write_raw = ad4062_write_raw,\n \t.read_avail = ad4062_read_avail,\n+\t.read_event_config = ad4062_read_event_config,\n+\t.write_event_config = ad4062_write_event_config,\n+\t.read_event_value = ad4062_read_event_value,\n+\t.write_event_value = ad4062_write_event_value,\n+\t.event_attrs = &ad4062_event_attribute_group,\n \t.get_current_scan_type = ad4062_get_current_scan_type,\n \t.debugfs_reg_access = ad4062_debugfs_reg_access,\n };\n@@ -980,8 +1383,10 @@ static int ad4062_probe(struct i3c_device *i3cdev)\n \t\t\t\t \"Failed to initialize regmap\\n\");\n \n \tst->mode = AD4062_SAMPLE_MODE;\n+\tst->wait_event = false;\n \tst->chip = chip;\n \tst->sampling_frequency = 0;\n+\tst->events_frequency = 0;\n \tst->oversamp_ratio = 0;\n \tst->indio_dev = indio_dev;\n \n", "prefixes": [ "v4", "7/9" ] }