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{ "id": 2175892, "url": "http://patchwork.ozlabs.org/api/1.0/covers/2175892/?format=api", "project": { "id": 41, "url": "http://patchwork.ozlabs.org/api/1.0/projects/41/?format=api", "name": "GNU C Library", "link_name": "glibc", "list_id": "libc-alpha.sourceware.org", "list_email": "libc-alpha@sourceware.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20251219102029.2379555-1-mengqinggang@loongson.cn>", "date": "2025-12-19T10:20:24", "name": "[v3,0/5] Add support for LoongArch32", "submitter": { "id": 87178, "url": "http://patchwork.ozlabs.org/api/1.0/people/87178/?format=api", "name": "mengqinggang", "email": "mengqinggang@loongson.cn" }, "series": [ { "id": 485974, "url": "http://patchwork.ozlabs.org/api/1.0/series/485974/?format=api", "date": "2025-12-19T10:20:24", "name": "Add support for LoongArch32", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/485974/mbox/" } ], "headers": { "Return-Path": "<libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "libc-alpha@sourceware.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "libc-alpha@sourceware.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org\n (client-ip=38.145.34.32; helo=vm01.sourceware.org;\n envelope-from=libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org;\n receiver=patchwork.ozlabs.org)", "sourceware.org;\n dmarc=none (p=none dis=none) header.from=loongson.cn", "sourceware.org; spf=pass smtp.mailfrom=loongson.cn", "server2.sourceware.org;\n arc=none smtp.remote-ip=114.242.206.163" ], "Received": [ "from vm01.sourceware.org (vm01.sourceware.org [38.145.34.32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4dXkB21YQWz1xty\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 19 Dec 2025 21:22:34 +1100 (AEDT)", "from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id 9974D4BA2E1E\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 19 Dec 2025 10:22:31 +0000 (GMT)", "from mail.loongson.cn (mail.loongson.cn [114.242.206.163])\n by sourceware.org (Postfix) with ESMTP id 736E44BA2E06\n for <libc-alpha@sourceware.org>; Fri, 19 Dec 2025 10:22:08 +0000 (GMT)", "from loongson.cn (unknown [10.2.6.7])\n by gateway (Coremail) with SMTP id _____8Bx28JHJ0Vp79IAAA--.2699S3;\n Fri, 19 Dec 2025 18:21:59 +0800 (CST)", "from amd9754.. (unknown [10.2.6.7])\n by front1 (Coremail) with SMTP id qMiowJBxSeBDJ0VpYMEBAA--.6567S2;\n Fri, 19 Dec 2025 18:21:55 +0800 (CST)" ], "DKIM-Filter": [ "OpenDKIM Filter v2.11.0 sourceware.org 9974D4BA2E1E", "OpenDKIM Filter v2.11.0 sourceware.org 736E44BA2E06" ], "DMARC-Filter": "OpenDMARC Filter v1.4.2 sourceware.org 736E44BA2E06", "ARC-Filter": "OpenARC Filter v1.0.0 sourceware.org 736E44BA2E06", "ARC-Seal": "i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1766139729; cv=none;\n b=gT+xKGu0kD2CWyMVZHYUNzZlm4ed6HYCU5eQsFalrsrt72K03g6fXBb+9cvhwGiEsipVjMSwCG8Vxw+gKQM6ErfDowyDXAjSPeJZMSupthzmI3zpZQmaOyF3+KPaZAGkphV673FYp2HMhjraSDr3WeoojUhp2hLU0ValX1baF0A=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1766139729; c=relaxed/simple;\n bh=PmCMYYHC6JGfyc4OcQjhfa1qeSjXWOMXpEwEqs5sUNQ=;\n h=From:To:Subject:Date:Message-Id:MIME-Version;\n b=F5gsXPx75vNK4HOjG/mnExNS7N77IWJIPWKnNvX7YYjp7SAo+90Ffombpe9xULXbEFp28nuEqD4j2+mkERUZBqr1Pw+gaFdGSqagGodTQDEfex9N/T5wJEvwT0VhD6F9lhUS0cGwJv1qQFL8g9jFLAodl9rVpGx59kwQkzRWzE4=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "From": "mengqinggang <mengqinggang@loongson.cn>", "To": "libc-alpha@sourceware.org", "Cc": "adhemerval.zanella@linaro.org, xuchenghua@loongson.cn,\n caiyinyu@loongson.cn, chenglulu@loongson.cn, cailulu@loongson.cn,\n xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com,\n luweining@loongson.cn, hejinyang@loongson.cn, mengqinggang@loongson.cn", "Subject": "[PATCH v3 0/5] Add support for LoongArch32", "Date": "Fri, 19 Dec 2025 18:20:24 +0800", "Message-Id": "<20251219102029.2379555-1-mengqinggang@loongson.cn>", "X-Mailer": "git-send-email 2.34.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-CM-TRANSID": "qMiowJBxSeBDJ0VpYMEBAA--.6567S2", "X-CM-SenderInfo": "5phqw15lqjwttqj6z05rqj20fqof0/", "X-Coremail-Antispam": "1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7\n ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx\n nUUI43ZEXa7xR_UUUUUUUUU==", "X-BeenThere": "libc-alpha@sourceware.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Libc-alpha mailing list <libc-alpha.sourceware.org>", "List-Unsubscribe": "<https://sourceware.org/mailman/options/libc-alpha>,\n <mailto:libc-alpha-request@sourceware.org?subject=unsubscribe>", "List-Archive": "<https://sourceware.org/pipermail/libc-alpha/>", "List-Post": "<mailto:libc-alpha@sourceware.org>", "List-Help": "<mailto:libc-alpha-request@sourceware.org?subject=help>", "List-Subscribe": "<https://sourceware.org/mailman/listinfo/libc-alpha>,\n <mailto:libc-alpha-request@sourceware.org?subject=subscribe>", "Errors-To": "libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org" }, "content": "Add support for LoongArch32(LA32) with ilp32d abi and\nLoongArch32 Reduced(LA32R) with ilp32s abi.\n\nThe gcc and binutils master branch have added LA32 support.\n\nThe kernel has added basic LA32 support[6]. But build infrastructures\nof LoongArch32 are not enabled yet, because we need to adjust\nirqchip drivers and wait for GNU toolchain be upstream first.\n\nYou can build toolchains by script/build-many-glibcs.py:\nLA32 ilp32d abi:\nbuild-many-glibcs.py -j128 --keep all . compilers loongarch32-linux-gnu\nLA32R ilp32s abi:\nbuild-many-glibcs.py -j128 --keep all . compilers loongarch32-linux-gnusf\n\nLA32 tested by qemu-user and qemu-system. Most testcases passed except for several\nabout gdb and math-fenv on soft float abi. \nTested on LA64 with no regression.\n\nThese patches are based on Jiajie Chen's previous work[1].\nA Chinese LA32R instruction set manual is here[2].\nThere is currently no separate LA32 instruction set manual.\nThe LA64 instruction set manual[3] specifies the instructions available in LA32.\nA LA32 linux system based on qemu user is here[4].\nA LA32 linux system based on qemu system is here[5].\n\n[1] https://github.com/jiegec/glibc/tree/loongarch32\n[2] https://www.loongson.cn/uploads/images/2025032109211238668.%E9%BE%99%E6%9E%B6%E6%9E%8432%E4%BD%8D%E7%B2%BE%E7%AE%80%E7%89%88%E5%8F%82%E8%80%83%E6%89%8B%E5%86%8C_r1p04.pdf\n[3] https://github.com/loongson/LoongArch-Documentation/blob/main/docs/LoongArch-Vol1-EN/basic-integer-instructions/overview-of-basic-integer-instructions.adoc\n[4] https://github.com/sunhaiyong1978/CLFS-for-LoongArch32/blob/main/Qemu_For_LoongArch32-Simple.md\n[5] https://github.com/sunhaiyong1978/CLFS-for-LoongArch32/blob/main/Qemu_System_For_LoongArch32-Simple.md\n[6] https://lore.kernel.org/loongarch/176559874944.2388135.2320307195215147125.pr-tracker-bot@kernel.org/T/#t\n\nv2 -> v3:\n- Delete extra configure checks in configure.ac.\n- Change GLIBC_2.36 to GLIBC_2.43 shlib-versions.\n\nv1 -> v2:\n- Update syscall list and update abi list.\n- Delete libm-test-ulps and libm-test-ulps-name.\n- Fix tst-gnu2-tls2: change 24 to 3 * SZREG, change uint64_t to int or long.\n Do not check static float registers. Static float registers save and restore\n follow the procedure call standard and dot not require tls desc resolver\n function processing.\n- Change __NR_mmap2 to the previous __NR_mmap on lp64.\n- Change SZREG to 8 to match unsigned long long mcontext_t.__gregs.\n\nmengqinggang (5):\n LoongArch: Add support for LA32 in sysdeps/loongarch\n LoongArch: Add support for LA32 in sysdeps/loongarch/fpu\n LoongArch: Add new file for LA32 in sysdeps/loongarch/ilp32\n LoongArch: Add support for LA32 in sysdeps/unix/sysv/linux/loongarch\n LoongArch: Add new files for LA32 in\n sysdeps/unix/sysv/linux/loongarch/ilp32\n\n scripts/build-many-glibcs.py | 7 +\n sysdeps/loongarch/configure | 29 +-\n sysdeps/loongarch/configure.ac | 21 +-\n sysdeps/loongarch/dl-machine.h | 16 +-\n sysdeps/loongarch/dl-tlsdesc-dynamic.h | 37 +-\n sysdeps/loongarch/dl-tlsdesc.S | 6 +-\n sysdeps/loongarch/dl-trampoline.h | 4 +-\n sysdeps/loongarch/fpu/e_scalb.c | 10 +\n sysdeps/loongarch/fpu/e_scalbf.c | 10 +\n .../loongarch/fpu/math-use-builtins-llrint.h | 2 +-\n .../loongarch/fpu/math-use-builtins-logb.h | 2 +-\n .../loongarch/fpu/math-use-builtins-lrint.h | 2 +-\n .../loongarch/fpu/math-use-builtins-rint.h | 2 +-\n .../loongarch/fpu/math-use-builtins-sqrt.h | 10 +-\n sysdeps/loongarch/fpu/s_scalbn.c | 10 +\n sysdeps/loongarch/fpu/s_scalbnf.c | 8 +\n sysdeps/loongarch/fpu/w_ilogb-impl.h | 8 +\n sysdeps/loongarch/fpu/w_ilogbf-impl.h | 8 +\n sysdeps/loongarch/hp-timing.h | 9 +\n sysdeps/loongarch/ilp32/Implies-after | 1 +\n sysdeps/loongarch/preconfigure | 3 +-\n sysdeps/loongarch/preconfigure.ac | 3 +-\n sysdeps/loongarch/sfp-machine.h | 33 +\n sysdeps/loongarch/start.S | 32 +-\n sysdeps/loongarch/sys/asm.h | 93 +-\n sysdeps/loongarch/tst-gnu2-tls2.h | 50 +-\n sysdeps/unix/sysv/linux/loongarch/Makefile | 4 +-\n sysdeps/unix/sysv/linux/loongarch/clone.S | 10 +-\n sysdeps/unix/sysv/linux/loongarch/clone3.S | 8 +-\n sysdeps/unix/sysv/linux/loongarch/configure | 40 +\n .../unix/sysv/linux/loongarch/configure.ac | 8 +\n .../unix/sysv/linux/loongarch/getcontext.S | 12 +-\n .../unix/sysv/linux/loongarch/gettimeofday.c | 9 +-\n .../unix/sysv/linux/loongarch/ilp32/Implies | 2 +\n .../sysv/linux/loongarch/ilp32/arch-syscall.h | 314 +++\n .../sysv/linux/loongarch/ilp32/c++-types.data | 67 +\n .../sysv/linux/loongarch/ilp32/ld.abilist | 8 +\n .../loongarch/ilp32/libBrokenLocale.abilist | 1 +\n .../sysv/linux/loongarch/ilp32/libc.abilist | 2298 +++++++++++++++++\n .../loongarch/ilp32/libc_malloc_debug.abilist | 28 +\n .../sysv/linux/loongarch/ilp32/libm.abilist | 1198 +++++++++\n .../linux/loongarch/ilp32/libpthread.abilist | 0\n .../linux/loongarch/ilp32/libresolv.abilist | 55 +\n .../sysv/linux/loongarch/ilp32/librt.abilist | 0\n .../loongarch/ilp32/libthread_db.abilist | 40 +\n .../unix/sysv/linux/loongarch/ldd-rewrite.sed | 2 +-\n .../linux/loongarch/{ => lp64}/arch-syscall.h | 0\n .../unix/sysv/linux/loongarch/pointer_guard.h | 18 +-\n .../unix/sysv/linux/loongarch/readelflib.c | 33 +-\n .../unix/sysv/linux/loongarch/setcontext.S | 24 +-\n .../unix/sysv/linux/loongarch/shlib-versions | 8 +-\n .../unix/sysv/linux/loongarch/swapcontext.S | 28 +-\n .../sysv/linux/loongarch/syscall_cancel.S | 2 +-\n sysdeps/unix/sysv/linux/loongarch/sysdep.S | 8 +-\n sysdeps/unix/sysv/linux/loongarch/sysdep.h | 30 +-\n .../sysv/linux/loongarch/ucontext-macros.h | 6 +-\n sysdeps/unix/sysv/linux/loongarch/vfork.S | 6 +-\n 57 files changed, 4492 insertions(+), 191 deletions(-)\n create mode 100644 sysdeps/loongarch/ilp32/Implies-after\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/Implies\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/arch-syscall.h\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/c++-types.data\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/ld.abilist\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libBrokenLocale.abilist\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libc.abilist\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libc_malloc_debug.abilist\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libm.abilist\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libpthread.abilist\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libresolv.abilist\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/librt.abilist\n create mode 100644 sysdeps/unix/sysv/linux/loongarch/ilp32/libthread_db.abilist\n rename sysdeps/unix/sysv/linux/loongarch/{ => lp64}/arch-syscall.h (100%)" }