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{ "id": 2175582, "url": "http://patchwork.ozlabs.org/api/1.0/covers/2175582/?format=api", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/1.0/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20251218142621.57402-1-claudio.bantaloukas@arm.com>", "date": "2025-12-18T14:26:12", "name": "[v4,0/8] aarch64: Add fp8 sme 2.1 features per ACLE 2024Q4", "submitter": { "id": 88972, "url": "http://patchwork.ozlabs.org/api/1.0/people/88972/?format=api", "name": "Claudio Bantaloukas", "email": "claudio.bantaloukas@arm.com" }, "series": [ { "id": 485861, "url": "http://patchwork.ozlabs.org/api/1.0/series/485861/?format=api", "date": "2025-12-18T14:26:12", "name": "aarch64: Add fp8 sme 2.1 features per ACLE 2024Q4", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/485861/mbox/" } ], "headers": { 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(sender IP is 172.205.89.229)\n smtp.mailfrom=arm.com; dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=arm.com;" ], "Received-SPF": [ "Pass (protection.outlook.com: domain of arm.com designates\n 4.158.2.129 as permitted sender) receiver=protection.outlook.com;\n client-ip=4.158.2.129; helo=outbound-uk1.az.dlp.m.darktrace.com; pr=C", "Pass (protection.outlook.com: domain of arm.com designates\n 172.205.89.229 as permitted sender) receiver=protection.outlook.com;\n client-ip=172.205.89.229; helo=nebula.arm.com; pr=C" ], "From": "Claudio Bantaloukas <claudio.bantaloukas@arm.com>", "To": "Gcc Patches ML <gcc-patches@gcc.gnu.org>", "CC": "Alex Coplan <alex.coplan@arm.com>, Alice Carlotti\n <alice.carlotti@arm.com>, Andrew Pinski <andrew.pinski@oss.qualcomm.com>,\n Kyrylo Tkachov <ktkachov@nvidia.com>, Richard Earnshaw\n <richard.earnshaw@arm.com>, Tamar Christina <tamar.christina@arm.com>, \"Wilco\n Dijkstra\" <wilco.dijkstra@arm.com>, Claudio Bantaloukas\n <claudio.bantaloukas@arm.com>", "Subject": "[PATCH v4 0/8] aarch64: Add fp8 sme 2.1 features per ACLE 2024Q4", "Date": "Thu, 18 Dec 2025 14:26:12 +0000", "Message-ID": "<20251218142621.57402-1-claudio.bantaloukas@arm.com>", "X-Mailer": "git-send-email 2.51.0", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-EOPAttributedMessage": "1", "X-MS-TrafficTypeDiagnostic": "\n DB1PEPF000509E3:EE_|AS2PR08MB9416:EE_|DB3PEPF00008859:EE_|AS2PR08MB9367:EE_", "X-MS-Office365-Filtering-Correlation-Id": "24e020bb-00dc-4ee8-b0b5-08de3e41821f", "x-checkrecipientrouted": "true", "NoDisclaimer": "true", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam-Untrusted": "BCL:0;\n ARA:13230040|36860700013|82310400026|1800799024|376014;", "X-Microsoft-Antispam-Message-Info-Original": "\n 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"X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "* Reposting patches inline rather than as attachments. *\n\nThis patch series completes support for SME2 and SME2p1 intrinsics relative to\nmodal 8bit floating point types.\n\n- The first patch in the series introduces tests for using luti intrinsics with\n mf8 that was already working since their introduction, now that their use is\n documented in ACLE.\n- The second patch extends the definitions of existing non-interpreting sve2/sme\n intrinsics to support mfloat8 types.\n- The third and fourth patches add widening and narrowing sme2 fp8 conversions\n respectively (svcvt).\n- The fifth patch adds multi-vector floating-point adjust exponent intrinsics\n (svscale).\n- The sixth patch adds support for the sme-f8f16 and sme-f8f32 arch features\n and related defines.\n- Patch 7 adds Multi-vector 8-bit floating-point multiply-add long intrinsics.\n- Patch 8 adds 8-bit floating-point sum of outer products and accumulate\n intrinsics.\n- Patch 9 adds 8-bit floating point dot product intrinsics.\n\nCompared to version 1 of this patch series:\n- updated commit messages per requests.\n- fixed gating of intrinsics in patch four (narrowing sme2 conversions to fp8).\n- introduced aarch64_output_asm_with_extra_operand function and updated insns in\n aarch64-sme.md to no longer use out of bounds operands.\n\nCompared to version 2 of this patch series:\n- replaced aarch64_output_asm_with_extra_operand with\n aarch64_output_asm_with_offset which does not require allocating space for\n operands on the stack in patch 7.\n\nCompared to version 3 of this patch series:\n- Entirely removed functions using snprintf and returned to existing use of\n operands array as the array is long enough for this use.\n- Addressed Richard Ball's feedback (renamed test files, improved readability in\n exp file, formatting).\n\nRegression tested on aarch64-unknown-linux-gnu.\n\nOK to merge?\n\nThanks,\nClaudio Bantaloukas\n\n\nClaudio Bantaloukas (7):\n aarch64: extend sme intrinsics to mfp8\n aarch64: add widening sme2 fp8 conversions\n aarch64: add narrowing sme2 conversions to fp8\n aarch64: add multi-vector floating-point adjust exponent intrinsics\n aarch64: add basic support for sme-f8f16 and sme-f8f32\n aarch64: add Multi-vector 8-bit floating-point multiply-add long\n aarch64: add 8-bit floating-point sum of outer products and accumulate\n\nKarl Meakin (1):\n aarch64: add 8-bit floating point dot product\n\n gcc/config/aarch64/aarch64-c.cc | 4 +\n .../aarch64/aarch64-option-extensions.def | 4 +\n gcc/config/aarch64/aarch64-sme.md | 571 ++++++++++++++++++\n .../aarch64/aarch64-sve-builtins-base.cc | 47 +-\n .../aarch64/aarch64-sve-builtins-functions.h | 23 +-\n .../aarch64/aarch64-sve-builtins-shapes.cc | 43 +-\n .../aarch64/aarch64-sve-builtins-shapes.h | 1 +\n .../aarch64/aarch64-sve-builtins-sme.cc | 20 +-\n .../aarch64/aarch64-sve-builtins-sme.def | 55 +-\n gcc/config/aarch64/aarch64-sve-builtins-sme.h | 2 +\n .../aarch64/aarch64-sve-builtins-sve2.cc | 2 +\n .../aarch64/aarch64-sve-builtins-sve2.def | 12 +\n .../aarch64/aarch64-sve-builtins-sve2.h | 2 +\n gcc/config/aarch64/aarch64-sve-builtins.cc | 34 +-\n gcc/config/aarch64/aarch64-sve2.md | 52 +-\n gcc/config/aarch64/aarch64.h | 10 +\n gcc/config/aarch64/iterators.md | 73 ++-\n gcc/doc/invoke.texi | 6 +\n .../aarch64/sme2/aarch64-sme2-acle-asm.exp | 3 +-\n .../gcc.target/aarch64/pragma_cpp_predefs_4.c | 34 ++\n .../aarch64/sme/acle-asm/read_hor_za128.c | 31 +\n .../aarch64/sme/acle-asm/read_hor_za8.c | 31 +\n .../aarch64/sme/acle-asm/read_ver_za128.c | 31 +\n .../aarch64/sme/acle-asm/read_ver_za8.c | 31 +\n .../aarch64/sme/acle-asm/revd_mf8.c | 76 +++\n .../aarch64/sme/acle-asm/test_sme_acle.h | 2 +-\n .../aarch64/sme/acle-asm/write_hor_za128.c | 10 +\n .../aarch64/sme/acle-asm/write_hor_za8.c | 10 +\n .../aarch64/sme/acle-asm/write_ver_za128.c | 10 +\n .../aarch64/sme/acle-asm/write_ver_za8.c | 10 +\n .../aarch64/sme2/aarch64-sme2-acle-asm.exp | 3 +-\n .../aarch64/sme2/acle-asm/cvt_mf8_bf16_x2.c | 56 ++\n .../aarch64/sme2/acle-asm/cvt_mf8_f16_x2.c | 56 ++\n .../aarch64/sme2/acle-asm/cvt_mf8_f32_x4.c | 72 +++\n .../aarch64/sme2/acle-asm/cvt_mf8_x2.c | 47 ++\n .../aarch64/sme2/acle-asm/cvtl_mf8_x2.c | 47 ++\n .../aarch64/sme2/acle-asm/cvtn_mf8_f32_x4.c | 72 +++\n .../sme2/acle-asm/dot_lane_za16_mf8_vg1x2.c | 119 ++++\n .../sme2/acle-asm/dot_lane_za16_mf8_vg1x4.c | 125 ++++\n .../sme2/acle-asm/dot_lane_za32_mf8_vg1x2.c | 119 ++++\n .../sme2/acle-asm/dot_lane_za32_mf8_vg1x4.c | 125 ++++\n .../sme2/acle-asm/dot_single_za16_mf8_vg1x2.c | 126 ++++\n .../sme2/acle-asm/dot_single_za16_mf8_vg1x4.c | 126 ++++\n .../sme2/acle-asm/dot_single_za32_mf8_vg1x2.c | 126 ++++\n .../sme2/acle-asm/dot_single_za32_mf8_vg1x4.c | 126 ++++\n .../sme2/acle-asm/dot_za16_mf8_vg1x2.c | 150 +++++\n .../sme2/acle-asm/dot_za16_mf8_vg1x4.c | 166 +++++\n .../sme2/acle-asm/dot_za32_mf8_vg1x2.c | 150 +++++\n .../sme2/acle-asm/dot_za32_mf8_vg1x4.c | 166 +++++\n .../aarch64/sme2/acle-asm/ld1_mf8_x2.c | 262 ++++++++\n .../aarch64/sme2/acle-asm/ld1_mf8_x4.c | 354 +++++++++++\n .../aarch64/sme2/acle-asm/ldnt1_mf8_x2.c | 262 ++++++++\n .../aarch64/sme2/acle-asm/ldnt1_mf8_x4.c | 354 +++++++++++\n .../sme2/acle-asm/mla_lane_za16_mf8_vg2x1.c | 167 +++++\n .../sme2/acle-asm/mla_lane_za16_mf8_vg2x2.c | 136 +++++\n .../sme2/acle-asm/mla_lane_za16_mf8_vg2x4.c | 142 +++++\n .../sme2/acle-asm/mla_lane_za32_mf8_vg4x1.c | 169 ++++++\n .../sme2/acle-asm/mla_lane_za32_mf8_vg4x2.c | 137 +++++\n .../sme2/acle-asm/mla_lane_za32_mf8_vg4x4.c | 143 +++++\n .../sme2/acle-asm/mla_za16_mf8_vg2x1.c | 167 +++++\n .../sme2/acle-asm/mla_za16_mf8_vg2x2.c | 285 +++++++++\n .../sme2/acle-asm/mla_za16_mf8_vg2x4.c | 287 +++++++++\n .../sme2/acle-asm/mla_za32_mf8_vg4x1.c | 167 +++++\n .../sme2/acle-asm/mla_za32_mf8_vg4x2.c | 277 +++++++++\n .../sme2/acle-asm/mla_za32_mf8_vg4x4.c | 289 +++++++++\n .../aarch64/sme2/acle-asm/mopa_za16_mf8.c | 36 ++\n .../aarch64/sme2/acle-asm/mopa_za32_mf8.c | 36 ++\n .../aarch64/sme2/acle-asm/read_hor_za8_vg2.c | 78 +++\n .../aarch64/sme2/acle-asm/read_hor_za8_vg4.c | 91 +++\n .../aarch64/sme2/acle-asm/read_ver_za8_vg2.c | 78 +++\n .../aarch64/sme2/acle-asm/read_ver_za8_vg4.c | 91 +++\n .../aarch64/sme2/acle-asm/read_za8_vg1x2.c | 48 ++\n .../aarch64/sme2/acle-asm/read_za8_vg1x4.c | 54 ++\n .../aarch64/sme2/acle-asm/readz_hor_za128.c | 10 +\n .../aarch64/sme2/acle-asm/readz_hor_za8.c | 10 +\n .../aarch64/sme2/acle-asm/readz_hor_za8_vg2.c | 78 +++\n .../aarch64/sme2/acle-asm/readz_hor_za8_vg4.c | 91 +++\n .../aarch64/sme2/acle-asm/readz_ver_za128.c | 197 ++++++\n .../aarch64/sme2/acle-asm/readz_ver_za8.c | 10 +\n .../aarch64/sme2/acle-asm/readz_ver_za8_vg2.c | 77 +++\n .../aarch64/sme2/acle-asm/readz_ver_za8_vg4.c | 90 +++\n .../aarch64/sme2/acle-asm/readz_za8_vg1x2.c | 48 ++\n .../aarch64/sme2/acle-asm/readz_za8_vg1x4.c | 56 ++\n .../aarch64/sme2/acle-asm/scale_f16_x2.c | 192 ++++++\n .../aarch64/sme2/acle-asm/scale_f16_x4.c | 229 +++++++\n .../aarch64/sme2/acle-asm/scale_f32_x2.c | 208 +++++++\n .../aarch64/sme2/acle-asm/scale_f32_x4.c | 229 +++++++\n .../aarch64/sme2/acle-asm/scale_f64_x2.c | 208 +++++++\n .../aarch64/sme2/acle-asm/scale_f64_x4.c | 229 +++++++\n .../aarch64/sme2/acle-asm/sel_mf8_x2.c | 92 +++\n .../aarch64/sme2/acle-asm/sel_mf8_x4.c | 92 +++\n .../aarch64/sme2/acle-asm/st1_mf8_x2.c | 262 ++++++++\n .../aarch64/sme2/acle-asm/st1_mf8_x4.c | 354 +++++++++++\n .../aarch64/sme2/acle-asm/stnt1_mf8_x2.c | 262 ++++++++\n .../aarch64/sme2/acle-asm/stnt1_mf8_x4.c | 354 +++++++++++\n .../aarch64/sme2/acle-asm/test_sme2_acle.h | 12 +-\n .../aarch64/sme2/acle-asm/uzp_mf8_x2.c | 77 +++\n .../aarch64/sme2/acle-asm/uzp_mf8_x4.c | 73 +++\n .../aarch64/sme2/acle-asm/uzpq_mf8_x2.c | 77 +++\n .../aarch64/sme2/acle-asm/uzpq_mf8_x4.c | 73 +++\n .../sme2/acle-asm/vdot_lane_za16_mf8_vg1x2.c | 119 ++++\n .../sme2/acle-asm/vdotb_lane_za32_mf8_vg1x4.c | 119 ++++\n .../sme2/acle-asm/vdott_lane_za32_mf8_vg1x4.c | 119 ++++\n .../aarch64/sme2/acle-asm/write_hor_za8_vg2.c | 78 +++\n .../aarch64/sme2/acle-asm/write_hor_za8_vg4.c | 91 +++\n .../aarch64/sme2/acle-asm/write_ver_za8_vg2.c | 78 +++\n .../aarch64/sme2/acle-asm/write_ver_za8_vg4.c | 91 +++\n .../aarch64/sme2/acle-asm/write_za8_vg1x2.c | 48 ++\n .../aarch64/sme2/acle-asm/write_za8_vg1x4.c | 54 ++\n .../aarch64/sme2/acle-asm/zip_mf8_x2.c | 77 +++\n .../aarch64/sme2/acle-asm/zip_mf8_x4.c | 73 +++\n .../aarch64/sme2/acle-asm/zipq_mf8_x2.c | 77 +++\n .../aarch64/sme2/acle-asm/zipq_mf8_x4.c | 73 +++\n .../aarch64/sve/acle/asm/test_sve_acle.h | 3 +\n .../sve/acle/general-c/binary_za_m_1.c | 14 +\n .../acle/general-c/binary_za_slice_lane_1.c | 14 +\n .../general-c/binary_za_slice_opt_single_1.c | 16 +\n .../general-c/dot_half_za_slice_lane_fpm.c | 106 ++++\n .../aarch64/sve2/acle/asm/ld1_mf8_x2.c | 269 +++++++++\n .../aarch64/sve2/acle/asm/ld1_mf8_x4.c | 361 +++++++++++\n .../aarch64/sve2/acle/asm/ldnt1_mf8_x2.c | 269 +++++++++\n .../aarch64/sve2/acle/asm/ldnt1_mf8_x4.c | 361 +++++++++++\n .../aarch64/sve2/acle/asm/revd_mf8.c | 80 +++\n .../aarch64/sve2/acle/asm/stnt1_mf8_x2.c | 269 +++++++++\n .../aarch64/sve2/acle/asm/stnt1_mf8_x4.c | 361 +++++++++++\n gcc/testsuite/lib/target-supports.exp | 1 +\n 126 files changed, 14193 insertions(+), 45 deletions(-)\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme/acle-asm/revd_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/cvt_mf8_bf16_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/cvt_mf8_f16_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/cvt_mf8_f32_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/cvt_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/cvtl_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/cvtn_mf8_f32_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_lane_za16_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_lane_za16_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_lane_za32_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_lane_za32_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_single_za16_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_single_za16_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_single_za32_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_single_za32_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_za16_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_za16_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_za32_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/dot_za32_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_mf8_vg2x1.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_mf8_vg2x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_mf8_vg2x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_lane_za32_mf8_vg4x1.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_lane_za32_mf8_vg4x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_lane_za32_mf8_vg4x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_za16_mf8_vg2x1.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_za16_mf8_vg2x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_za16_mf8_vg2x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_za32_mf8_vg4x1.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_za32_mf8_vg4x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mla_za32_mf8_vg4x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mopa_za16_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/mopa_za32_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/readz_ver_za128.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/scale_f16_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/scale_f16_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/scale_f32_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/scale_f32_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/scale_f64_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/scale_f64_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/sel_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/sel_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/st1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/st1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/vdot_lane_za16_mf8_vg1x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/vdotb_lane_za32_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/vdott_lane_za32_mf8_vg1x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zip_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zip_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_half_za_slice_lane_fpm.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x4.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/revd_mf8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x2.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x4.c" }