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    "msgid": "<20251217212018.93320-1-gustavo.romero@linaro.org>",
    "date": "2025-12-17T21:20:12",
    "name": "[v2,0/6] system/physmem: Enhance the Address Space API",
    "submitter": {
        "id": 82513,
        "url": "http://patchwork.ozlabs.org/api/1.0/people/82513/?format=api",
        "name": "Gustavo Romero",
        "email": "gustavo.romero@linaro.org"
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            "date": "2025-12-17T21:20:12",
            "name": "system/physmem: Enhance the Address Space API",
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            "mbox": "http://patchwork.ozlabs.org/series/485770/mbox/"
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        "From": "Gustavo Romero <gustavo.romero@linaro.org>",
        "To": "qemu-devel@nongnu.org, qemu-arm@nongnu.org, richard.henderson@linaro.org,\n alex.bennee@linaro.org, philmd@linaro.org, peter.maydell@linaro.org",
        "Cc": "gustavo.romero@linaro.org",
        "Subject": "[PATCH v2 0/6] system/physmem: Enhance the Address Space API",
        "Date": "Wed, 17 Dec 2025 18:20:12 -0300",
        "Message-Id": "<20251217212018.93320-1-gustavo.romero@linaro.org>",
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    },
    "content": "The proposal in v1 was to allocate all CPUAddressSpace structures\ndynamically as the address spaces were added. However, after private\ndiscussions with Richard, Peter, and Phil, I agreed to take the opposite\napproach: allocating all defined address spaces (CPUAddressSpace struct)\nfor a target statically.\n\nThis different approach simplifies the current AS API too for the\ndefinition of new address spaces for a target, while also simplifying\nthe changes necessary to achieve it.\n\nCPUAddressSpace is a tiny structure, so allocating it statically has\nnegligible impact. Meanwhile, the AddressSpace struct (inside the\nCPUAddressSpace struct), although larger, is already allocated\ndynamically and allocated only when an address space is required.\n\nThe AS API simplification proposed here simply requires calling\ncpu_address_space_init() once to set the total number of ASes supported\nby a given target, and then adding the required address spaces using\ncpu_address_space_add(). Consequently, there is no longer a need to\nprecompute the total number of ASes beforehand, which becomes clumsy for\ntargets that require different combinations of ASes.\n\nFinally, the problem of mapping a sparse sequence of AS indexes to a\ndense sequence of CPU AS indexes (array indexes) disappears, since a\nCPUAddressSpace struct is statically allocated for all defined ASes\nsupported by the target.\n\nCI results:\nhttps://gitlab.com/gusbromero/qemu/-/pipelines/2220115152\n\nv1:\nhttps://mail.gnu.org/archive/html/qemu-devel/2025-11/msg04406.html\n\n\nCheers,\nGustavo\n\nGustavo Romero (6):\n  target/arm: Initialize AS 0 first\n  target/arm: Add a _MAX sentinel to ARMASIdx enum\n  target/i386: Add a _MAX sentinel to X86ASIdx enum\n  system/physmem: Rename cpu_address_space_init\n  system/physmem: Add cpu_address_space_init\n  system/physmem: Use cpu_address_space_init to set cpu->num_ases\n\n include/exec/cpu-common.h          | 23 ++++++++++++++++++-----\n stubs/cpu-destroy-address-spaces.c |  2 +-\n system/cpus.c                      |  4 ++--\n system/physmem.c                   | 12 ++++++++++--\n target/arm/cpu.c                   | 28 ++++++++++------------------\n target/arm/cpu.h                   |  3 ++-\n target/i386/cpu.h                  |  1 +\n target/i386/kvm/kvm-cpu.c          |  5 +++--\n target/i386/kvm/kvm.c              |  4 ++--\n target/i386/tcg/system/tcg-cpu.c   |  6 +++---\n 10 files changed, 52 insertions(+), 36 deletions(-)"
}