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Tue, 19 Mar 2019 17:18:07 +0000 Received: from AM6PR07MB5221.eurprd07.prod.outlook.com ([fe80::f4d0:bea0:7f8:8996]) by AM6PR07MB5221.eurprd07.prod.outlook.com ([fe80::f4d0:bea0:7f8:8996%3]) with mapi id 15.20.1709.015; Tue, 19 Mar 2019 17:18:07 +0000 From: "Sverdlin, Alexander (Nokia - DE/Ulm)" To: "linux-mtd@lists.infradead.org" , Mika Westerberg Subject: [PATCH v4] mtd: spi-nor: intel-spi: Avoid crossing 4K address boundary on read/write Thread-Topic: [PATCH v4] mtd: spi-nor: intel-spi: Avoid crossing 4K address boundary on read/write Thread-Index: AQHU3ne40uhmtPAeGUad2jKkx6BIFg== Date: Tue, 19 Mar 2019 17:18:07 +0000 Message-ID: <20190319171749.19052-1-alexander.sverdlin@nokia.com> References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [131.228.32.181] x-mailer: git-send-email 2.21.0 x-clientproxiedby: HE1PR0802CA0020.eurprd08.prod.outlook.com (2603:10a6:3:bd::30) To AM6PR07MB5221.eurprd07.prod.outlook.com (2603:10a6:20b:6a::19) x-ms-exchange-messagesentrepresentingtype: 1 x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 4d119808-12e5-4560-e5d7-08d6ac8eda75 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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This limitation is mentioned in Intel documents: Intel(R) 9 Series Chipset Family Platform Controller Hub (PCH) Datasheet: "5.26.3 Flash Access Program Register Access: * Program Register Accesses are not allowed to cross a 4 KB boundary..." Enhanced Serial Peripheral Interface (eSPI) Interface Base Specification (for Client and Server Platforms): "5.1.4 Address For other memory transactions, the address may start or end at any byte boundary. However, the address and payload length combination must not cross the naturally aligned address boundary of the corresponding Maximum Payload Size. It must not cross a 4 KB address boundary." Avoid this by splitting an operation crossing the boundary into two operations. Cc: stable@vger.kernel.org Reported-by: Romain Porte Tested-by: Pascal Fabreges Signed-off-by: Alexander Sverdlin Reviewed-by: Tudor Ambarus Acked-by: Mika Westerberg --- Changelog: v2: More macros! As suggested by Mika. v3: Actually compiled. Sorry Mika, the lines are really long now. v4: Add "mtd:" to the subject drivers/mtd/spi-nor/intel-spi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mtd/spi-nor/intel-spi.c b/drivers/mtd/spi-nor/intel-spi.c index af0a220..d60cbf2 100644 --- a/drivers/mtd/spi-nor/intel-spi.c +++ b/drivers/mtd/spi-nor/intel-spi.c @@ -632,6 +632,10 @@ static ssize_t intel_spi_read(struct spi_nor *nor, loff_t from, size_t len, while (len > 0) { block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ); + /* Read cannot cross 4K boundary */ + block_size = min_t(loff_t, from + block_size, + round_up(from + 1, SZ_4K)) - from; + writel(from, ispi->base + FADDR); val = readl(ispi->base + HSFSTS_CTL); @@ -685,6 +689,10 @@ static ssize_t intel_spi_write(struct spi_nor *nor, loff_t to, size_t len, while (len > 0) { block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ); + /* Write cannot cross 4K boundary */ + block_size = min_t(loff_t, to + block_size, + round_up(to + 1, SZ_4K)) - to; + writel(to, ispi->base + FADDR); val = readl(ispi->base + HSFSTS_CTL);