From patchwork Thu Feb 21 01:30:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1045701 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 444cRv6BvGz9s5c for ; Thu, 21 Feb 2019 12:33:15 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 8A1FAC220D3; Thu, 21 Feb 2019 01:33:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 633AEC220C6; Thu, 21 Feb 2019 01:32:48 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 32DB9C22095; Thu, 21 Feb 2019 01:32:44 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id BF300C21DED for ; Thu, 21 Feb 2019 01:32:43 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EAA4D1596; Wed, 20 Feb 2019 17:32:42 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D18A33F575; Wed, 20 Feb 2019 17:32:40 -0800 (PST) From: Andre Przywara To: Maxime Ripard , Jagan Teki Date: Thu, 21 Feb 2019 01:30:26 +0000 Message-Id: <20190221013034.9099-2-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190221013034.9099-1-andre.przywara@arm.com> References: <20190221013034.9099-1-andre.przywara@arm.com> Cc: Tom Rini , Alex Graf , u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [PATCH 1/9] armv8: Disable exception vectors in SPL by default X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Alexander Graf Commit 1416e2d2253 ("armv8: make SPL exception vectors optional") had a typo in it which effectively disabled exception handling in SPL code always. Since nobody complained, I guess we may as well disable exception handling in SPL always by default. So fix the bug to make the config option effective, but disable exception handling in SPL by default. This gets us to the same functionality as before by default, but with much less code included in the binary. Signed-off-by: Alexander Graf Reviewed-by: Matthias Brugger Reviewed-by: Andre Przywara --- arch/arm/cpu/armv8/Kconfig | 2 +- arch/arm/cpu/armv8/start.S | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 1c12bbde75..fb061c8d73 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -3,7 +3,7 @@ if ARM64 config ARMV8_SPL_EXCEPTION_VECTORS bool "Install crash dump exception vectors" depends on SPL - default y + default n help The default exception vector table is only used for the crash dump, but still takes quite a lot of space in the image size. diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 12a78ee38b..fe52166e28 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -88,7 +88,7 @@ pie_fixup_done: bl reset_sctrl #endif -#if defined(CONFIG_ARMV8__SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD) .macro set_vbar, regname, reg msr \regname, \reg .endm @@ -354,7 +354,7 @@ ENDPROC(smp_kick_all_cpus) /*-----------------------------------------------------------------------*/ ENTRY(c_runtime_cpu_setup) -#if defined(CONFIG_ARMV8__SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD) /* Relocate vBAR */ adr x0, vectors switch_el x1, 3f, 2f, 1f From patchwork Thu Feb 21 01:30:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1045705 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 444cVN2xvmz9s5c for ; Thu, 21 Feb 2019 12:35:24 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 1F981C220D8; Thu, 21 Feb 2019 01:33:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 814FBC2209E; Thu, 21 Feb 2019 01:33:03 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id CFFA8C220FA; Thu, 21 Feb 2019 01:32:50 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id CB0F5C220A8 for ; Thu, 21 Feb 2019 01:32:46 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5623415BE; Wed, 20 Feb 2019 17:32:45 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 395F63F575; Wed, 20 Feb 2019 17:32:43 -0800 (PST) From: Andre Przywara To: Maxime Ripard , Jagan Teki Date: Thu, 21 Feb 2019 01:30:27 +0000 Message-Id: <20190221013034.9099-3-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190221013034.9099-1-andre.przywara@arm.com> References: <20190221013034.9099-1-andre.przywara@arm.com> Cc: Tom Rini , Alex Graf , u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [PATCH 2/9] Makefile: use "arm64" architecture for U-Boot image files X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" At the moment we use the arch/arm directory for arm64 boards as well, so the Makefile will pick up the "arm" name for the architecture to use for tagging binaries in U-Boot image files. Differentiate between the two by looking at the CPU variable being defined to "armv8", and use the arm64 architecture name on creating the image file if that matches. Signed-off-by: Andre Przywara Reviewed-by: Alexander Graf Reviewed-by: Philipp Tomsich --- Makefile | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 75a5c7d171..d6e7c69f40 100644 --- a/Makefile +++ b/Makefile @@ -1167,13 +1167,19 @@ $(U_BOOT_ITS): $(U_BOOT_ITS_DEPS) FORCE endif endif +ifeq ($(CPU),armv8) +IH_ARCH := arm64 +else +IH_ARCH := $(ARCH) +endif + ifdef CONFIG_SPL_LOAD_FIT -MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ +MKIMAGEFLAGS_u-boot.img = -f auto -A $(IH_ARCH) -T firmware -C none -O u-boot \ -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \ $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) else -MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \ +MKIMAGEFLAGS_u-boot.img = -A $(IH_ARCH) -T firmware -C none -O u-boot \ -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" MKIMAGEFLAGS_u-boot-ivt.img = -A $(ARCH) -T firmware_ivt -C none -O u-boot \ From patchwork Thu Feb 21 01:30:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1045702 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 444cST2zcRz9s5c for ; Thu, 21 Feb 2019 12:33:45 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 0F112C220A4; Thu, 21 Feb 2019 01:33:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E4950C220DC; Thu, 21 Feb 2019 01:32:55 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id BEF50C220D6; Thu, 21 Feb 2019 01:32:52 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 2898FC2209F for ; Thu, 21 Feb 2019 01:32:49 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B0C7C80D; Wed, 20 Feb 2019 17:32:47 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 98FF53F575; Wed, 20 Feb 2019 17:32:45 -0800 (PST) From: Andre Przywara To: Maxime Ripard , Jagan Teki Date: Thu, 21 Feb 2019 01:30:28 +0000 Message-Id: <20190221013034.9099-4-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190221013034.9099-1-andre.przywara@arm.com> References: <20190221013034.9099-1-andre.przywara@arm.com> Cc: Tom Rini , Alex Graf , u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [PATCH 3/9] SPL: read and store arch property from U-Boot image X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Read the specified "arch" value from a legacy or FIT U-Boot image and store it in our SPL data structure. This allows loaders to take the target architecture in account for custom loading procedures. Having the complete string -> arch mapping for FIT based images in the SPL would be too big, so we leave it up to architectures (or boards) to overwrite the weak function that does the actual translation, possibly covering only the required subset there. Signed-off-by: Andre Przywara Reviewed-by: Alexander Graf --- common/spl/spl.c | 1 + common/spl/spl_fit.c | 8 ++++++++ include/spl.h | 3 ++- 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/common/spl/spl.c b/common/spl/spl.c index 2e2af1b28e..7d25e72bbb 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -272,6 +272,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image, #endif spl_image->os = image_get_os(header); + spl_image->arch = image_get_arch(header); spl_image->name = image_get_name(header); debug(SPL_TPL_PROMPT "payload image: %32s load addr: 0x%lx size: %d\n", diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index db436268cb..d583946571 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -340,6 +340,11 @@ static int spl_fit_image_get_os(const void *fit, int noffset, uint8_t *os) #endif } +__weak u8 spl_genimg_get_arch_id(const char *arch_str) +{ + return IH_ARCH_DEFAULT; +} + int spl_load_simple_fit(struct spl_image_info *spl_image, struct spl_load_info *info, ulong sector, void *fit) { @@ -351,6 +356,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, int images, ret; int base_offset, hsize, align_len = ARCH_DMA_MINALIGN - 1; int index = 0; + const char *arch_str; /* * For FIT with external data, figure out where the external images @@ -467,6 +473,8 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, else spl_image->os = IH_OS_U_BOOT; #endif + arch_str = fdt_getprop(fit, node, "arch", NULL); + spl_image->arch = spl_genimg_get_arch_id(arch_str); /* * Booting a next-stage U-Boot may require us to append the FDT. diff --git a/include/spl.h b/include/spl.h index f09909e189..aac85150a7 100644 --- a/include/spl.h +++ b/include/spl.h @@ -64,7 +64,6 @@ static inline bool u_boot_first_phase(void) struct spl_image_info { const char *name; - u8 os; uintptr_t load_addr; uintptr_t entry_point; #if CONFIG_IS_ENABLED(LOAD_FIT) @@ -79,6 +78,8 @@ struct spl_image_info { ulong dcrc_length; ulong dcrc; #endif + u8 os; + u8 arch; }; /* From patchwork Thu Feb 21 01:30:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1045707 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 444cWD6jmVz9s5c for ; Thu, 21 Feb 2019 12:36:08 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 44ABBC220FC; Thu, 21 Feb 2019 01:34:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4A524C220CD; Thu, 21 Feb 2019 01:33:18 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 56C5DC220E6; Thu, 21 Feb 2019 01:33:00 +0000 (UTC) Received: from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id E2F0EC220D7 for ; Thu, 21 Feb 2019 01:32:55 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 19D3515BE; Wed, 20 Feb 2019 17:32:50 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F366A3F575; Wed, 20 Feb 2019 17:32:47 -0800 (PST) From: Andre Przywara To: Maxime Ripard , Jagan Teki Date: Thu, 21 Feb 2019 01:30:29 +0000 Message-Id: <20190221013034.9099-5-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190221013034.9099-1-andre.przywara@arm.com> References: <20190221013034.9099-1-andre.przywara@arm.com> Cc: Tom Rini , Alex Graf , u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [PATCH 4/9] sunxi: introduce RMR switch to enter payloads in 64-bit mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The ARMv8 capable Allwinner A64 SoC comes out of reset in AArch32 mode. To run AArch64 code, we have to trigger a warm reset via the RMR register, which proceeds with code execution at the address stored in the RVBAR register. If the bootable payload in the FIT image is using a different architecture than the SPL has been compiled for, enter it via this said RMR switch mechanism, by writing the entry point address into the MMIO mapped, writable version of the RVBAR register. Then the warm reset is triggered via a system register write. If the payload architecture is the same as the SPL, we use the normal branch as usual. Signed-off-by: Andre Przywara --- arch/arm/lib/spl.c | 14 +++++++++ arch/arm/mach-sunxi/Makefile | 3 ++ arch/arm/mach-sunxi/spl_switch.c | 64 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 81 insertions(+) create mode 100644 arch/arm/mach-sunxi/spl_switch.c diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c index 33cc76ba3d..4d9370d232 100644 --- a/arch/arm/lib/spl.c +++ b/arch/arm/lib/spl.c @@ -73,3 +73,17 @@ void __noreturn jump_to_image_linux(struct spl_image_info *spl_image) } #endif /* CONFIG_ARM64 */ #endif + +u8 spl_genimg_get_arch_id(const char *arch_str) +{ + if (!arch_str) + return IH_ARCH_DEFAULT; + + if (!strcmp(arch_str, "arm")) + return IH_ARCH_ARM; + + if (!strcmp(arch_str, "arm64")) + return IH_ARCH_ARM64; + + return IH_ARCH_DEFAULT; +} diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index 43a93e3085..5a5e10a024 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -39,4 +39,7 @@ obj-$(CONFIG_SPL_SPI_SUNXI) += spl_spi_sunxi.o obj-$(CONFIG_SUNXI_DRAM_DW) += dram_sunxi_dw.o obj-$(CONFIG_SUNXI_DRAM_DW) += dram_timings/ obj-$(CONFIG_DRAM_SUN50I_H6) += dram_sun50i_h6.o +obj-$(CONFIG_MACH_SUN50I) += spl_switch.o +obj-$(CONFIG_MACH_SUN50I_H5) += spl_switch.o +obj-$(CONFIG_MACH_SUN50I_H6) += spl_switch.o endif diff --git a/arch/arm/mach-sunxi/spl_switch.c b/arch/arm/mach-sunxi/spl_switch.c new file mode 100644 index 0000000000..1de43c2396 --- /dev/null +++ b/arch/arm/mach-sunxi/spl_switch.c @@ -0,0 +1,64 @@ +/* + * (C) Copyright 2016 ARM Ltd. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include +#include + +static void __noreturn jump_to_image_native(struct spl_image_info *spl_image) +{ + typedef void __noreturn (*image_entry_noargs_t)(void); + + image_entry_noargs_t image_entry = + (image_entry_noargs_t)spl_image->entry_point; + + image_entry(); +} + +static void __noreturn reset_rmr_switch(void) +{ +#ifdef CONFIG_ARM64 + __asm__ volatile ( "mrs x0, RMR_EL3\n\t" + "bic x0, x0, #1\n\t" /* Clear enter-in-64 bit */ + "orr x0, x0, #2\n\t" /* set reset request bit */ + "msr RMR_EL3, x0\n\t" + "isb sy\n\t" + "nop\n\t" + "wfi\n\t" + "b .\n" + ::: "x0"); +#else + __asm__ volatile ( "mrc 15, 0, r0, cr12, cr0, 2\n\t" + "orr r0, r0, #3\n\t" /* request reset in 64 bit */ + "mcr 15, 0, r0, cr12, cr0, 2\n\t" + "isb\n\t" + "nop\n\t" + "wfi\n\t" + "b .\n" + ::: "r0"); +#endif + while (1); /* to avoid a compiler warning about __noreturn */ +} + +void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) +{ + if (spl_image->arch == IH_ARCH_DEFAULT) { + debug("entering by branch\n"); + jump_to_image_native(spl_image); + } else { + debug("entering by RMR switch\n"); +#ifdef CONFIG_MACH_SUN50I_H6 + writel(spl_image->entry_point, 0x09010040); +#else + writel(spl_image->entry_point, 0x017000a0); +#endif + DSB; + ISB; + reset_rmr_switch(); + } +} From patchwork Thu Feb 21 01:30:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1045706 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 444cVb28v7z9s5c for ; Thu, 21 Feb 2019 12:35:33 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 039AEC220D9; Thu, 21 Feb 2019 01:33:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 91E2DC220C2; Thu, 21 Feb 2019 01:33:11 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B18D8C220BC; Thu, 21 Feb 2019 01:32:57 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 5475AC220EA for ; Thu, 21 Feb 2019 01:32:53 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7924D80D; Wed, 20 Feb 2019 17:32:52 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5FC0C3F575; Wed, 20 Feb 2019 17:32:50 -0800 (PST) From: Andre Przywara To: Maxime Ripard , Jagan Teki Date: Thu, 21 Feb 2019 01:30:30 +0000 Message-Id: <20190221013034.9099-6-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190221013034.9099-1-andre.przywara@arm.com> References: <20190221013034.9099-1-andre.przywara@arm.com> Cc: Tom Rini , Alex Graf , u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [PATCH 5/9] sunxi: allow FIT image for 32-bit builds as well X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Even though we introduced FIT image support for the SPL to cover the 64-bit SoCs, there is no technical limitation to those parts. Change the Makefile stanza to always create a FIT image if the particular config either provided a script or an .its file. Signed-off-by: Andre Przywara Reviewed-by: Alexander Graf --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index d6e7c69f40..3a560e29bf 100644 --- a/Makefile +++ b/Makefile @@ -1350,7 +1350,7 @@ u-boot-x86-16bit.bin: u-boot FORCE endif ifneq ($(CONFIG_ARCH_SUNXI),) -ifeq ($(CONFIG_ARM64),) +ifeq ($(CONFIG_SPL_FIT_SOURCE)$(CONFIG_SPL_FIT_GENERATOR),) u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE $(call if_changed,binman) else From patchwork Thu Feb 21 01:30:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1045703 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 444cTJ5xwsz9s5c for ; Thu, 21 Feb 2019 12:34:28 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 70E2DC220BC; Thu, 21 Feb 2019 01:34:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 5EC8FC220C0; Thu, 21 Feb 2019 01:33:12 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E5280C220BE; Thu, 21 Feb 2019 01:33:00 +0000 (UTC) Received: from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id D819BC220C7 for ; Thu, 21 Feb 2019 01:32:55 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D396E1596; Wed, 20 Feb 2019 17:32:54 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BB8053F575; Wed, 20 Feb 2019 17:32:52 -0800 (PST) From: Andre Przywara To: Maxime Ripard , Jagan Teki Date: Thu, 21 Feb 2019 01:30:31 +0000 Message-Id: <20190221013034.9099-7-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190221013034.9099-1-andre.przywara@arm.com> References: <20190221013034.9099-1-andre.przywara@arm.com> Cc: Tom Rini , Alex Graf , u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [PATCH 6/9] sunxi: allow 32-bit builds for 64-bit SoCs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" At the moment we build the SPL and U-Boot proper for the 64-bit AArch64 instruction set. But since the cores provide an AArch32 compatibility mode and in fact the BootROM runs in 32-bit mode, it can be useful to have at least the SPL run in AArch32 as well. This has two advantages: - As AArch32 features the compact Thumb2 instruction encoding, we can get a much smaller image size, which is a relief for our SPL. - Staying in AArch32, with the MMU turned off, allows an easy return to the BootROM and its FEL mode. This enables FEL booting on those SoCs. Introduce a Kconfig option which toggles between CONFIG_ARM64 and CONFIG_CPU_V7A, to allow easy switching between the two modes. This can be manually selected in menuconfig, but follow-up patches will introduce a separate defconfig for that purpose. Signed-off-by: Andre Przywara --- arch/arm/mach-sunxi/Kconfig | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 74e234cded..347d737fd0 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -146,6 +146,10 @@ config SUNXI_DRAM_MAX_SIZE default 0xC0000000 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6 default 0x80000000 +config SUNXI_ARMV8_32BIT_BUILD + bool "Build 32-bit binaries for ARMv8 SoCs" + default n + choice prompt "Sunxi SoC Variant" optional @@ -275,7 +279,8 @@ config MACH_SUN9I config MACH_SUN50I bool "sun50i (Allwinner A64)" - select ARM64 + select ARM64 if !SUNXI_ARMV8_32BIT_BUILD + select CPU_V7A if SUNXI_ARMV8_32BIT_BUILD select DM_I2C select PHY_SUN4I_USB select SUN6I_PRCM @@ -291,14 +296,16 @@ config MACH_SUN50I config MACH_SUN50I_H5 bool "sun50i (Allwinner H5)" - select ARM64 + select ARM64 if !SUNXI_ARMV8_32BIT_BUILD + select CPU_V7A if SUNXI_ARMV8_32BIT_BUILD select MACH_SUNXI_H3_H5 select FIT select SPL_LOAD_FIT config MACH_SUN50I_H6 bool "sun50i (Allwinner H6)" - select ARM64 + select ARM64 if !SUNXI_ARMV8_32BIT_BUILD + select CPU_V7A if SUNXI_ARMV8_32BIT_BUILD select SUPPORT_SPL select FIT select SPL_LOAD_FIT From patchwork Thu Feb 21 01:30:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1045704 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 444cVH20Tmz9s8m for ; Thu, 21 Feb 2019 12:35:19 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id E10E0C220B9; Thu, 21 Feb 2019 01:33:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 12998C220DB; Thu, 21 Feb 2019 01:33:07 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3F2A8C220C6; Thu, 21 Feb 2019 01:33:01 +0000 (UTC) Received: from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 063B4C220EB for ; Thu, 21 Feb 2019 01:32:58 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3C52D80D; Wed, 20 Feb 2019 17:32:57 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 218ED3F575; Wed, 20 Feb 2019 17:32:54 -0800 (PST) From: Andre Przywara To: Maxime Ripard , Jagan Teki Date: Thu, 21 Feb 2019 01:30:32 +0000 Message-Id: <20190221013034.9099-8-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190221013034.9099-1-andre.przywara@arm.com> References: <20190221013034.9099-1-andre.przywara@arm.com> Cc: Tom Rini , Alex Graf , u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [PATCH 7/9] sunxi: H5: add generic H5 32-bit SPL defconfig X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" To be able to use FEL booting (Allwinner's USB-OTG protocol), we need a 32 bit SPL, to easily return into the 32 bit BootROM. Add a generic defconfig for that purpose, that should work on all boards. The resulting spl/sunxi-spl.bin can be used with the sunxi-fel tool to initialise the DRAM via FEL. This allows to load the normal versions for the rest of the firmware components (ATF, 64 bit U-Boot proper). This SPL will determine the architecture of the loaded binaries and will switch the bitness if necessary. Signed-off-by: Andre Przywara --- configs/sun50i-h5-ddr3-spl_defconfig | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 configs/sun50i-h5-ddr3-spl_defconfig diff --git a/configs/sun50i-h5-ddr3-spl_defconfig b/configs/sun50i-h5-ddr3-spl_defconfig new file mode 100644 index 0000000000..7b720e2fc5 --- /dev/null +++ b/configs/sun50i-h5-ddr3-spl_defconfig @@ -0,0 +1,16 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL=y +CONFIG_MACH_SUN50I_H5=y +CONFIG_SUNXI_ARMV8_32BIT_BUILD=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881977 +CONFIG_SPL_SPI_SUNXI=y +CONFIG_NR_DRAM_BANKS=1 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y From patchwork Thu Feb 21 01:30:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1045709 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 444cXG0BV7z9s5c for ; Thu, 21 Feb 2019 12:37:02 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id BCDEEC220E2; Thu, 21 Feb 2019 01:34:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 53464C220A3; Thu, 21 Feb 2019 01:33:54 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 33D26C220A4; Thu, 21 Feb 2019 01:33:05 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 60945C220B0 for ; Thu, 21 Feb 2019 01:33:00 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9829380D; Wed, 20 Feb 2019 17:32:59 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7F2D53F575; Wed, 20 Feb 2019 17:32:57 -0800 (PST) From: Andre Przywara To: Maxime Ripard , Jagan Teki Date: Thu, 21 Feb 2019 01:30:33 +0000 Message-Id: <20190221013034.9099-9-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190221013034.9099-1-andre.przywara@arm.com> References: <20190221013034.9099-1-andre.przywara@arm.com> Cc: Tom Rini , Alex Graf , u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [PATCH 8/9] sunxi: A64: add generic A64 32-bit SPL defconfigs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" To be able to use FEL booting (Allwinner's USB-OTG protocol), we need a 32 bit SPL, to easily return into the 32 bit BootROM. Add two generic defconfigs for that purpose, one for boards with DDR3 DRAM, the other for those with LPDDR3 DRAM chips. The resulting spl/sunxi-spl.bin can be used with the sunxi-fel tool to initialise the DRAM via FEL. This allows to load the normal versions for the rest of the firmware components (ATF, 64 bit U-Boot proper). This SPL will determine the architecture of the loaded binaries and will switch the bitness if necessary. Signed-off-by: Andre Przywara --- configs/sun50i-a64-ddr3-spl_defconfig | 13 +++++++++++++ configs/sun50i-a64-lpddr3-spl_defconfig | 17 +++++++++++++++++ 2 files changed, 30 insertions(+) create mode 100644 configs/sun50i-a64-ddr3-spl_defconfig create mode 100644 configs/sun50i-a64-lpddr3-spl_defconfig diff --git a/configs/sun50i-a64-ddr3-spl_defconfig b/configs/sun50i-a64-ddr3-spl_defconfig new file mode 100644 index 0000000000..fda15e2491 --- /dev/null +++ b/configs/sun50i-a64-ddr3-spl_defconfig @@ -0,0 +1,13 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL=y +CONFIG_MACH_SUN50I=y +CONFIG_SUNXI_ARMV8_32BIT_BUILD=y +CONFIG_NR_DRAM_BANKS=1 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" +CONFIG_SPL_SPI_SUNXI=y +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 diff --git a/configs/sun50i-a64-lpddr3-spl_defconfig b/configs/sun50i-a64-lpddr3-spl_defconfig new file mode 100644 index 0000000000..20bc376cbd --- /dev/null +++ b/configs/sun50i-a64-lpddr3-spl_defconfig @@ -0,0 +1,17 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL=y +CONFIG_MACH_SUN50I=y +CONFIG_SUNXI_ARMV8_32BIT_BUILD=y +CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y +CONFIG_DRAM_CLK=552 +CONFIG_DRAM_ZQ=3881949 +CONFIG_NR_DRAM_BANKS=1 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-lts" +CONFIG_MMC0_CD_PIN="" +CONFIG_SPL_SPI_SUNXI=y +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 From patchwork Thu Feb 21 01:30:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1045708 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 444cX31TL3z9s5c for ; Thu, 21 Feb 2019 12:36:51 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id D12FDC220BD; Thu, 21 Feb 2019 01:34:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7AE94C220CA; Thu, 21 Feb 2019 01:33:32 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 468F1C220CA; Thu, 21 Feb 2019 01:33:07 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id CA2CEC220D8 for ; Thu, 21 Feb 2019 01:33:02 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 030AB80D; Wed, 20 Feb 2019 17:33:02 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DA4223F575; Wed, 20 Feb 2019 17:32:59 -0800 (PST) From: Andre Przywara To: Maxime Ripard , Jagan Teki Date: Thu, 21 Feb 2019 01:30:34 +0000 Message-Id: <20190221013034.9099-10-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190221013034.9099-1-andre.przywara@arm.com> References: <20190221013034.9099-1-andre.przywara@arm.com> Cc: Tom Rini , Alex Graf , u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [PATCH 9/9] sunxi: H6: add generic H6 32-bit SPL defconfig X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" To be able to use FEL booting (Allwinner's USB-OTG protocol), we need a 32 bit SPL, to easily return into the 32 bit BootROM. Add a generic defconfig for that purpose, that should work on all boards. The resulting spl/sunxi-spl.bin can be used with the sunxi-fel tool to initialise the DRAM via FEL. This allows to load the normal versions for the rest of the firmware components (ATF, 64 bit U-Boot proper). This SPL will determine the architecture of the loaded binaries and will switch the bitness if necessary. Signed-off-by: Andre Przywara --- configs/sun50i-h6-lpddr3-spl_defconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 configs/sun50i-h6-lpddr3-spl_defconfig diff --git a/configs/sun50i-h6-lpddr3-spl_defconfig b/configs/sun50i-h6-lpddr3-spl_defconfig new file mode 100644 index 0000000000..8480d027a5 --- /dev/null +++ b/configs/sun50i-h6-lpddr3-spl_defconfig @@ -0,0 +1,12 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL=y +CONFIG_MACH_SUN50I_H6=y +CONFIG_SUNXI_ARMV8_32BIT_BUILD=y +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_NR_DRAM_BANKS=1 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64"