From patchwork Tue Feb 19 09:58:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mathieu Othacehe X-Patchwork-Id: 1044579 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="gmZYJq3E"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 443bmT0XQlz9s21 for ; Tue, 19 Feb 2019 20:59:05 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727845AbfBSJ66 (ORCPT ); Tue, 19 Feb 2019 04:58:58 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:41604 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727501AbfBSJ6Y (ORCPT ); Tue, 19 Feb 2019 04:58:24 -0500 Received: by mail-wr1-f65.google.com with SMTP id n2so9288516wrw.8; Tue, 19 Feb 2019 01:58:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=SKvnZE8FRNSDrOi2i7LIYAhX4r86ogk967jOuzBNxJ8=; b=gmZYJq3EVs/GLEYLKTki9zHJ0/gH7q1NM5Wr67MBcFn4on04RaJvIppP0LBCix+wjx QgRpbf3A25ui8nVgPUwR+uJFIXU0jCxExbx2A+sjgZwx5LnEdannR6RiWhR3ZTewWy6w UHOMButpLrk8sRedjlOIYFw/f6KvIVWPHygPD8jEJI0IfEv3yhrusX+hhbvJJe5Z+dz9 +THieDH+Y8638ptIpPasL2eTgIEks5/pOypEj2YWK3dCg3U1s+vf4PXnga+9FbO7BwkD /WPQNJ5syuax/6qs/yz9HiAcYY8FBtaoBlnahxuIyleFffCiOfblivF/5YtIaohUyznN lU8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=SKvnZE8FRNSDrOi2i7LIYAhX4r86ogk967jOuzBNxJ8=; b=JxMoULt1OEA2oZ0l9GGMicD7eNFLz9L2VzyCal3DDvx9k7/pVZOzA+MFCKKTv43SNG r04gRCTDVWBcbGizS6gD4JaAjy+owOmwJtjj4xGKQkhwvb2ZYK9oUegNIc/nqhMp8M0v QodZE9FnfMORwSRgALRSH/Y8e7g1fYmwCSMsJgRoqeH4J2x1PaZWDgNwU1VKqZ6PQXLP VTjRuyIaMw6e9dj9MoUyA8e8gYA5feVHyDlJOABOP7ZyJQeUjCIrALWKGgibQUOIrwzm 7A6lApjJI5YehH05kN/ZHWPBA47iVDx84Hy2fpHiQJbuprPv7shlgnVBCwD/UJQAzVOl PLfg== X-Gm-Message-State: AHQUAuavu6U7bxhsfwL525UKaT0zsO413RhH074Tv0qUfLBFIyG5MGxA IcZKscojGU/3Oe6JEeDcRC8= X-Google-Smtp-Source: AHgI3IYAj+J1tqAUPOBuR6osbM7yLZXX4MklFHSY3BnLZetYUh8GKtxt4Mri6/1sbyxfFQOfv6/m0g== X-Received: by 2002:adf:c752:: with SMTP id b18mr20122745wrh.105.1550570301773; Tue, 19 Feb 2019 01:58:21 -0800 (PST) Received: from fuji.Parrot.Biz (smtp.parrot.biz. [62.23.167.188]) by smtp.gmail.com with ESMTPSA id k20sm31639220wre.41.2019.02.19.01.58.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 01:58:20 -0800 (PST) From: Mathieu Othacehe To: thierry.reding@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mathieu Othacehe Subject: [PATCH v3 1/3] pwm: hibvt: Use individual struct per of-data. Date: Tue, 19 Feb 2019 10:58:06 +0100 Message-Id: <20190219095808.12059-1-m.othacehe@gmail.com> X-Mailer: git-send-email 2.17.1 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Split pwm-soc array in one struct per soc and point to the corresponding on in of-data. Signed-off-by: Mathieu Othacehe Acked-by: Uwe Kleine-König --- drivers/pwm/pwm-hibvt.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/pwm/pwm-hibvt.c b/drivers/pwm/pwm-hibvt.c index 27c107e78d59..ffc803818c3c 100644 --- a/drivers/pwm/pwm-hibvt.c +++ b/drivers/pwm/pwm-hibvt.c @@ -49,15 +49,19 @@ struct hibvt_pwm_chip { struct clk *clk; void __iomem *base; struct reset_control *rstc; + const struct hibvt_pwm_soc *soc; }; struct hibvt_pwm_soc { u32 num_pwms; }; -static const struct hibvt_pwm_soc pwm_soc[2] = { - { .num_pwms = 4 }, - { .num_pwms = 8 }, +static const struct hibvt_pwm_soc hi3516cv300_soc_info = { + .num_pwms = 4, +}; + +static const struct hibvt_pwm_soc hi3519v100_soc_info = { + .num_pwms = 8, }; static inline struct hibvt_pwm_chip *to_hibvt_pwm_chip(struct pwm_chip *chip) @@ -198,6 +202,7 @@ static int hibvt_pwm_probe(struct platform_device *pdev) pwm_chip->chip.npwm = soc->num_pwms; pwm_chip->chip.of_xlate = of_pwm_xlate_with_flags; pwm_chip->chip.of_pwm_n_cells = 3; + pwm_chip->soc = soc; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); pwm_chip->base = devm_ioremap_resource(&pdev->dev, res); @@ -250,8 +255,10 @@ static int hibvt_pwm_remove(struct platform_device *pdev) } static const struct of_device_id hibvt_pwm_of_match[] = { - { .compatible = "hisilicon,hi3516cv300-pwm", .data = &pwm_soc[0] }, - { .compatible = "hisilicon,hi3519v100-pwm", .data = &pwm_soc[1] }, + { .compatible = "hisilicon,hi3516cv300-pwm", + .data = &hi3516cv300_soc_info }, + { .compatible = "hisilicon,hi3519v100-pwm", + .data = &hi3519v100_soc_info }, { } }; MODULE_DEVICE_TABLE(of, hibvt_pwm_of_match); From patchwork Tue Feb 19 09:58:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Othacehe X-Patchwork-Id: 1044576 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="SFrXQsWQ"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 443blp2lRmz9s21 for ; Tue, 19 Feb 2019 20:58:30 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727990AbfBSJ62 (ORCPT ); Tue, 19 Feb 2019 04:58:28 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:54966 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727918AbfBSJ62 (ORCPT ); Tue, 19 Feb 2019 04:58:28 -0500 Received: by mail-wm1-f67.google.com with SMTP id a62so1859405wmh.4; Tue, 19 Feb 2019 01:58:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=amVLtslKah8NEqXbibYVvTbqGmihSwq/9ou54c3QAlI=; b=SFrXQsWQ6pJtOaMbI77sTKLmvWZOqqmTF3ubxMbaxpZE5qhShMLj3ySRuoeB70M+As /iNAcPyZBK0O6miuMNnTlx8BrYoe3jxQ4BsyXK8U2TNaEQqjGDCYfgAEOaV7SY4ei4CR GM4HnsN3PnhF4jXLvYxDFmCSJ/Q7Ap4NauGf5EHCb9hHvp2XgTnSMjdJvEiUXgUCkD1m OP012LjGF0GkEqfaBIvPinyQl5vfpVwkBWc/JXDNadQlB+CMz6dJsPjKHIgdjChQJ2vp NsBz5bOmWEcffbIGmXhunPSKu2fS54HSJ6JCAPp+mYLkqxdEVdt0WiGT4rnBbl+wbr64 +mkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=amVLtslKah8NEqXbibYVvTbqGmihSwq/9ou54c3QAlI=; b=t1W2uHGDShdCFZE3QdGK76A5wY2RmbyWONe1q4fUfgBfGDjGMiORINoa8M0q/d8GuB xXu/nBE6WLWLyBezk4WCYxIegKbRztyxKsb0RHS/C91DCSdMIG4hvPCct0p+8p8FXTzF Rq8cM58D/0KCMJdCS2249j0BrwvtVjfThlZgyQznL6pGLNov7en45B5JdSQdzimPNYk2 kbEebmXrzZc2m2RR/sybutu/9xPULfDOO1UYLWjam/l1VW8kPhjAEaRrOWZOMKWHhINt l3YZaDaNBPU6S/Guzy7B9FB53MDpBy9tE3R05rNLpbqvXsS7Y3ribrXt38CoMEb6BVkF 7JsQ== X-Gm-Message-State: AHQUAuYvawVMWuEak0ExnykLSrvWXkOC6bwkYOF6ZQNWO+Ztww7oU9VO sV4m/B0RwfOd2+/vGUtLX+A= X-Google-Smtp-Source: AHgI3IaG8kH7aNjpLP+9JFVuG4cu4TlonE73wfIZBFZs2dWneDLXs6Ml51vxv73i3awxWX3aSxsrXw== X-Received: by 2002:a1c:6589:: with SMTP id z131mr2140274wmb.120.1550570305849; Tue, 19 Feb 2019 01:58:25 -0800 (PST) Received: from fuji.Parrot.Biz (smtp.parrot.biz. [62.23.167.188]) by smtp.gmail.com with ESMTPSA id k20sm31639220wre.41.2019.02.19.01.58.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 01:58:24 -0800 (PST) From: Mathieu Othacehe To: thierry.reding@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mathieu Othacehe Subject: [PATCH v3 2/3] dt-bindings: pwm: hibvt: Add hi3559v100 support Date: Tue, 19 Feb 2019 10:58:07 +0100 Message-Id: <20190219095808.12059-2-m.othacehe@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190219095808.12059-1-m.othacehe@gmail.com> References: <20190219095808.12059-1-m.othacehe@gmail.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Add support for hi3559v100-shub-pwm and hisilicon,hi3559v100-pwm platforms. Reviewed-by: Rob Herring Signed-off-by: Mathieu Othacehe --- Documentation/devicetree/bindings/pwm/pwm-hibvt.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt b/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt index fa7849d67836..daedfef09bb6 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt @@ -5,6 +5,8 @@ Required properties: The SoC specific strings supported including: "hisilicon,hi3516cv300-pwm" "hisilicon,hi3519v100-pwm" + "hisilicon,hi3559v100-shub-pwm" + "hisilicon,hi3559v100-pwm - reg: physical base address and length of the controller's registers. - clocks: phandle and clock specifier of the PWM reference clock. - resets: phandle and reset specifier for the PWM controller reset. From patchwork Tue Feb 19 09:58:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Othacehe X-Patchwork-Id: 1044577 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="B4DLEUO0"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 443bm92yRzz9sDL for ; Tue, 19 Feb 2019 20:58:49 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727918AbfBSJ6n (ORCPT ); Tue, 19 Feb 2019 04:58:43 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:51603 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727942AbfBSJ63 (ORCPT ); Tue, 19 Feb 2019 04:58:29 -0500 Received: by mail-wm1-f67.google.com with SMTP id n19so1860228wmi.1; Tue, 19 Feb 2019 01:58:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MmokmzNg6WkTR+NygtzuXU+g6jndTuYFkgnanLj3Ipo=; b=B4DLEUO0DFsRBjtKvitDAKr7JA8wB558yyNXOe0AF8OFun32pRzSMXI+4bIjb+58R0 x5wU1ZthIDtA8nMbne+AjAJRtu0ANmZg42Eyj72ZTaXcYJoRbGsdoeoWDlls/aCx0Ba9 oAQtJWtQeSp/r0MpqLz4DYDbZ1/utmQtltjZzqC2sVdGVYGzz1yPeMZbCyKpuNjYp2y3 mxEhe0CR/AYryQ1MgIuHpJy7dPkVECGaTKvC0kud8Bzr2V0u9ibzGLmzGG7zxqmXk9rl GlQ2cM1Vu9PxqGess0cAwQp5fuKnnfJwi6ZfDhA4UPSEhyK4oPndXumFZCW/28fVIatL 3L6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MmokmzNg6WkTR+NygtzuXU+g6jndTuYFkgnanLj3Ipo=; b=I3xs2q4MhAZwA4lILB1JckE6lAJIhn/UKWhnL16bJO+u92CjAYjsvUDD3pL/6SSGbK 6xw0zhSI7ZCHl0c79j9oZiYuTzj8P3CtghsHYf+wVQeDtv0iUAp9bL0vWyYgeRu7KOL3 4RMnCmHEQLXxody133j12BUBsi2Qgfd8plBfk1lXCrVPlgEIC3V1nqTjcaw5KMarRBzE YcOa4EGH57oCUkRUXmk9U4Fi63e5yYSLy80rU/aUAQ/JmKvaJtSPFxEozbL0Bq43x3EW v5gHgmirt1lvNoEXNHaHx0HzRf+CL1+d68cwwNHQG4ZuJP4FZsykP+26NdrmFozTa0gb uvLA== X-Gm-Message-State: AHQUAububSfNhBec0BwGE8usNBjvA+DZokjbecAJLmWKez9gj7fmiJta L+XYQfjboViO63cydr2QaCY= X-Google-Smtp-Source: AHgI3IZ8oVD5uxw/MiO3KUSfJZ+7bVrdejE22hlYNUuSdIPuPWie8H43PcjkKNjcapqgcihkv4L1Jg== X-Received: by 2002:a05:600c:2159:: with SMTP id v25mr2097620wml.17.1550570307194; Tue, 19 Feb 2019 01:58:27 -0800 (PST) Received: from fuji.Parrot.Biz (smtp.parrot.biz. [62.23.167.188]) by smtp.gmail.com with ESMTPSA id k20sm31639220wre.41.2019.02.19.01.58.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 01:58:26 -0800 (PST) From: Mathieu Othacehe To: thierry.reding@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mathieu Othacehe Subject: [PATCH v3 3/3] pwm: hibvt: Add hi3559v100 support Date: Tue, 19 Feb 2019 10:58:08 +0100 Message-Id: <20190219095808.12059-3-m.othacehe@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190219095808.12059-1-m.othacehe@gmail.com> References: <20190219095808.12059-1-m.othacehe@gmail.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Add support for hi3559v100-shub-pwm and hisilicon,hi3559v100-pwm platforms. They require a special quirk: pwm has to be enabled again to force duty_cycle refresh. Signed-off-by: Mathieu Othacehe --- drivers/pwm/pwm-hibvt.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/pwm/pwm-hibvt.c b/drivers/pwm/pwm-hibvt.c index ffc803818c3c..f81c6fcb79be 100644 --- a/drivers/pwm/pwm-hibvt.c +++ b/drivers/pwm/pwm-hibvt.c @@ -54,6 +54,7 @@ struct hibvt_pwm_chip { struct hibvt_pwm_soc { u32 num_pwms; + bool quirk_force_enable; }; static const struct hibvt_pwm_soc hi3516cv300_soc_info = { @@ -64,6 +65,16 @@ static const struct hibvt_pwm_soc hi3519v100_soc_info = { .num_pwms = 8, }; +static const struct hibvt_pwm_soc hi3559v100_shub_soc_info = { + .num_pwms = 8, + .quirk_force_enable = true, +}; + +static const struct hibvt_pwm_soc hi3559v100_soc_info = { + .num_pwms = 2, + .quirk_force_enable = true, +}; + static inline struct hibvt_pwm_chip *to_hibvt_pwm_chip(struct pwm_chip *chip) { return container_of(chip, struct hibvt_pwm_chip, chip); @@ -152,13 +163,23 @@ static void hibvt_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, static int hibvt_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_state *state) { + struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip); + if (state->polarity != pwm->state.polarity) hibvt_pwm_set_polarity(chip, pwm, state->polarity); if (state->period != pwm->state.period || - state->duty_cycle != pwm->state.duty_cycle) + state->duty_cycle != pwm->state.duty_cycle) { hibvt_pwm_config(chip, pwm, state->duty_cycle, state->period); + /* + * Some implementations require the pwm to be enabled + * once more each time the duty cycle is refreshed. + */ + if (hi_pwm_chip->soc->quirk_force_enable && state->enabled) + hibvt_pwm_enable(chip, pwm); + } + if (state->enabled != pwm->state.enabled) { if (state->enabled) hibvt_pwm_enable(chip, pwm); @@ -259,6 +280,10 @@ static const struct of_device_id hibvt_pwm_of_match[] = { .data = &hi3516cv300_soc_info }, { .compatible = "hisilicon,hi3519v100-pwm", .data = &hi3519v100_soc_info }, + { .compatible = "hisilicon,hi3559v100-shub-pwm", + .data = &hi3559v100_shub_soc_info }, + { .compatible = "hisilicon,hi3559v100-pwm", + .data = &hi3559v100_soc_info }, { } }; MODULE_DEVICE_TABLE(of, hibvt_pwm_of_match);