From patchwork Tue Feb 19 04:50:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 1044430 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="JBVVuHsv"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 443SwR39j4z9s1l for ; Tue, 19 Feb 2019 15:50:30 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725764AbfBSEu3 (ORCPT ); Mon, 18 Feb 2019 23:50:29 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:2056 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725730AbfBSEu3 (ORCPT ); Mon, 18 Feb 2019 23:50:29 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 18 Feb 2019 20:50:35 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 18 Feb 2019 20:50:28 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 18 Feb 2019 20:50:28 -0800 Received: from HQMAIL104.nvidia.com (172.18.146.11) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 19 Feb 2019 04:50:28 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Tue, 19 Feb 2019 04:50:28 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.161.150]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 18 Feb 2019 20:50:27 -0800 From: Sowjanya Komatineni To: , , , CC: , , , Subject: [PATCH V4 1/2] i2c: tegra: remove master fifo support on tegra186 Date: Mon, 18 Feb 2019 20:50:24 -0800 Message-ID: <1550551825-1245-1-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1550551835; bh=HaLrXyjeA/kqNrsW1idTNvDYdlNKXy7I/XwbBqQpmgQ=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: X-NVConfidentiality:MIME-Version:Content-Type; b=JBVVuHsvzFcCt46HFU5FaHTIntNHHZOqMq74Luolkr1sBhOlbRVDld3caasIGhcq/ 7k2+4qVowfTLgzZit5Ql2BODP25Nln5f/rLVZ0BALFkrzXA4lttmmA+b+tdOb4El4g ZKvG3+pIh/EqR4lxzPyXiXduzWZH0t4OxUOMYIl3n3IROCBr9/Apyzl+4I72Nzgaov RlPdrCW98zZT1Zz4VvOFcPFdODEchcNKPh5ycHPiEaUN5Qgy12mknQIQf2geXAC/Yv im+DDByHRjcztiCSCb45iC5ZC0p8qWC46lSgX8L+2D7OU/XvWx1yz5lhXcO7o3J/Xv 2hamKOou66HSQ== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Tegra186 does not have master fifo control register and instead uses fifo control register like prior tegra chipset. This patch fixes this and prevents crashing during boot when accessing fifo control registers. Signed-off-by: Sowjanya Komatineni Acked-by: Thierry Reding --- drivers/i2c/busses/i2c-tegra.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index a4cd79c9f7a7..e6851904acc1 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -1436,7 +1436,7 @@ static const struct tegra_i2c_hw_feature tegra186_i2c_hw = { .has_config_load_reg = true, .has_multi_master_mode = true, .has_slcg_override_reg = true, - .has_mst_fifo = true, + .has_mst_fifo = false, .quirks = &tegra_i2c_quirks, .supports_bus_clear = true, .has_apb_dma = false, From patchwork Tue Feb 19 04:50:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 1044433 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="WuaAie5l"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 443Swf2MNGz9s1l for ; Tue, 19 Feb 2019 15:50:42 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725885AbfBSEuh (ORCPT ); Mon, 18 Feb 2019 23:50:37 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:1202 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725730AbfBSEuh (ORCPT ); Mon, 18 Feb 2019 23:50:37 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 18 Feb 2019 20:50:41 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Mon, 18 Feb 2019 20:50:36 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Mon, 18 Feb 2019 20:50:36 -0800 Received: from HQMAIL110.nvidia.com (172.18.146.15) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 19 Feb 2019 04:50:36 +0000 Received: from HQMAIL103.nvidia.com (172.20.187.11) by hqmail110.nvidia.com (172.18.146.15) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 19 Feb 2019 04:50:30 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Tue, 19 Feb 2019 04:50:30 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.161.150]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 18 Feb 2019 20:50:29 -0800 From: Sowjanya Komatineni To: , , , CC: , , , Subject: [PATCH V4 2/2] i2c: tegra: remove multi-master support Date: Mon, 18 Feb 2019 20:50:25 -0800 Message-ID: <1550551825-1245-2-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1550551825-1245-1-git-send-email-skomatineni@nvidia.com> References: <1550551825-1245-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1550551841; bh=pzNEtKdTrbqaZqgK9hSyAwcCXgOXh5EjLj0Qvh77Ix8=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=WuaAie5lmFenWSJNLnhohUH3tHxvCk21/89aCOW+cpSU1nXDVXHYdPsdK9LDxiy78 yx+a5mBCATUy5mFXvMzcZNzyimta6axe1lYrBh5tteolUXkYeDfKx0JYuvOJjyDr2k Dr5ix/Mf1wbbduEoCS8w571he0h/3gjRWo3/ZyubZNIrAfztPEwiPYFBkAiinwAi/O FSXgbH2r+4kOexr9+MB/fAvJDn4yQdWs2LZ2KuAprI1b7EcxoHMDXkjKXG4QR4f2CQ PbZ+YhWf4U9+dXyWA1Aqqpv1hEjh3F7gFyYeZby9abiQ4U1w9nW8xCmYB3tp4FiBKP T/pI0qYbgzctA== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org multi-master support is defeatured on Tegra210 and Tegra186 due to known bugs. This patch removes multi-master support for Tegra210 and Tegra186 i2c hw feature. Signed-off-by: Sowjanya Komatineni Acked-by: Thierry Reding --- drivers/i2c/busses/i2c-tegra.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index e6851904acc1..26f686bc3491 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -1409,7 +1409,7 @@ static const struct tegra_i2c_hw_feature tegra210_i2c_hw = { .clk_divisor_fast_mode = 0x19, .clk_divisor_fast_plus_mode = 0x10, .has_config_load_reg = true, - .has_multi_master_mode = true, + .has_multi_master_mode = false, .has_slcg_override_reg = true, .has_mst_fifo = false, .quirks = &tegra_i2c_quirks, @@ -1434,7 +1434,7 @@ static const struct tegra_i2c_hw_feature tegra186_i2c_hw = { .clk_divisor_fast_mode = 0x19, .clk_divisor_fast_plus_mode = 0x10, .has_config_load_reg = true, - .has_multi_master_mode = true, + .has_multi_master_mode = false, .has_slcg_override_reg = true, .has_mst_fifo = false, .quirks = &tegra_i2c_quirks,