From patchwork Sat Jan 19 01:30:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1027851 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hL1R4FLBz9sDB for ; Sat, 19 Jan 2019 12:33:31 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 103EBC21E74; Sat, 19 Jan 2019 01:33:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id DEAE8C22078; Sat, 19 Jan 2019 01:32:53 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 7D73AC21EC5; Sat, 19 Jan 2019 01:32:49 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 0945DC21EC2 for ; Sat, 19 Jan 2019 01:32:46 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8B65A15AB; Fri, 18 Jan 2019 17:32:44 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7FFC93F6A8; Fri, 18 Jan 2019 17:32:42 -0800 (PST) From: Andre Przywara To: Jagan Teki , Maxime Ripard Date: Sat, 19 Jan 2019 01:30:47 +0000 Message-Id: <20190119013055.28023-2-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190119013055.28023-1-andre.przywara@arm.com> References: <20190119013055.28023-1-andre.przywara@arm.com> Cc: Tom Rini , Priit Laes , linux-sunxi@googlegroups.com, u-boot@lists.denx.de, Icenowy Zheng Subject: [U-Boot] [PATCH 1/9] sunxi: clk: add MMC gates/resets X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add the MMC clock gates and reset bits for all the Allwinner SoCs. This allows them to be used by the MMC driver. We don't advertise the mod clock yet, as this is still handled by the MMC driver. Signed-off-by: Andre Przywara --- drivers/clk/sunxi/clk_a10.c | 4 ++++ drivers/clk/sunxi/clk_a10s.c | 3 +++ drivers/clk/sunxi/clk_a23.c | 6 ++++++ drivers/clk/sunxi/clk_a31.c | 8 ++++++++ drivers/clk/sunxi/clk_a64.c | 6 ++++++ drivers/clk/sunxi/clk_a83t.c | 6 ++++++ drivers/clk/sunxi/clk_h3.c | 6 ++++++ drivers/clk/sunxi/clk_h6.c | 6 ++++++ drivers/clk/sunxi/clk_r40.c | 8 ++++++++ 9 files changed, 53 insertions(+) diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c index b00f51af8b..2aa41efe17 100644 --- a/drivers/clk/sunxi/clk_a10.c +++ b/drivers/clk/sunxi/clk_a10.c @@ -18,6 +18,10 @@ static struct ccu_clk_gate a10_gates[] = { [CLK_AHB_OHCI0] = GATE(0x060, BIT(2)), [CLK_AHB_EHCI1] = GATE(0x060, BIT(3)), [CLK_AHB_OHCI1] = GATE(0x060, BIT(4)), + [CLK_AHB_MMC0] = GATE(0x060, BIT(8)), + [CLK_AHB_MMC1] = GATE(0x060, BIT(9)), + [CLK_AHB_MMC2] = GATE(0x060, BIT(10)), + [CLK_AHB_MMC3] = GATE(0x060, BIT(11)), [CLK_APB1_UART0] = GATE(0x06c, BIT(16)), [CLK_APB1_UART1] = GATE(0x06c, BIT(17)), diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c index aa904ce067..87b74e52dc 100644 --- a/drivers/clk/sunxi/clk_a10s.c +++ b/drivers/clk/sunxi/clk_a10s.c @@ -16,6 +16,9 @@ static struct ccu_clk_gate a10s_gates[] = { [CLK_AHB_OTG] = GATE(0x060, BIT(0)), [CLK_AHB_EHCI] = GATE(0x060, BIT(1)), [CLK_AHB_OHCI] = GATE(0x060, BIT(2)), + [CLK_AHB_MMC0] = GATE(0x060, BIT(8)), + [CLK_AHB_MMC1] = GATE(0x060, BIT(9)), + [CLK_AHB_MMC2] = GATE(0x060, BIT(10)), [CLK_APB1_UART0] = GATE(0x06c, BIT(16)), [CLK_APB1_UART1] = GATE(0x06c, BIT(17)), diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c index 854259bf81..1ef2359286 100644 --- a/drivers/clk/sunxi/clk_a23.c +++ b/drivers/clk/sunxi/clk_a23.c @@ -13,6 +13,9 @@ #include static struct ccu_clk_gate a23_gates[] = { + [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), + [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), + [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), [CLK_BUS_OTG] = GATE(0x060, BIT(24)), [CLK_BUS_EHCI] = GATE(0x060, BIT(26)), [CLK_BUS_OHCI] = GATE(0x060, BIT(29)), @@ -35,6 +38,9 @@ static struct ccu_reset a23_resets[] = { [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), [RST_USB_HSIC] = RESET(0x0cc, BIT(2)), + [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), + [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), + [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), [RST_BUS_OTG] = RESET(0x2c0, BIT(24)), [RST_BUS_EHCI] = RESET(0x2c0, BIT(26)), [RST_BUS_OHCI] = RESET(0x2c0, BIT(29)), diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c index a38d76cb7c..5bd8b7dccc 100644 --- a/drivers/clk/sunxi/clk_a31.c +++ b/drivers/clk/sunxi/clk_a31.c @@ -13,6 +13,10 @@ #include static struct ccu_clk_gate a31_gates[] = { + [CLK_AHB1_MMC0] = GATE(0x060, BIT(8)), + [CLK_AHB1_MMC1] = GATE(0x060, BIT(9)), + [CLK_AHB1_MMC2] = GATE(0x060, BIT(10)), + [CLK_AHB1_MMC3] = GATE(0x060, BIT(11)), [CLK_AHB1_OTG] = GATE(0x060, BIT(24)), [CLK_AHB1_EHCI0] = GATE(0x060, BIT(26)), [CLK_AHB1_EHCI1] = GATE(0x060, BIT(27)), @@ -40,6 +44,10 @@ static struct ccu_reset a31_resets[] = { [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), [RST_USB_PHY2] = RESET(0x0cc, BIT(2)), + [RST_AHB1_MMC0] = RESET(0x2c0, BIT(8)), + [RST_AHB1_MMC1] = RESET(0x2c0, BIT(9)), + [RST_AHB1_MMC2] = RESET(0x2c0, BIT(10)), + [RST_AHB1_MMC3] = RESET(0x2c0, BIT(11)), [RST_AHB1_OTG] = RESET(0x2c0, BIT(24)), [RST_AHB1_EHCI0] = RESET(0x2c0, BIT(26)), [RST_AHB1_EHCI1] = RESET(0x2c0, BIT(27)), diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c index a2ba6eefc5..910275fbce 100644 --- a/drivers/clk/sunxi/clk_a64.c +++ b/drivers/clk/sunxi/clk_a64.c @@ -13,6 +13,9 @@ #include static const struct ccu_clk_gate a64_gates[] = { + [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), + [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), + [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), [CLK_BUS_OTG] = GATE(0x060, BIT(23)), [CLK_BUS_EHCI0] = GATE(0x060, BIT(24)), [CLK_BUS_EHCI1] = GATE(0x060, BIT(25)), @@ -38,6 +41,9 @@ static const struct ccu_reset a64_resets[] = { [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), [RST_USB_HSIC] = RESET(0x0cc, BIT(2)), + [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), + [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), + [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), [RST_BUS_OTG] = RESET(0x2c0, BIT(23)), [RST_BUS_EHCI0] = RESET(0x2c0, BIT(24)), [RST_BUS_EHCI1] = RESET(0x2c0, BIT(25)), diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c index 1ef6ac5b25..b5a555da36 100644 --- a/drivers/clk/sunxi/clk_a83t.c +++ b/drivers/clk/sunxi/clk_a83t.c @@ -13,6 +13,9 @@ #include static struct ccu_clk_gate a83t_gates[] = { + [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), + [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), + [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), [CLK_BUS_OTG] = GATE(0x060, BIT(24)), [CLK_BUS_EHCI0] = GATE(0x060, BIT(26)), [CLK_BUS_EHCI1] = GATE(0x060, BIT(27)), @@ -36,6 +39,9 @@ static struct ccu_reset a83t_resets[] = { [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), [RST_USB_HSIC] = RESET(0x0cc, BIT(2)), + [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), + [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), + [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), [RST_BUS_OTG] = RESET(0x2c0, BIT(24)), [RST_BUS_EHCI0] = RESET(0x2c0, BIT(26)), [RST_BUS_EHCI1] = RESET(0x2c0, BIT(27)), diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c index f82949b3b6..98af372ec5 100644 --- a/drivers/clk/sunxi/clk_h3.c +++ b/drivers/clk/sunxi/clk_h3.c @@ -13,6 +13,9 @@ #include static struct ccu_clk_gate h3_gates[] = { + [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), + [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), + [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), [CLK_BUS_OTG] = GATE(0x060, BIT(23)), [CLK_BUS_EHCI0] = GATE(0x060, BIT(24)), [CLK_BUS_EHCI1] = GATE(0x060, BIT(25)), @@ -44,6 +47,9 @@ static struct ccu_reset h3_resets[] = { [RST_USB_PHY2] = RESET(0x0cc, BIT(2)), [RST_USB_PHY3] = RESET(0x0cc, BIT(3)), + [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), + [RST_BUS_MMC0] = RESET(0x2c0, BIT(9)), + [RST_BUS_MMC0] = RESET(0x2c0, BIT(10)), [RST_BUS_OTG] = RESET(0x2c0, BIT(23)), [RST_BUS_EHCI0] = RESET(0x2c0, BIT(24)), [RST_BUS_EHCI1] = RESET(0x2c0, BIT(25)), diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c index 0da3a40e3d..902612da91 100644 --- a/drivers/clk/sunxi/clk_h6.c +++ b/drivers/clk/sunxi/clk_h6.c @@ -13,6 +13,9 @@ #include static struct ccu_clk_gate h6_gates[] = { + [CLK_BUS_MMC0] = GATE(0x84c, BIT(0)), + [CLK_BUS_MMC1] = GATE(0x84c, BIT(1)), + [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)), [CLK_BUS_UART0] = GATE(0x90c, BIT(0)), [CLK_BUS_UART1] = GATE(0x90c, BIT(1)), [CLK_BUS_UART2] = GATE(0x90c, BIT(2)), @@ -20,6 +23,9 @@ static struct ccu_clk_gate h6_gates[] = { }; static struct ccu_reset h6_resets[] = { + [RST_BUS_MMC0] = RESET(0x84c, BIT(16)), + [RST_BUS_MMC1] = RESET(0x84c, BIT(17)), + [RST_BUS_MMC2] = RESET(0x84c, BIT(18)), [RST_BUS_UART0] = RESET(0x90c, BIT(16)), [RST_BUS_UART1] = RESET(0x90c, BIT(17)), [RST_BUS_UART2] = RESET(0x90c, BIT(18)), diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c index fd7aae97ea..b9457e1971 100644 --- a/drivers/clk/sunxi/clk_r40.c +++ b/drivers/clk/sunxi/clk_r40.c @@ -13,6 +13,10 @@ #include static struct ccu_clk_gate r40_gates[] = { + [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), + [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), + [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), + [CLK_BUS_MMC3] = GATE(0x060, BIT(11)), [CLK_BUS_OTG] = GATE(0x060, BIT(25)), [CLK_BUS_EHCI0] = GATE(0x060, BIT(26)), [CLK_BUS_EHCI1] = GATE(0x060, BIT(27)), @@ -43,6 +47,10 @@ static struct ccu_reset r40_resets[] = { [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), [RST_USB_PHY2] = RESET(0x0cc, BIT(2)), + [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), + [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), + [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), + [RST_BUS_MMC3] = RESET(0x2c0, BIT(11)), [RST_BUS_OTG] = RESET(0x2c0, BIT(25)), [RST_BUS_EHCI0] = RESET(0x2c0, BIT(26)), [RST_BUS_EHCI1] = RESET(0x2c0, BIT(27)), From patchwork Sat Jan 19 01:30:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1027853 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hL2y2tSDz9sDB for ; Sat, 19 Jan 2019 12:34:50 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 10FBDC220A6; Sat, 19 Jan 2019 01:33:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 77AC7C2207C; Sat, 19 Jan 2019 01:33:06 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id BB06FC21BE5; Sat, 19 Jan 2019 01:32:51 +0000 (UTC) Received: from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 53FC5C220A5 for ; Sat, 19 Jan 2019 01:32:48 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D9CFA15BE; Fri, 18 Jan 2019 17:32:46 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CBFC63F6A8; Fri, 18 Jan 2019 17:32:44 -0800 (PST) From: Andre Przywara To: Jagan Teki , Maxime Ripard Date: Sat, 19 Jan 2019 01:30:48 +0000 Message-Id: <20190119013055.28023-3-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190119013055.28023-1-andre.przywara@arm.com> References: <20190119013055.28023-1-andre.przywara@arm.com> Cc: Tom Rini , Priit Laes , linux-sunxi@googlegroups.com, u-boot@lists.denx.de, Icenowy Zheng Subject: [U-Boot] [PATCH 2/9] sunxi: clk: A80: add MMC clock support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The A80 handles resets and clock gates for the MMC devices differently, outside of the CCU IP block. Consequently we have a separate clock device with a separate binding for that. Implement that with the respective clock gates and resets to allow the A80 taking part in the DM_MMC game. Signed-off-by: Andre Przywara --- drivers/clk/sunxi/clk_a80.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/clk/sunxi/clk_a80.c b/drivers/clk/sunxi/clk_a80.c index d6dd6a1fa1..2bfc2ca9f5 100644 --- a/drivers/clk/sunxi/clk_a80.c +++ b/drivers/clk/sunxi/clk_a80.c @@ -30,19 +30,45 @@ static const struct ccu_reset a80_resets[] = { [RST_BUS_UART5] = RESET(0x5b4, BIT(21)), }; +static const struct ccu_clk_gate a80_mmc_gates[] = { + [0] = GATE(0x0, BIT(16)), + [1] = GATE(0x4, BIT(16)), + [2] = GATE(0x8, BIT(16)), + [3] = GATE(0xc, BIT(16)), +}; + +static const struct ccu_reset a80_mmc_resets[] = { + [0] = GATE(0x0, BIT(18)), + [1] = GATE(0x4, BIT(18)), + [2] = GATE(0x8, BIT(18)), + [3] = GATE(0xc, BIT(18)), +}; + static const struct ccu_desc a80_ccu_desc = { .gates = a80_gates, .resets = a80_resets, }; +static const struct ccu_desc a80_mmc_clk_desc = { + .gates = a80_mmc_gates, + .resets = a80_mmc_resets, +}; + static int a80_clk_bind(struct udevice *dev) { - return sunxi_reset_bind(dev, ARRAY_SIZE(a80_resets)); + ulong count = ARRAY_SIZE(a80_resets); + + if (device_is_compatible(dev, "allwinner,allwinner,sun9i-a80-mmc")) + count = ARRAY_SIZE(a80_mmc_resets); + + return sunxi_reset_bind(dev, count); } static const struct udevice_id a80_ccu_ids[] = { { .compatible = "allwinner,sun9i-a80-ccu", .data = (ulong)&a80_ccu_desc }, + { .compatible = "allwinner,allwinner,sun9i-a80-mmc", + .data = (ulong)&a80_mmc_clk_desc }, { } }; From patchwork Sat Jan 19 01:30:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1027856 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hL5F75Srz9sDB for ; Sat, 19 Jan 2019 12:36:49 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id A876EC21F41; Sat, 19 Jan 2019 01:34:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 66E99C22078; Sat, 19 Jan 2019 01:33:12 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 46958C220D2; Sat, 19 Jan 2019 01:32:55 +0000 (UTC) Received: from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 9DBAFC22045 for ; Sat, 19 Jan 2019 01:32:50 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 330E115BF; Fri, 18 Jan 2019 17:32:49 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2638B3F6A8; Fri, 18 Jan 2019 17:32:47 -0800 (PST) From: Andre Przywara To: Jagan Teki , Maxime Ripard Date: Sat, 19 Jan 2019 01:30:49 +0000 Message-Id: <20190119013055.28023-4-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190119013055.28023-1-andre.przywara@arm.com> References: <20190119013055.28023-1-andre.przywara@arm.com> Cc: Tom Rini , Priit Laes , linux-sunxi@googlegroups.com, u-boot@lists.denx.de, Icenowy Zheng Subject: [U-Boot] [PATCH 3/9] mmc: sunxi: Add DM clk and reset support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara --- drivers/mmc/sunxi_mmc.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 302332bf97..35cdccdd7f 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -12,6 +12,8 @@ #include #include #include +#include +#include #include #include #include @@ -21,7 +23,6 @@ #ifdef CONFIG_DM_MMC struct sunxi_mmc_variant { - u16 gate_offset; u16 mclk_offset; }; #endif @@ -607,9 +608,11 @@ static int sunxi_mmc_probe(struct udevice *dev) struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct sunxi_mmc_plat *plat = dev_get_platdata(dev); struct sunxi_mmc_priv *priv = dev_get_priv(dev); + struct reset_ctl_bulk reset_bulk; + struct clk gate_clk; struct mmc_config *cfg = &plat->cfg; struct ofnode_phandle_args args; - u32 *gate_reg, *ccu_reg; + u32 *ccu_reg; int bus_width, ret; cfg->name = dev->name; @@ -641,8 +644,14 @@ static int sunxi_mmc_probe(struct udevice *dev) priv->mmc_no = ((uintptr_t)priv->reg - SUNXI_MMC0_BASE) / 0x1000; priv->mclkreg = (void *)ccu_reg + (priv->variant->mclk_offset + (priv->mmc_no * 4)); - gate_reg = (void *)ccu_reg + priv->variant->gate_offset; - setbits_le32(gate_reg, BIT(AHB_GATE_OFFSET_MMC(priv->mmc_no))); + + ret = clk_get_by_name(dev, "ahb", &gate_clk); + if (!ret) + clk_enable(&gate_clk); + + ret = reset_get_bulk(dev, &reset_bulk); + if (!ret) + reset_deassert_bulk(&reset_bulk); ret = mmc_set_mod_clk(priv, 24000000); if (ret) @@ -676,7 +685,6 @@ static int sunxi_mmc_bind(struct udevice *dev) } static const struct sunxi_mmc_variant sun4i_a10_variant = { - .gate_offset = 0x60, .mclk_offset = 0x88, }; From patchwork Sat Jan 19 01:30:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1027855 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hL4Z0SF4z9sDB for ; Sat, 19 Jan 2019 12:36:14 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id C920FC22072; Sat, 19 Jan 2019 01:34:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4DD28C220A2; Sat, 19 Jan 2019 01:33:15 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 5BE80C21BE5; Sat, 19 Jan 2019 01:32:56 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 67EE4C22072 for ; Sat, 19 Jan 2019 01:32:52 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 79BDEA78; Fri, 18 Jan 2019 17:32:51 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 70C5A3F6A8; Fri, 18 Jan 2019 17:32:49 -0800 (PST) From: Andre Przywara To: Jagan Teki , Maxime Ripard Date: Sat, 19 Jan 2019 01:30:50 +0000 Message-Id: <20190119013055.28023-5-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190119013055.28023-1-andre.przywara@arm.com> References: <20190119013055.28023-1-andre.przywara@arm.com> Cc: Tom Rini , Priit Laes , linux-sunxi@googlegroups.com, u-boot@lists.denx.de, Icenowy Zheng Subject: [U-Boot] [PATCH 4/9] mmc: sunxi: Add H6 support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Even though the H6 MMC device is fully compatible to the A64 implementation, we need to differentiate between the two, as the mod clock is on a different address, and we don't use the DT for that yet. Add a separate "variant" which just holds the different MMIO address. Signed-off-by: Andre Przywara --- drivers/mmc/sunxi_mmc.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 35cdccdd7f..16646012bc 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -688,6 +688,10 @@ static const struct sunxi_mmc_variant sun4i_a10_variant = { .mclk_offset = 0x88, }; +static const struct sunxi_mmc_variant sun50i_h6_variant = { + .mclk_offset = 0x830, +}; + static const struct udevice_id sunxi_mmc_ids[] = { { .compatible = "allwinner,sun4i-a10-mmc", @@ -701,6 +705,14 @@ static const struct udevice_id sunxi_mmc_ids[] = { .compatible = "allwinner,sun7i-a20-mmc", .data = (ulong)&sun4i_a10_variant, }, + { + .compatible = "allwinner,sun50i-h6-mmc", + .data = (ulong)&sun50i_h6_variant, + }, + { + .compatible = "allwinner,sun50i-h6-emmc", + .data = (ulong)&sun50i_h6_variant, + }, { /* sentinel */ } }; From patchwork Sat Jan 19 01:30:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1027852 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hL2S6Zy1z9sDB for ; Sat, 19 Jan 2019 12:34:24 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 7F48DC21E73; Sat, 19 Jan 2019 01:33:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id ADA1AC21C27; Sat, 19 Jan 2019 01:33:05 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 7BD76C21BE5; Sat, 19 Jan 2019 01:32:58 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 8A1DBC21E96 for ; Sat, 19 Jan 2019 01:32:54 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C47EBA78; Fri, 18 Jan 2019 17:32:53 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BA3BB3F6A8; Fri, 18 Jan 2019 17:32:51 -0800 (PST) From: Andre Przywara To: Jagan Teki , Maxime Ripard Date: Sat, 19 Jan 2019 01:30:51 +0000 Message-Id: <20190119013055.28023-6-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190119013055.28023-1-andre.przywara@arm.com> References: <20190119013055.28023-1-andre.przywara@arm.com> Cc: Tom Rini , Priit Laes , linux-sunxi@googlegroups.com, u-boot@lists.denx.de, Icenowy Zheng Subject: [U-Boot] [PATCH 5/9] mmc: sunxi: Add missing compatible strings X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jagan Teki From our driver's perspective there is no difference between the MMC controllers for the A83T, A64 and H5 compared to the A10/A20 type. As we now have support for the formerly missing reset gates, we can add their compatible strings, to make those SoCs work with DM_MMC. Signed-off-by: Jagan Teki Signed-off-by: Andre Przywara --- drivers/mmc/sunxi_mmc.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 16646012bc..62b658c435 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -705,6 +705,18 @@ static const struct udevice_id sunxi_mmc_ids[] = { .compatible = "allwinner,sun7i-a20-mmc", .data = (ulong)&sun4i_a10_variant, }, + { + .compatible = "allwinner,sun8i-a83t-emmc", + .data = (ulong)&sun4i_a10_variant, + }, + { + .compatible = "allwinner,sun50i-a64-mmc", + .data = (ulong)&sun4i_a10_variant, + }, + { + .compatible = "allwinner,sun50i-a64-emmc", + .data = (ulong)&sun4i_a10_variant, + }, { .compatible = "allwinner,sun50i-h6-mmc", .data = (ulong)&sun50i_h6_variant, From patchwork Sat Jan 19 01:30:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1027859 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hL7R0kz5z9sDB for ; Sat, 19 Jan 2019 12:38:43 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id AE951C21E74; Sat, 19 Jan 2019 01:34:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 75D2EC21EC2; Sat, 19 Jan 2019 01:33:36 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3AFEEC21FD0; Sat, 19 Jan 2019 01:33:00 +0000 (UTC) Received: from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 2F6F3C22072 for ; Sat, 19 Jan 2019 01:32:57 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1B95CA78; Fri, 18 Jan 2019 17:32:56 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 108D23F6A8; Fri, 18 Jan 2019 17:32:53 -0800 (PST) From: Andre Przywara To: Jagan Teki , Maxime Ripard Date: Sat, 19 Jan 2019 01:30:52 +0000 Message-Id: <20190119013055.28023-7-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190119013055.28023-1-andre.przywara@arm.com> References: <20190119013055.28023-1-andre.przywara@arm.com> Cc: Tom Rini , Priit Laes , linux-sunxi@googlegroups.com, u-boot@lists.denx.de, Icenowy Zheng Subject: [U-Boot] [PATCH 6/9] mmc: sunxi: Add A80 support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add the Allwinner A80 mod clock address and bind it to its compatible string. The special config clock is handled via the clock driver. Signed-off-by: Andre Przywara --- drivers/mmc/sunxi_mmc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 62b658c435..87424c23dc 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -692,6 +692,10 @@ static const struct sunxi_mmc_variant sun50i_h6_variant = { .mclk_offset = 0x830, }; +static const struct sunxi_mmc_variant sun9i_a80_variant = { + .mclk_offset = 0x410, +}; + static const struct udevice_id sunxi_mmc_ids[] = { { .compatible = "allwinner,sun4i-a10-mmc", @@ -709,6 +713,10 @@ static const struct udevice_id sunxi_mmc_ids[] = { .compatible = "allwinner,sun8i-a83t-emmc", .data = (ulong)&sun4i_a10_variant, }, + { + .compatible = "allwinner,sun9i-a80-mmc", + .data = (ulong)&sun9i_a80_variant, + }, { .compatible = "allwinner,sun50i-a64-mmc", .data = (ulong)&sun4i_a10_variant, From patchwork Sat Jan 19 01:30:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1027858 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hL6r40tGz9sDB for ; Sat, 19 Jan 2019 12:38:12 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 3D252C21C27; Sat, 19 Jan 2019 01:34:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A23F4C220A0; Sat, 19 Jan 2019 01:33:43 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0625CC22072; Sat, 19 Jan 2019 01:33:02 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 54409C220BD for ; Sat, 19 Jan 2019 01:32:59 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 65A8DA78; Fri, 18 Jan 2019 17:32:58 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5BEFC3F6A8; Fri, 18 Jan 2019 17:32:56 -0800 (PST) From: Andre Przywara To: Jagan Teki , Maxime Ripard Date: Sat, 19 Jan 2019 01:30:53 +0000 Message-Id: <20190119013055.28023-8-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190119013055.28023-1-andre.przywara@arm.com> References: <20190119013055.28023-1-andre.przywara@arm.com> Cc: Tom Rini , Priit Laes , linux-sunxi@googlegroups.com, u-boot@lists.denx.de, Icenowy Zheng Subject: [U-Boot] [PATCH 7/9] mmc: sunxi: Honour non-removable property in DT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara --- drivers/mmc/sunxi_mmc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 87424c23dc..374775194d 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -658,7 +658,8 @@ static int sunxi_mmc_probe(struct udevice *dev) return ret; /* This GPIO is optional */ - if (!gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, + if (!dev_read_bool(dev, "non-removable") && + !gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN)) { int cd_pin = gpio_get_number(&priv->cd_gpio); From patchwork Sat Jan 19 01:30:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1027857 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hL6N0r5vz9sDL for ; Sat, 19 Jan 2019 12:37:48 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id B7553C22078; Sat, 19 Jan 2019 01:35:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 08600C22072; Sat, 19 Jan 2019 01:33:55 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id CB41DC21E73; Sat, 19 Jan 2019 01:33:06 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 52EFBC21E7D for ; Sat, 19 Jan 2019 01:33:01 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B384815AB; Fri, 18 Jan 2019 17:33:00 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A664D3F6A8; Fri, 18 Jan 2019 17:32:58 -0800 (PST) From: Andre Przywara To: Jagan Teki , Maxime Ripard Date: Sat, 19 Jan 2019 01:30:54 +0000 Message-Id: <20190119013055.28023-9-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190119013055.28023-1-andre.przywara@arm.com> References: <20190119013055.28023-1-andre.przywara@arm.com> Cc: Tom Rini , Priit Laes , linux-sunxi@googlegroups.com, u-boot@lists.denx.de, Icenowy Zheng Subject: [U-Boot] [PATCH 8/9] arm: sunxi: Enable DM_MMC X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jagan Teki Enable DM_MMC for all Allwinner SoCs, this will eventually enable BLK. Also removed DM_MMC enablement in few parts of sunxi configurations. Signed-off-by: Jagan Teki Signed-off-by: Andre Przywara Reviewed-by: Simon Glass --- arch/arm/Kconfig | 1 + arch/arm/mach-sunxi/Kconfig | 1 - configs/Linksprite_pcDuino3_defconfig | 1 - 3 files changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a23cbd5719..075c3dfe81 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -851,6 +851,7 @@ config ARCH_SUNXI select DM_ETH select DM_GPIO select DM_KEYBOARD + select DM_MMC if MMC select DM_SERIAL select DM_USB if DISTRO_DEFAULTS select OF_BOARD_SETUP diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 3c54f5106d..74e234cded 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -154,7 +154,6 @@ config MACH_SUN4I bool "sun4i (Allwinner A10)" select CPU_V7A select ARM_CORTEX_CPU_IS_UP - select DM_MMC if MMC select DM_SCSI if SCSI select PHY_SUN4I_USB select DRAM_SUN4I diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index 9156f132d1..18f658e96b 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3" CONFIG_SCSI_AHCI=y -CONFIG_DM_MMC=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y From patchwork Sat Jan 19 01:30:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1027854 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43hL481G1Wz9sDB for ; Sat, 19 Jan 2019 12:35:51 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id A1782C220A6; Sat, 19 Jan 2019 01:35:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C60FAC220BB; Sat, 19 Jan 2019 01:33:52 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 68055C22072; Sat, 19 Jan 2019 01:33:09 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id CA683C21EA1 for ; Sat, 19 Jan 2019 01:33:03 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 101D415AB; Fri, 18 Jan 2019 17:33:03 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F3CDB3F6A8; Fri, 18 Jan 2019 17:33:00 -0800 (PST) From: Andre Przywara To: Jagan Teki , Maxime Ripard Date: Sat, 19 Jan 2019 01:30:55 +0000 Message-Id: <20190119013055.28023-10-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190119013055.28023-1-andre.przywara@arm.com> References: <20190119013055.28023-1-andre.przywara@arm.com> Cc: Tom Rini , Priit Laes , linux-sunxi@googlegroups.com, u-boot@lists.denx.de, Icenowy Zheng Subject: [U-Boot] [PATCH 9/9] mmc: sunxi: Mark end of DM_MMC #ifdefs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The Allwinner MMC supports both the legacy approach and the driver model, at the cost of quite some #ifdefs. Mark the closing #endifs with their respective config symbol, to make it more obvious where each part ends and begins. Signed-off-by: Andre Przywara Reviewed-by: Simon Glass --- drivers/mmc/sunxi_mmc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 374775194d..ee0bc9da89 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -104,7 +104,7 @@ static int mmc_resource_init(int sdc_no) return ret; } -#endif +#endif /* !DM_MMC */ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz) { @@ -566,7 +566,7 @@ struct mmc *sunxi_mmc_init(int sdc_no) return mmc_create(cfg, priv); } -#else +#else /* DM_MMC */ static int sunxi_mmc_set_ios(struct udevice *dev) { @@ -747,4 +747,4 @@ U_BOOT_DRIVER(sunxi_mmc_drv) = { .platdata_auto_alloc_size = sizeof(struct sunxi_mmc_plat), .priv_auto_alloc_size = sizeof(struct sunxi_mmc_priv), }; -#endif +#endif /* DM_MMC */