From patchwork Thu Dec 6 14:02:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 1008816 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 439cjZ1rYWz9s3C for ; Fri, 7 Dec 2018 01:02:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727737AbeLFOCI (ORCPT ); Thu, 6 Dec 2018 09:02:08 -0500 Received: from mail.bootlin.com ([62.4.15.54]:41904 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727943AbeLFOCI (ORCPT ); Thu, 6 Dec 2018 09:02:08 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id D904920784; Thu, 6 Dec 2018 15:02:05 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=0.5 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_RHS_DOB shortcircuit=ham autolearn=disabled version=3.4.2 Received: from localhost (aaubervilliers-681-1-79-44.w90-88.abo.wanadoo.fr [90.88.21.44]) by mail.bootlin.com (Postfix) with ESMTPSA id A6EB120745; Thu, 6 Dec 2018 15:02:05 +0100 (CET) From: Maxime Ripard To: Chen-Yu Tsai , Maxime Ripard , Linus Walleij Cc: Thomas Petazzoni , Mylene Josserand , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org Subject: [PATCH 1/2] pinctrl: sunxi: Deal with per-bank regulators Date: Thu, 6 Dec 2018 15:02:03 +0100 Message-Id: <3401ca7517927243f567899819e0d02eee12984f.1544104801.git-series.maxime.ripard@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The Allwinner SoCs have on most of their GPIO banks a regulator input. This issue was mainly ignored so far because either the regulator was a static regulator that would be providing power anyway, or the bank was used for a feature unsupported so far (CSI). For the odd cases, enabling it in the bootloader was the preferred option. However, now that we are starting to support those features, and that we can't really rely on the bootloader for this, we need to model those regulators as such in the DT. This is slightly more complicated than what it looks like, since some regulators will be tied to the PMIC, and in order to have access to the PMIC bus, you need to mux its pins, which will need the pinctrl driver, that needs the regulator driver to be registered. And this is how you get a circular dependency. In practice however, the hardware cannot fall into this case since it would result in a completely unusable bus. In order to avoid that circular dependency, we can thus get and enable the regulators at pin_request time. We'll then need to account for the references of all the pins of a particular branch to know when to put the reference, but it works pretty nicely once implemented. Signed-off-by: Maxime Ripard --- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 63 ++++++++++++++++++++++++++++- drivers/pinctrl/sunxi/pinctrl-sunxi.h | 6 +++- 2 files changed, 69 insertions(+) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index 34e17376ef99..5d9184d18c16 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -693,12 +694,74 @@ sunxi_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, return 0; } +static int sunxi_pmx_request(struct pinctrl_dev *pctldev, unsigned offset) +{ + struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); + unsigned short bank = offset / PINS_PER_BANK; + struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank]; + struct regulator *reg; + int ret; + + reg = s_reg->regulator; + if (!reg) { + char supply[16]; + + snprintf(supply, sizeof(supply), "vcc-p%c", 'a' + bank); + reg = regulator_get(pctl->dev, supply); + if (IS_ERR(reg)) { + dev_err(pctl->dev, "Couldn't get bank P%c regulator\n", + 'A' + bank); + return PTR_ERR(reg); + } + + s_reg->regulator = reg; + refcount_set(&s_reg->refcount, 1); + } else { + refcount_inc(&s_reg->refcount); + } + + ret = regulator_enable(reg); + if (ret) { + dev_err(pctl->dev, + "Couldn't enable bank P%c regulator\n", 'A' + bank); + goto out; + } + + return 0; + +out: + if (refcount_dec_and_test(&s_reg->refcount)) { + regulator_put(s_reg->regulator); + s_reg->regulator = NULL; + } + + return ret; +} + +static int sunxi_pmx_free(struct pinctrl_dev *pctldev, unsigned offset) +{ + struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); + unsigned short bank = offset / PINS_PER_BANK; + struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank]; + + if (!refcount_dec_and_test(&s_reg->refcount)) + return 0; + + regulator_disable(s_reg->regulator); + regulator_put(s_reg->regulator); + s_reg->regulator = NULL; + + return 0; +} + static const struct pinmux_ops sunxi_pmx_ops = { .get_functions_count = sunxi_pmx_get_funcs_cnt, .get_function_name = sunxi_pmx_get_func_name, .get_function_groups = sunxi_pmx_get_func_groups, .set_mux = sunxi_pmx_set_mux, .gpio_set_direction = sunxi_pmx_gpio_set_direction, + .request = sunxi_pmx_request, + .free = sunxi_pmx_free, .strict = true, }; diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h index 4a892e7dde66..e340d2a24b44 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h @@ -126,11 +126,17 @@ struct sunxi_pinctrl_group { unsigned pin; }; +struct sunxi_pinctrl_regulator { + struct regulator *regulator; + refcount_t refcount; +}; + struct sunxi_pinctrl { void __iomem *membase; struct gpio_chip *chip; const struct sunxi_pinctrl_desc *desc; struct device *dev; + struct sunxi_pinctrl_regulator regulators[12]; struct irq_domain *domain; struct sunxi_pinctrl_function *functions; unsigned nfunctions; From patchwork Thu Dec 6 14:02:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 1008815 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 439cjY3Vdfz9s47 for ; Fri, 7 Dec 2018 01:02:09 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727704AbeLFOCI (ORCPT ); Thu, 6 Dec 2018 09:02:08 -0500 Received: from mail.bootlin.com ([62.4.15.54]:41911 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728209AbeLFOCI (ORCPT ); Thu, 6 Dec 2018 09:02:08 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 29E5220C4D; Thu, 6 Dec 2018 15:02:06 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=0.5 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED,URIBL_RHS_DOB shortcircuit=ham autolearn=disabled version=3.4.2 Received: from localhost (aaubervilliers-681-1-79-44.w90-88.abo.wanadoo.fr [90.88.21.44]) by mail.bootlin.com (Postfix) with ESMTPSA id 0234F20745; Thu, 6 Dec 2018 15:02:05 +0100 (CET) From: Maxime Ripard To: Chen-Yu Tsai , Maxime Ripard , Linus Walleij Cc: Thomas Petazzoni , Mylene Josserand , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org Subject: [PATCH 2/2] ARM: dts: sun7i: bananapi: Add GPIO banks regulators Date: Thu, 6 Dec 2018 15:02:04 +0100 Message-Id: X-Mailer: git-send-email 2.19.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The bananapi has all its bank regulators tied to the 3v3 static regulator. Make sure it's properly represented. Signed-off-by: Maxime Ripard Acked-by: Linus Walleij --- arch/arm/boot/dts/sun7i-a20-bananapi.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts index 70dfc4ac0bb5..cd8157c125eb 100644 --- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts +++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts @@ -201,6 +201,11 @@ }; &pio { + vcc-pa-supply = <®_vcc3v3>; + vcc-pc-supply = <®_vcc3v3>; + vcc-pe-supply = <®_vcc3v3>; + vcc-pf-supply = <®_vcc3v3>; + vcc-pg-supply = <®_vcc3v3>; gpio-line-names = /* PA */ "ERXD3", "ERXD2", "ERXD1", "ERXD0", "ETXD3",