From patchwork Tue Nov 27 06:21:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1003619 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 433twY1ftyz9s3Z for ; Tue, 27 Nov 2018 17:21:49 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="IIiZ95RB"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 433twX5V5JzDqcf for ; Tue, 27 Nov 2018 17:21:48 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="IIiZ95RB"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::542; helo=mail-pg1-x542.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="IIiZ95RB"; dkim-atps=neutral Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 433twP26fkzDqcR for ; Tue, 27 Nov 2018 17:21:40 +1100 (AEDT) Received: by mail-pg1-x542.google.com with SMTP id w7so7351931pgp.13 for ; Mon, 26 Nov 2018 22:21:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=UHB+ygDmhElbXnchsxlnsG4gqRyRhy/Z1BmCDfgBsko=; b=IIiZ95RBqSpq8x1AhemcJp1Srvp7DycyAApDlZy0G28Sjy4kAuncpML6RGqlSIkUSx 0Ch79RRZqgJw30abEgfyKkGKCKYVA2QIVCisLkLrfp5b4tzV0R5hctXImpV2nHgffpbc wsSJxznG4InxUS2AYwbxGZEzHeSe5xvs1if9UKnT2U/unUSp0ZRIigi7/RojRcQT251s pLoQv6rlR0OryrzLQm15JBzImvyCbQFHmniiJfnsyA8u/hSwmmEXtVU44E29Z6OXEpHF 5RfrSXYib9nWvuZzjqaF/IwZ8vy1StJVyVtSFXyG+KavY843FveWnDOxTRi0vyh6nYLm ADvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=UHB+ygDmhElbXnchsxlnsG4gqRyRhy/Z1BmCDfgBsko=; b=SP3dTx1y6yusHRyomBd5sZmKvwJGC0wi4mlH9ZcDCi/Iny+VHYzkWfPckTqK7htVhK Wp6rgAdz+mIDIVa0eBQRv703D5601J0dFpR5FfPuE2AZ6G1xkVEsNPbSJNiLo7RuJUgA 0Ew7vKRL211TqFjtX8l6yysaZ5xJCopg4jSB38nf5LM19IAnPU+pKq7gHHTZsCZtE2vJ byBWjWeGm05mObTB/c4dqk9/m7QUe31YWM1poaemqBNveLVEB40bt8FWYVPW2zicwlPv E1DCU+HcOrOPXX0OHFum1U+omu9uhmnX+jC3dSCZvJzD+NDvHdMmU9a+D8Od0wbmcUqL 6Mug== X-Gm-Message-State: AGRZ1gIXUEV73ETDiGutPK/eSCe1KIdT/veVsDE2JztqaAgpFiy5OVDP XjLwYwKEk1ZsD5G/Kq3QEAxmTn5x X-Google-Smtp-Source: AJdET5dlu8ifEMySjkmrkZfIpCVAVC70w/02iVPTrrhNdnE6X7GFC90L/qNrUoHv7sJUleQ488jpVQ== X-Received: by 2002:a62:ce0e:: with SMTP id y14mr32745663pfg.100.1543299698917; Mon, 26 Nov 2018 22:21:38 -0800 (PST) Received: from wafer.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id r83sm4371741pfc.115.2018.11.26.22.21.37 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Nov 2018 22:21:38 -0800 (PST) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 27 Nov 2018 17:21:16 +1100 Message-Id: <20181127062119.15775-1-oohall@gmail.com> X-Mailer: git-send-email 2.17.2 Subject: [Skiboot] [PATCH 1/4] phb4: Rework BDFN filtering in phb4_set_pe() X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" General cleanup. For a function that does nothing more than a mask-and-compare the current implementation is way more convoluted than it has any right to be. Signed-off-by: Oliver O'Halloran Reviewed-by: Andrew Donnellan --- hw/phb4.c | 58 ++++++++++++++++--------------------------------------- 1 file changed, 17 insertions(+), 41 deletions(-) diff --git a/hw/phb4.c b/hw/phb4.c index c0797647c124..b26f57277f04 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -2164,8 +2164,7 @@ static int64_t phb4_set_pe(struct phb *phb, uint8_t action) { struct phb4 *p = phb_to_phb4(phb); - uint64_t mask, val, tmp, idx; - int32_t all = 0; + uint64_t mask, idx; uint16_t *rte; /* Sanity check */ @@ -2179,55 +2178,32 @@ static int64_t phb4_set_pe(struct phb *phb, fcompare > OPAL_COMPARE_RID_FUNCTION_NUMBER) return OPAL_PARAMETER; + /* match everything by default */ + mask = 0; + /* Figure out the RID range */ - if (bcompare == OpalPciBusAny) { - mask = 0x0; - val = 0x0; - all = 0x1; - } else { - tmp = ((0x1 << (bcompare + 1)) - 1) << (15 - bcompare); - mask = tmp; - val = bdfn & tmp; - } + if (bcompare != OpalPciBusAny) + mask = ((0x1 << (bcompare + 1)) - 1) << (15 - bcompare); - if (dcompare == OPAL_IGNORE_RID_DEVICE_NUMBER) - all = (all << 1) | 0x1; - else { + if (dcompare == OPAL_COMPARE_RID_DEVICE_NUMBER) mask |= 0xf8; - val |= (bdfn & 0xf8); - } - if (fcompare == OPAL_IGNORE_RID_FUNCTION_NUMBER) - all = (all << 1) | 0x1; - else { + if (fcompare == OPAL_COMPARE_RID_FUNCTION_NUMBER) mask |= 0x7; - val |= (bdfn & 0x7); - } + + if (action == OPAL_UNMAP_PE) + pe_number = PHB4_RESERVED_PE_NUM(p); /* Map or unmap the RTT range */ - if (all == 0x7) { - if (action == OPAL_MAP_PE) { - for (idx = 0; idx < RTT_TABLE_ENTRIES; idx++) - p->rte_cache[idx] = pe_number; - } else { - for (idx = 0; idx < ARRAY_SIZE(p->rte_cache); idx++) - p->rte_cache[idx] = PHB4_RESERVED_PE_NUM(p); - } - memcpy((void *)p->tbl_rtt, p->rte_cache, RTT_TABLE_SIZE); - } else { - rte = (uint16_t *)p->tbl_rtt; - for (idx = 0; idx < RTT_TABLE_ENTRIES; idx++, rte++) { - if ((idx & mask) != val) - continue; - if (action == OPAL_MAP_PE) - p->rte_cache[idx] = pe_number; - else - p->rte_cache[idx] = PHB4_RESERVED_PE_NUM(p); - *rte = p->rte_cache[idx]; + rte = (uint16_t *)p->tbl_rtt; + for (idx = 0; idx < RTT_TABLE_ENTRIES; idx++) { + if ((idx & mask) == (bdfn & mask)) { + p->rte_cache[idx] = pe_number; + rte[idx] = pe_number; } } - /* Invalidate the entire RTC */ + /* Invalidate the RID Translation Cache (RTC) inside the PHB */ out_be64(p->regs + PHB_RTC_INVALIDATE, PHB_RTC_INVALIDATE_ALL); return OPAL_SUCCESS; From patchwork Tue Nov 27 06:21:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1003620 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 433tx82ntqz9s29 for ; Tue, 27 Nov 2018 17:22:20 +1100 (AEDT) Authentication-Results: ozlabs.org; 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Mon, 26 Nov 2018 22:21:40 -0800 (PST) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 27 Nov 2018 17:21:17 +1100 Message-Id: <20181127062119.15775-2-oohall@gmail.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181127062119.15775-1-oohall@gmail.com> References: <20181127062119.15775-1-oohall@gmail.com> Subject: [Skiboot] [PATCH 2/4] phb4: Remove pointless NULL checks X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" When we allocate the various in-memory tables we assert() on the allocation. There's no point in checking if the table pointer is NULL or not at runtime. Signed-off-by: Oliver O'Halloran Reviewed-by: Andrew Donnellan --- hw/phb4.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/hw/phb4.c b/hw/phb4.c index b26f57277f04..bb03e413a76b 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -1165,10 +1165,8 @@ static int64_t phb4_ioda_reset(struct phb *phb, bool purge) /* Additional OPAL specific inits */ /* Clear RTT and PELTV and PEST */ - if (p->tbl_rtt) - memcpy((void *)p->tbl_rtt, p->rte_cache, RTT_TABLE_SIZE); - if (p->tbl_peltv) - memcpy((void *)p->tbl_peltv, p->peltv_cache, p->tbl_peltv_size); + memcpy((void *)p->tbl_rtt, p->rte_cache, RTT_TABLE_SIZE); + memcpy((void *)p->tbl_peltv, p->peltv_cache, p->tbl_peltv_size); /* Clear PEST & PEEV */ for (i = 0; i < p->max_num_pes; i++) { @@ -2168,8 +2166,6 @@ static int64_t phb4_set_pe(struct phb *phb, uint16_t *rte; /* Sanity check */ - if (!p->tbl_rtt) - return OPAL_HARDWARE; if (action != OPAL_MAP_PE && action != OPAL_UNMAP_PE) return OPAL_PARAMETER; if (pe_number >= p->num_pes || bdfn > 0xffff || @@ -2219,8 +2215,6 @@ static int64_t phb4_set_peltv(struct phb *phb, uint32_t idx, mask; /* Sanity check */ - if (!p->tbl_peltv) - return OPAL_HARDWARE; if (parent_pe >= p->num_pes || child_pe >= p->num_pes) return OPAL_PARAMETER; @@ -3723,10 +3717,6 @@ static int64_t phb4_err_inject(struct phb *phb, uint64_t pe_number, uint64_t addr, uint64_t mask, bool is_write); bool is_write; - /* How could we get here without valid RTT? */ - if (!p->tbl_rtt) - return OPAL_HARDWARE; - /* We can't inject error to the reserved PE */ if (pe_number == PHB4_RESERVED_PE_NUM(p) || pe_number >= p->num_pes) return OPAL_PARAMETER; From patchwork Tue Nov 27 06:21:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1003621 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 433txY72Tgz9s29 for ; Tue, 27 Nov 2018 17:22:41 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="I2yZjV8m"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 433txY5KGXzDqcV for ; Tue, 27 Nov 2018 17:22:41 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="I2yZjV8m"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::542; helo=mail-pg1-x542.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="I2yZjV8m"; dkim-atps=neutral Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 433twS3STCzDqcR for ; Tue, 27 Nov 2018 17:21:44 +1100 (AEDT) Received: by mail-pg1-x542.google.com with SMTP id 70so7361457pgh.8 for ; Mon, 26 Nov 2018 22:21:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=PSupC4sMZ5hm8UcjRKjBkXA3AQaRJfB+hnI0mqFCFGU=; b=I2yZjV8m+VkdaYHBvgeJ2YTByfB7KJnQxGT5ycQ7d0axB63CKbZI2WWmUb4iF8iqrl CuX5Vv66ZTM8OmeIYGpAgblpPOiBjOpXBmq9RTVN6DI5wuRyi4Ls6Eh/yqmykxEp+hYb UGnYx2O2iNFrJbA1CcrwjYErESqHoJgrcl+AU99YMIeWZDbqNDIJCj1SS+rmdKWz8c9k BQu7LVVToywyx9ON9/Yc129inMWiipFuDFlDp0pUJSuB2986s9y6/IqNAUU8ntADEx2I ak8D+Bu+v1X0hI2E3RqTyda18u/A8HoDD+TOkdWGVMsWF25V3zKuV9UCeIi+41Kworna +rIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=PSupC4sMZ5hm8UcjRKjBkXA3AQaRJfB+hnI0mqFCFGU=; b=ZFqwYQl5wQ17IymTkKQHSpZWda7FFssP1leRVe5OPdjT5y0QYwucFjgdNFY5U4u3pM Lr1C+ikmz0fi4MkWWNzbvUH3gsAMtwqCvoKr8GHa/3uhJ0DPYmoqHgTQxDocX/pPdATV bvDdmmWZ0AOHgZw7oS+j/T0TL2HvSs+DZqW0WIgQ9myLim74ZfVLkcLnEdlDhUjqmrE2 Vu2Sb1DGTsXjoldNGRuHF5OAir2U1FhWoTalWQrs41Rx60Bal3wICVFijtzDpTKrCNse GImTjMn/f7FgYOKarNZz3U7EsEaSZC1gPZduQhskTYzlMv32orFVALiU0qrhFYQnXwqt 6N8A== X-Gm-Message-State: AGRZ1gKWMYf1jisEWW/uO+UTMzQxV15txkiwMI4p7zSw+9qSXBjrUu4/ dzJRc0UVow2ak4754cPb4PdGntvl X-Google-Smtp-Source: AJdET5dPtv+bOiZ4dMMNAzLC/ArJXqG+MV+8Iox0FXQBVuAL94mRnBHXK6QzLoSYFeDlOl1vt1hLZA== X-Received: by 2002:aa7:868f:: with SMTP id d15mr31142916pfo.225.1543299702639; Mon, 26 Nov 2018 22:21:42 -0800 (PST) Received: from wafer.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id r83sm4371741pfc.115.2018.11.26.22.21.41 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Nov 2018 22:21:42 -0800 (PST) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 27 Nov 2018 17:21:18 +1100 Message-Id: <20181127062119.15775-3-oohall@gmail.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181127062119.15775-1-oohall@gmail.com> References: <20181127062119.15775-1-oohall@gmail.com> Subject: [Skiboot] [PATCH 3/4] phb4: Eliminate p->rte_cache X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" In ancient times we added a caches to struct phb3 for some of the IODA tables which can only be accessed in-directly via XSCOM. A cache for the Requester Translation Table (RTT) was also added even though this is an in-memory table. This was carried over to PHB4 when Ben did the initial copy and paste, but it's still largely pointless. There's no real need to have a second copy of the table. This patch removes the "cache" and changes all the users to reference the RTT directly if we need to. This reduces the size of the struct phb4 by 128KB. Signed-off-by: Oliver O'Halloran Reviewed-by: Andrew Donnellan --- hw/phb4.c | 36 +++++++++++++++--------------------- include/phb4.h | 3 +-- 2 files changed, 16 insertions(+), 23 deletions(-) diff --git a/hw/phb4.c b/hw/phb4.c index bb03e413a76b..14fa94b50f75 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -277,7 +277,7 @@ static int64_t phb4_pcicfg_check(struct phb4 *p, uint32_t bdfn, return OPAL_HARDWARE; /* Fetch the PE# from cache */ - *pe = p->rte_cache[bdfn]; + *pe = p->tbl_rtt[bdfn]; return OPAL_SUCCESS; } @@ -934,8 +934,6 @@ static void phb4_init_ioda_cache(struct phb4 *p) * ever let a live FF RTT even temporarily when resetting * for EEH etc... (HW278969). */ - for (i = 0; i < ARRAY_SIZE(p->rte_cache); i++) - p->rte_cache[i] = PHB4_RESERVED_PE_NUM(p); memset(p->peltv_cache, 0x0, sizeof(p->peltv_cache)); memset(p->tve_cache, 0x0, sizeof(p->tve_cache)); @@ -1165,7 +1163,9 @@ static int64_t phb4_ioda_reset(struct phb *phb, bool purge) /* Additional OPAL specific inits */ /* Clear RTT and PELTV and PEST */ - memcpy((void *)p->tbl_rtt, p->rte_cache, RTT_TABLE_SIZE); + for (i = 0; i < RTT_TABLE_ENTRIES; i++) + p->tbl_rtt[i] = PHB4_RESERVED_PE_NUM(p); + memcpy((void *)p->tbl_peltv, p->peltv_cache, p->tbl_peltv_size); /* Clear PEST & PEEV */ @@ -2163,7 +2163,6 @@ static int64_t phb4_set_pe(struct phb *phb, { struct phb4 *p = phb_to_phb4(phb); uint64_t mask, idx; - uint16_t *rte; /* Sanity check */ if (action != OPAL_MAP_PE && action != OPAL_UNMAP_PE) @@ -2191,13 +2190,9 @@ static int64_t phb4_set_pe(struct phb *phb, pe_number = PHB4_RESERVED_PE_NUM(p); /* Map or unmap the RTT range */ - rte = (uint16_t *)p->tbl_rtt; - for (idx = 0; idx < RTT_TABLE_ENTRIES; idx++) { - if ((idx & mask) == (bdfn & mask)) { - p->rte_cache[idx] = pe_number; - rte[idx] = pe_number; - } - } + for (idx = 0; idx < RTT_TABLE_ENTRIES; idx++) + if ((idx & mask) == (bdfn & mask)) + p->tbl_rtt[idx] = pe_number; /* Invalidate the RID Translation Cache (RTC) inside the PHB */ out_be64(p->regs + PHB_RTC_INVALIDATE, PHB_RTC_INVALIDATE_ALL); @@ -3636,13 +3631,13 @@ static int64_t phb4_err_inject_cfg(struct phb4 *phb, uint64_t pe_number, ctrl = PHB_PAPR_ERR_INJ_CTL_CFG; for (bdfn = 0; bdfn < RTT_TABLE_ENTRIES; bdfn++) { - if (phb->rte_cache[bdfn] != pe_number) + if (phb->tbl_rtt[bdfn] != pe_number) continue; /* The PE can be associated with PCI bus or device */ is_bus_pe = false; if ((bdfn + 8) < RTT_TABLE_ENTRIES && - phb->rte_cache[bdfn + 8] == pe_number) + phb->tbl_rtt[bdfn + 8] == pe_number) is_bus_pe = true; /* Figure out the PCI config address */ @@ -4598,7 +4593,7 @@ static void phb4_init_ioda3(struct phb4 *p) SETFIELD(PHB_LSI_SRC_ID, 0ull, (p->num_irqs - 1) >> 3)); /* Init_20 - RTT BAR */ - out_be64(p->regs + PHB_RTT_BAR, p->tbl_rtt | PHB_RTT_BAR_ENABLE); + out_be64(p->regs + PHB_RTT_BAR, (u64) p->tbl_rtt | PHB_RTT_BAR_ENABLE); /* Init_21 - PELT-V BAR */ out_be64(p->regs + PHB_PELTV_BAR, p->tbl_peltv | PHB_PELTV_BAR_ENABLE); @@ -5113,7 +5108,6 @@ static bool phb4_read_capabilities(struct phb4 *p) static void phb4_allocate_tables(struct phb4 *p) { - uint16_t *rte; uint32_t i; /* XXX Our current memalign implementation sucks, @@ -5122,11 +5116,10 @@ static void phb4_allocate_tables(struct phb4 *p) * the memory and wastes space by always allocating twice * as much as requested (size + alignment) */ - p->tbl_rtt = (uint64_t)local_alloc(p->chip_id, RTT_TABLE_SIZE, RTT_TABLE_SIZE); + p->tbl_rtt = local_alloc(p->chip_id, RTT_TABLE_SIZE, RTT_TABLE_SIZE); assert(p->tbl_rtt); - rte = (uint16_t *)(p->tbl_rtt); - for (i = 0; i < RTT_TABLE_ENTRIES; i++, rte++) - *rte = PHB4_RESERVED_PE_NUM(p); + for (i = 0; i < RTT_TABLE_ENTRIES; i++) + p->tbl_rtt[i] = PHB4_RESERVED_PE_NUM(p); p->tbl_peltv = (uint64_t)local_alloc(p->chip_id, p->tbl_peltv_size, p->tbl_peltv_size); assert(p->tbl_peltv); @@ -5235,7 +5228,8 @@ static void phb4_add_properties(struct phb4 *p) /* Indicators for variable tables */ dt_add_property_cells(np, "ibm,opal-rtt-table", - hi32(p->tbl_rtt), lo32(p->tbl_rtt), RTT_TABLE_SIZE); + hi32((u64) p->tbl_rtt), lo32((u64) p->tbl_rtt), RTT_TABLE_SIZE); + dt_add_property_cells(np, "ibm,opal-peltv-table", hi32(p->tbl_peltv), lo32(p->tbl_peltv), p->tbl_peltv_size); dt_add_property_cells(np, "ibm,opal-pest-table", diff --git a/include/phb4.h b/include/phb4.h index 43819d57b848..6a5e9d5c8723 100644 --- a/include/phb4.h +++ b/include/phb4.h @@ -196,7 +196,7 @@ struct phb4 { uint32_t num_irqs; /* SkiBoot owned in-memory tables */ - uint64_t tbl_rtt; + uint16_t *tbl_rtt; uint64_t tbl_peltv; uint64_t tbl_peltv_size; uint64_t tbl_pest; @@ -214,7 +214,6 @@ struct phb4 { uint64_t mbt_size; uint64_t tvt_size; - uint16_t rte_cache[RTT_TABLE_ENTRIES]; /* FIXME: dynamically allocate only what's needed below */ uint64_t tve_cache[1024]; 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Mon, 26 Nov 2018 22:21:44 -0800 (PST) Received: from wafer.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id r83sm4371741pfc.115.2018.11.26.22.21.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Nov 2018 22:21:44 -0800 (PST) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 27 Nov 2018 17:21:19 +1100 Message-Id: <20181127062119.15775-4-oohall@gmail.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181127062119.15775-1-oohall@gmail.com> References: <20181127062119.15775-1-oohall@gmail.com> Subject: [Skiboot] [PATCH 4/4] phb4: Eliminate peltv_cache X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The PELT-V is also an in-memory table and there is no reason to have two copies of it. Removing the cache shaves another 128KB off the size of each struct phb4. Signed-off-by: Oliver O'Halloran Reviewed-by: Andrew Donnellan --- hw/phb4.c | 30 +++++++++++++----------------- include/phb4.h | 3 +-- 2 files changed, 14 insertions(+), 19 deletions(-) diff --git a/hw/phb4.c b/hw/phb4.c index 14fa94b50f75..c52e0b537e56 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -934,7 +934,6 @@ static void phb4_init_ioda_cache(struct phb4 *p) * ever let a live FF RTT even temporarily when resetting * for EEH etc... (HW278969). */ - memset(p->peltv_cache, 0x0, sizeof(p->peltv_cache)); memset(p->tve_cache, 0x0, sizeof(p->tve_cache)); /* XXX Should we mask them ? */ @@ -1162,11 +1161,11 @@ static int64_t phb4_ioda_reset(struct phb *phb, bool purge) /* Additional OPAL specific inits */ - /* Clear RTT and PELTV and PEST */ + /* Clear RTT and PELTV */ for (i = 0; i < RTT_TABLE_ENTRIES; i++) p->tbl_rtt[i] = PHB4_RESERVED_PE_NUM(p); - memcpy((void *)p->tbl_peltv, p->peltv_cache, p->tbl_peltv_size); + memset(p->tbl_peltv, 0x0, p->tbl_peltv_size); /* Clear PEST & PEEV */ for (i = 0; i < p->max_num_pes; i++) { @@ -2206,7 +2205,6 @@ static int64_t phb4_set_peltv(struct phb *phb, uint8_t state) { struct phb4 *p = phb_to_phb4(phb); - uint8_t *peltv; uint32_t idx, mask; /* Sanity check */ @@ -2218,15 +2216,10 @@ static int64_t phb4_set_peltv(struct phb *phb, idx += (child_pe / 8); mask = 0x1 << (7 - (child_pe % 8)); - peltv = (uint8_t *)p->tbl_peltv; - peltv += idx; - if (state) { - *peltv |= mask; - p->peltv_cache[idx] |= mask; - } else { - *peltv &= ~mask; - p->peltv_cache[idx] &= ~mask; - } + if (state) + p->tbl_peltv[idx] |= mask; + else + p->tbl_peltv[idx] &= ~mask; return OPAL_SUCCESS; } @@ -4596,7 +4589,8 @@ static void phb4_init_ioda3(struct phb4 *p) out_be64(p->regs + PHB_RTT_BAR, (u64) p->tbl_rtt | PHB_RTT_BAR_ENABLE); /* Init_21 - PELT-V BAR */ - out_be64(p->regs + PHB_PELTV_BAR, p->tbl_peltv | PHB_PELTV_BAR_ENABLE); + out_be64(p->regs + PHB_PELTV_BAR, + (u64) p->tbl_peltv | PHB_PELTV_BAR_ENABLE); /* Init_22 - Setup M32 starting address */ out_be64(p->regs + PHB_M32_START_ADDR, M32_PCI_START); @@ -5121,9 +5115,9 @@ static void phb4_allocate_tables(struct phb4 *p) for (i = 0; i < RTT_TABLE_ENTRIES; i++) p->tbl_rtt[i] = PHB4_RESERVED_PE_NUM(p); - p->tbl_peltv = (uint64_t)local_alloc(p->chip_id, p->tbl_peltv_size, p->tbl_peltv_size); + p->tbl_peltv = local_alloc(p->chip_id, p->tbl_peltv_size, p->tbl_peltv_size); assert(p->tbl_peltv); - memset((void *)p->tbl_peltv, 0, p->tbl_peltv_size); + memset(p->tbl_peltv, 0, p->tbl_peltv_size); p->tbl_pest = (uint64_t)local_alloc(p->chip_id, p->tbl_pest_size, p->tbl_pest_size); assert(p->tbl_pest); @@ -5231,7 +5225,9 @@ static void phb4_add_properties(struct phb4 *p) hi32((u64) p->tbl_rtt), lo32((u64) p->tbl_rtt), RTT_TABLE_SIZE); dt_add_property_cells(np, "ibm,opal-peltv-table", - hi32(p->tbl_peltv), lo32(p->tbl_peltv), p->tbl_peltv_size); + hi32((u64) p->tbl_peltv), lo32((u64) p->tbl_peltv), + p->tbl_peltv_size); + dt_add_property_cells(np, "ibm,opal-pest-table", hi32(p->tbl_pest), lo32(p->tbl_pest), p->tbl_pest_size); diff --git a/include/phb4.h b/include/phb4.h index 6a5e9d5c8723..c70f713b2d63 100644 --- a/include/phb4.h +++ b/include/phb4.h @@ -197,7 +197,7 @@ struct phb4 { /* SkiBoot owned in-memory tables */ uint16_t *tbl_rtt; - uint64_t tbl_peltv; + uint8_t *tbl_peltv; uint64_t tbl_peltv_size; uint64_t tbl_pest; uint64_t tbl_pest_size; @@ -216,7 +216,6 @@ struct phb4 { /* FIXME: dynamically allocate only what's needed below */ uint64_t tve_cache[1024]; - uint8_t peltv_cache[PELTV_TABLE_SIZE_MAX]; uint64_t mbt_cache[32][2]; uint64_t mdt_cache[512]; /* max num of PEs */ uint64_t mist_cache[4096/4];/* max num of MSIs */