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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 13 Nov 2018 17:29:22 -0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id wADHTLlp15007806 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 13 Nov 2018 17:29:21 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0ED7C112061; Tue, 13 Nov 2018 17:29:21 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AF71F112063; Tue, 13 Nov 2018 17:29:20 +0000 (GMT) Received: from otta.local (unknown [9.80.218.223]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Tue, 13 Nov 2018 17:29:20 +0000 (GMT) To: Segher Boessenkool Cc: Michael Meissner , GCC Patches From: Peter Bergner Subject: [PATCH][RS6000] Fix PR87870: ppc64 generates poor code when loading constants into TImode vars Date: Tue, 13 Nov 2018 11:29:20 -0600 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.13; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 x-cbid: 18111317-0072-0000-0000-000003C827E8 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010042; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000270; SDB=6.01116926; UDB=6.00577118; IPR=6.00897034; MB=3.00024144; MTD=3.00000008; XFM=3.00000015; UTC=2018-11-13 17:29:23 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18111317-0073-0000-0000-00004A1897A5 Message-Id: <3bd3efa2-14af-1622-bcb9-d583137f7d5e@linux.ibm.com> X-IsSubscribed: yes PR87870 shows a problem loading simple constant values into TImode variables. This is a regression ever since VSX was added and we started using the vsx_mov_64bit pattern. We still get the correct code on trunk if we compile with -mno-vsx, since we fall back to using the older mov_ppc64 move pattern, which has an alternative "r" <- "n". Our current vsx_mov_64bit pattern currently has two alternatives for loading constants into GPRs, one using "*r" <- "jwM" and "??r" <- "W". These look redundant to me, since "W" contains support for both all-zero constants (ie, "j") and all-one constants (ie, wM) as well as a few more. My patch below consolidates them both and uses a new mode iterator that uses "W" for the vector modes and "n" for TImode like mov_ppc64 used. I'll note I didn't change the vsx_mov_32bit pattern, since TImode isn't supported with -m32. However, if you want, I could remove the redundant "*r" <- "jwM" alternative there too? This passes bootstrap and regtesting with no regressions. Ok for trunk? Peter gcc/ PR target/87870 * config/rs6000/vsx.md (nW): New mode iterator. (vsx_mov_64bit): Use it. Remove redundant GPR 0/-1 alternative. gcc/testsuite/ PR target/87870 * gcc.target/powerpc/pr87870.c: New test. Index: gcc/config/rs6000/vsx.md =================================================================== --- gcc/config/rs6000/vsx.md (revision 265971) +++ gcc/config/rs6000/vsx.md (working copy) @@ -183,6 +183,18 @@ (define_mode_attr ??r [(V16QI "??r") (TF "??r") (TI "r")]) +;; A mode attribute used for 128-bit constant values. +(define_mode_attr nW [(V16QI "W") + (V8HI "W") + (V4SI "W") + (V4SF "W") + (V2DI "W") + (V2DF "W") + (V1TI "W") + (KF "W") + (TF "W") + (TI "n")]) + ;; Same size integer type for floating point data (define_mode_attr VSi [(V4SF "v4si") (V2DF "v2di") @@ -1193,17 +1205,17 @@ (define_insn_and_split "*xxspltib_ ;; VSX store VSX load VSX move VSX->GPR GPR->VSX LQ (GPR) ;; STQ (GPR) GPR load GPR store GPR move XXSPLTIB VSPLTISW -;; VSX 0/-1 GPR 0/-1 VMX const GPR const LVX (VMX) STVX (VMX) +;; VSX 0/-1 VMX const GPR const LVX (VMX) STVX (VMX) (define_insn "vsx_mov_64bit" [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=ZwO, , , r, we, ?wQ, ?&r, ??r, ??Y, , wo, v, - ?, *r, v, ??r, wZ, v") + ?, v, , wZ, v") (match_operand:VSX_M 1 "input_operand" ", ZwO, , we, r, r, wQ, Y, r, r, wE, jwM, - ?jwM, jwM, W, W, v, wZ"))] + ?jwM, W, , v, wZ"))] "TARGET_POWERPC64 && VECTOR_MEM_VSX_P (mode) && (register_operand (operands[0], mode) @@ -1214,12 +1226,12 @@ (define_insn "vsx_mov_64bit" [(set_attr "type" "vecstore, vecload, vecsimple, mffgpr, mftgpr, load, store, load, store, *, vecsimple, vecsimple, - vecsimple, *, *, *, vecstore, vecload") + vecsimple, *, *, vecstore, vecload") (set_attr "length" "4, 4, 4, 8, 4, 8, 8, 8, 8, 8, 4, 4, - 4, 8, 20, 20, 4, 4")]) + 4, 20, 20, 4, 4")]) ;; VSX store VSX load VSX move GPR load GPR store GPR move ;; XXSPLTIB VSPLTISW VSX 0/-1 GPR 0/-1 VMX const GPR const Index: gcc/config/rs6000/vsx.md =================================================================== --- gcc/config/rs6000/vsx.md (revision 265971) +++ gcc/config/rs6000/vsx.md (working copy) @@ -183,6 +183,18 @@ (define_mode_attr ??r [(V16QI "??r") (TF "??r") (TI "r")]) +;; A mode attribute used for 128-bit constant values. +(define_mode_attr nW [(V16QI "W") + (V8HI "W") + (V4SI "W") + (V4SF "W") + (V2DI "W") + (V2DF "W") + (V1TI "W") + (KF "W") + (TF "W") + (TI "n")]) + ;; Same size integer type for floating point data (define_mode_attr VSi [(V4SF "v4si") (V2DF "v2di") @@ -1193,17 +1205,17 @@ (define_insn_and_split "*xxspltib_ ;; VSX store VSX load VSX move VSX->GPR GPR->VSX LQ (GPR) ;; STQ (GPR) GPR load GPR store GPR move XXSPLTIB VSPLTISW -;; VSX 0/-1 GPR 0/-1 VMX const GPR const LVX (VMX) STVX (VMX) +;; VSX 0/-1 VMX const GPR const LVX (VMX) STVX (VMX) (define_insn "vsx_mov_64bit" [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=ZwO, , , r, we, ?wQ, ?&r, ??r, ??Y, , wo, v, - ?, *r, v, ??r, wZ, v") + ?, v, , wZ, v") (match_operand:VSX_M 1 "input_operand" ", ZwO, , we, r, r, wQ, Y, r, r, wE, jwM, - ?jwM, jwM, W, W, v, wZ"))] + ?jwM, W, , v, wZ"))] "TARGET_POWERPC64 && VECTOR_MEM_VSX_P (mode) && (register_operand (operands[0], mode) @@ -1214,12 +1226,12 @@ (define_insn "vsx_mov_64bit" [(set_attr "type" "vecstore, vecload, vecsimple, mffgpr, mftgpr, load, store, load, store, *, vecsimple, vecsimple, - vecsimple, *, *, *, vecstore, vecload") + vecsimple, *, *, vecstore, vecload") (set_attr "length" "4, 4, 4, 8, 4, 8, 8, 8, 8, 8, 4, 4, - 4, 8, 20, 20, 4, 4")]) + 4, 20, 20, 4, 4")]) ;; VSX store VSX load VSX move GPR load GPR store GPR move ;; XXSPLTIB VSPLTISW VSX 0/-1 GPR 0/-1 VMX const GPR const Index: gcc/testsuite/gcc.target/powerpc/pr87870.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/pr87870.c (nonexistent) +++ gcc/testsuite/gcc.target/powerpc/pr87870.c (working copy) @@ -0,0 +1,28 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-options "-O2" } */ + +__int128 +test0 (void) +{ + return 0; +} + +__int128 +test1 (void) +{ + return 1; +} + +__int128 +test2 (void) +{ + return -1; +} + +__int128 +test3 (void) +{ + return ((__int128)0xdeadbeefcafebabe << 64) | 0xfacefeedbaaaaaad; +} + +/* { dg-final { scan-assembler-not {\mld\M} } } */