From patchwork Thu Nov 1 14:00:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aaron Sawdey X-Patchwork-Id: 991948 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-488818-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="p24G6iIG"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42m6MP1vDrzB4X1 for ; Fri, 2 Nov 2018 01:01:51 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to:cc :from:subject:date:mime-version:content-type :content-transfer-encoding:message-id; q=dns; s=default; b=vRxPf 62XjTeHSM1b231W9pSGUJ78jQ+QW4tvzbXQwB/2pFVxnRuJP0S2eECd6C1Jk950R YMH6swMbfkJ3LBPI4An/4qi/5KLmW3UM0xob8A8GWpPbf3xBFoI0+TADr2kEv4t4 PTF7XXZPB1CbpKFW6K/wbRyXy/BJfKQ+9GRqm4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to:cc :from:subject:date:mime-version:content-type :content-transfer-encoding:message-id; s=default; bh=JClqmgNvUua 4JRaaPObcVbOB7IU=; b=p24G6iIGqnmPUSL0HVo456utfeDAuNcNXkxkMj7kKzv ld3ORFb46p+8pNmXpH6aByhlrD/3TJBpKLC0ABs1TucfpRxwjEYMkkiZWdCRyZBe QM2jOJCL/iz7Inx9XrTFigmKGEnJP8ybqprwfkyAADy5aQyXveXXqsO1LY4C2BzM = Received: (qmail 91498 invoked by alias); 1 Nov 2018 14:00:55 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 91091 invoked by uid 89); 1 Nov 2018 14:00:28 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-12.6 required=5.0 tests=BAYES_00, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS, TIME_LIMIT_EXCEEDED autolearn=unavailable version=3.3.2 spammy=power9, 8423, 23, SCRATCH, 842323 X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 01 Nov 2018 14:00:16 +0000 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id wA1Do42l005349 for ; Thu, 1 Nov 2018 10:00:15 -0400 Received: from e17.ny.us.ibm.com (e17.ny.us.ibm.com [129.33.205.207]) by mx0a-001b2d01.pphosted.com with ESMTP id 2ng08jy05d-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 01 Nov 2018 10:00:14 -0400 Received: from localhost by e17.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 1 Nov 2018 14:00:10 -0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id wA1E09bS46661792 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 1 Nov 2018 14:00:09 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8CBA911206F; Thu, 1 Nov 2018 14:00:09 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 10E46112063; Thu, 1 Nov 2018 14:00:09 +0000 (GMT) Received: from [9.85.230.124] (unknown [9.85.230.124]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Thu, 1 Nov 2018 14:00:08 +0000 (GMT) To: GCC Patches Cc: Segher Boessenkool , David Edelsohn , Bill Schmidt , Michael Meissner From: Aaron Sawdey Subject: [PATCH][rs6000] cleanup and rename rs6000_address_for_fpconvert Date: Thu, 1 Nov 2018 09:00:08 -0500 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.13; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 x-cbid: 18110114-0040-0000-0000-0000048ABA65 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00009966; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000268; SDB=6.01111117; UDB=6.00575787; IPR=6.00891209; MB=3.00023991; MTD=3.00000008; XFM=3.00000015; UTC=2018-11-01 14:00:12 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18110114-0041-0000-0000-00000893BAFE Message-Id: <0d1360d0-392c-2a40-f011-4e6da951d9d1@linux.ibm.com> X-IsSubscribed: yes This patch combines the duties of rs6000_address_for_fpconvert into rs6000_force_indexed_or_indirect_mem which I recently added, and changes all calls to use the latter. The new function name is more descriptive of what is actually going on. This now uses indexed_or_indirect_operand() to test the incoming rtx which matches what the insns this is used to prepare for are using as their predicate. Bootstrap/regtest passes on ppc64le (power7, power9), ok for trunk? 2018-11-01 Aaron Sawdey * config/rs6000/rs6000-protos.h (rs6000_address_for_fpconvert): Remove prototype. * config/rs6000/rs6000.c (rs6000_force_indexed_or_indirect_mem): Combine with rs6000_address_for_fpconvert. (rs6000_address_for_fpconvert) Combine with rs6000_force_indexed_or_indirect_mem. (rs6000_expand_vector_init): Change function call from rs6000_address_for_fpconvert to rs6000_force_indexed_or_indirect_mem. * config/rs6000/rs6000.md (floatsi2_lfiwax): Change call from rs6000_address_for_fpconvert to rs6000_force_indexed_or_indirect_mem. (floatsi2_lfiwax_mem): Ditto. (floatunssi2_lfiwzx): Ditto. (floatunssi2_lfiwzx_mem): Ditto. (float2): Ditto. (floatuns2): Ditto. (fix_truncsi2_stfiwx): Ditto. (fixuns_truncsi2_stfiwx): Ditto. (float_si2_hw): Ditto. (floatuns_si2_hw): Ditto. * config/rs6000/vsx.md (*vsx_extract_si): Ditto. (vsx_splat_): Ditto. Index: gcc/config/rs6000/rs6000-protos.h =================================================================== --- gcc/config/rs6000/rs6000-protos.h (revision 265637) +++ gcc/config/rs6000/rs6000-protos.h (working copy) @@ -153,7 +153,6 @@ extern rtx rs6000_machopic_legitimize_pic_address (rtx, machine_mode, rtx); -extern rtx rs6000_address_for_fpconvert (rtx); extern rtx rs6000_allocate_stack_temp (machine_mode, bool, bool); extern align_flags rs6000_loop_align (rtx); extern void rs6000_split_logical (rtx [], enum rtx_code, bool, bool, bool); Index: gcc/config/rs6000/rs6000.c =================================================================== --- gcc/config/rs6000/rs6000.c (revision 265637) +++ gcc/config/rs6000/rs6000.c (working copy) @@ -6560,7 +6560,7 @@ { rtx element0 = XVECEXP (vals, 0, 0); if (MEM_P (element0)) - element0 = rs6000_address_for_fpconvert (element0); + element0 = rs6000_force_indexed_or_indirect_mem (element0); else element0 = force_reg (SImode, element0); @@ -6601,7 +6601,7 @@ if (TARGET_P9_VECTOR) { if (MEM_P (element0)) - element0 = rs6000_address_for_fpconvert (element0); + element0 = rs6000_force_indexed_or_indirect_mem (element0); emit_insn (gen_vsx_splat_v4sf (target, element0)); } @@ -8423,23 +8423,6 @@ return false; } -/* Helper function for making sure we will make full - use of indexed addressing. */ - -rtx -rs6000_force_indexed_or_indirect_mem (rtx x) -{ - machine_mode m = GET_MODE (x); - if (!indexed_or_indirect_operand (x, m)) - { - rtx addr = XEXP (x, 0); - addr = force_reg (Pmode, addr); - x = replace_equiv_address_nv (x, addr); - } - return x; -} - - /* Implement the TARGET_LEGITIMATE_COMBINED_INSN hook. */ static bool @@ -37312,21 +37295,19 @@ return stack; } -/* Given a memory reference, if it is not a reg or reg+reg addressing, convert - to such a form to deal with memory reference instructions like STFIWX that - only take reg+reg addressing. */ +/* Given a memory reference, if it is not a reg or reg+reg addressing, + convert to such a form to deal with memory reference instructions + like STFIWX and LDBRX that only take reg+reg addressing. */ rtx -rs6000_address_for_fpconvert (rtx x) +rs6000_force_indexed_or_indirect_mem (rtx x) { - rtx addr; + machine_mode m = GET_MODE (x); gcc_assert (MEM_P (x)); - addr = XEXP (x, 0); - if (can_create_pseudo_p () - && ! legitimate_indirect_address_p (addr, reload_completed) - && ! legitimate_indexed_address_p (addr, reload_completed)) + if (can_create_pseudo_p () && !indexed_or_indirect_operand (x, m)) { + rtx addr = XEXP (x, 0); if (GET_CODE (addr) == PRE_INC || GET_CODE (addr) == PRE_DEC) { rtx reg = XEXP (addr, 0); @@ -37346,7 +37327,7 @@ addr = reg; } - x = replace_equiv_address (x, copy_addr_to_reg (addr)); + x = replace_equiv_address (x, force_reg (Pmode, addr)); } return x; Index: gcc/config/rs6000/rs6000.md =================================================================== --- gcc/config/rs6000/rs6000.md (revision 265637) +++ gcc/config/rs6000/rs6000.md (working copy) @@ -5225,7 +5225,7 @@ tmp = gen_reg_rtx (DImode); if (MEM_P (src)) { - src = rs6000_address_for_fpconvert (src); + src = rs6000_force_indexed_or_indirect_mem (src); emit_insn (gen_lfiwax (tmp, src)); } else @@ -5252,7 +5252,7 @@ "" [(pc)] { - operands[1] = rs6000_address_for_fpconvert (operands[1]); + operands[1] = rs6000_force_indexed_or_indirect_mem (operands[1]); if (GET_CODE (operands[2]) == SCRATCH) operands[2] = gen_reg_rtx (DImode); if (TARGET_P8_VECTOR) @@ -5300,7 +5300,7 @@ tmp = gen_reg_rtx (DImode); if (MEM_P (src)) { - src = rs6000_address_for_fpconvert (src); + src = rs6000_force_indexed_or_indirect_mem (src); emit_insn (gen_lfiwzx (tmp, src)); } else @@ -5327,7 +5327,7 @@ "" [(pc)] { - operands[1] = rs6000_address_for_fpconvert (operands[1]); + operands[1] = rs6000_force_indexed_or_indirect_mem (operands[1]); if (GET_CODE (operands[2]) == SCRATCH) operands[2] = gen_reg_rtx (DImode); if (TARGET_P8_VECTOR) @@ -5513,7 +5513,7 @@ "TARGET_P9_VECTOR && TARGET_DIRECT_MOVE && TARGET_POWERPC64" { if (MEM_P (operands[1])) - operands[1] = rs6000_address_for_fpconvert (operands[1]); + operands[1] = rs6000_force_indexed_or_indirect_mem (operands[1]); }) (define_insn_and_split "*float2_internal" @@ -5565,7 +5565,7 @@ "TARGET_P9_VECTOR && TARGET_DIRECT_MOVE && TARGET_POWERPC64" { if (MEM_P (operands[1])) - operands[1] = rs6000_address_for_fpconvert (operands[1]); + operands[1] = rs6000_force_indexed_or_indirect_mem (operands[1]); }) (define_insn_and_split "*floatuns2_internal" @@ -5646,7 +5646,7 @@ emit_insn (gen_fctiwz_ (tmp, src)); if (MEM_P (dest)) { - dest = rs6000_address_for_fpconvert (dest); + dest = rs6000_force_indexed_or_indirect_mem (dest); emit_insn (gen_stfiwx (dest, tmp)); DONE; } @@ -5793,7 +5793,7 @@ emit_insn (gen_fctiwuz_ (tmp, src)); if (MEM_P (dest)) { - dest = rs6000_address_for_fpconvert (dest); + dest = rs6000_force_indexed_or_indirect_mem (dest); emit_insn (gen_stfiwx (dest, tmp)); DONE; } @@ -14387,7 +14387,7 @@ operands[2] = gen_reg_rtx (DImode); if (MEM_P (operands[1])) - operands[1] = rs6000_address_for_fpconvert (operands[1]); + operands[1] = rs6000_force_indexed_or_indirect_mem (operands[1]); }) (define_insn_and_split "float2" @@ -14453,7 +14453,7 @@ operands[2] = gen_reg_rtx (DImode); if (MEM_P (operands[1])) - operands[1] = rs6000_address_for_fpconvert (operands[1]); + operands[1] = rs6000_force_indexed_or_indirect_mem (operands[1]); }) (define_insn_and_split "floatuns2" Index: gcc/config/rs6000/vsx.md =================================================================== --- gcc/config/rs6000/vsx.md (revision 265637) +++ gcc/config/rs6000/vsx.md (working copy) @@ -3624,7 +3624,7 @@ if (MEM_P (operands[0])) { if (can_create_pseudo_p ()) - dest = rs6000_address_for_fpconvert (dest); + dest = rs6000_force_indexed_or_indirect_mem (dest); if (TARGET_P8_VECTOR) emit_move_insn (dest, gen_rtx_REG (SImode, REGNO (vec_tmp))); @@ -4088,7 +4088,7 @@ { rtx op1 = operands[1]; if (MEM_P (op1)) - operands[1] = rs6000_address_for_fpconvert (op1); + operands[1] = rs6000_force_indexed_or_indirect_mem (op1); else if (!REG_P (op1)) op1 = force_reg (mode, op1); })