From patchwork Fri Sep 7 06:24:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrea Merello X-Patchwork-Id: 967208 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qxri8meb"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4266rF4XzDz9sC2 for ; Fri, 7 Sep 2018 16:25:33 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727681AbeIGLEy (ORCPT ); Fri, 7 Sep 2018 07:04:54 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:54205 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727651AbeIGLEw (ORCPT ); Fri, 7 Sep 2018 07:04:52 -0400 Received: by mail-wm0-f66.google.com with SMTP id b19-v6so13540791wme.3; Thu, 06 Sep 2018 23:25:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=442uHEx2h0SkzNwr/c2bDFSZt2b3nXe/wow3C9PRspg=; b=qxri8mebiJCUIVqU6eQvVNBD+QtXILHFnszfQ737XEQV3SXUPUkE7dHZJ3oppVK4FX gaSb1fSGEH3Qp6lVhz+a6HTyKx8k7iUNsq6h0mGm4Mz9ZO4d/5JrykBc+0YxSKSQHIAv TJuz8dhWZQkJ7FC3dPnzvcjZPJxNeS+V3GTSMh/aWtHlS41fd9jgmF+z1e2k6JdpE5rv XoPeNk7W8ejqaxk9AzddQu+44DVF4dGeaJ7DkTn0O7k/5ginSjmJYz+0waHMprA/VLM7 6ennR05bokRlnHb3YiU6uf9UWgjQswenGP0Ja65t6TgmWfmkAUziZiVd8PjfwlVgUl59 OtFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=442uHEx2h0SkzNwr/c2bDFSZt2b3nXe/wow3C9PRspg=; b=aiMapeeTHjSr8Lc5sL3yBwywN3cwofme9EDcDeXf6cKefbHGgJ38Hw1PIAwfDRQFOP yxcqOb7poKzz6aScs6bSz9gq9b/DccJKO1+JgzVAgolIJJViZajKCLy3JtTjyVQh5RAd yfJ4VLuPfD0HxFT052MuoWzQqISewe+raFxBUHrWY2LoER2k5ihEXvnCbmO34YggapwD dADsOCuzwvZn/z57Smdx8km0P1nkdVCk7GzgV8yNdxDNBRCVEVLzqweA1kTm6MBEYM2D e2x9TUA+Eyxi8y1r9HGByNWF1oxdfO5bZ8wxdJ/pvIFOsBE7jcB7K9ILTI1X5Yc8HdQM yDaA== X-Gm-Message-State: APzg51BfUEuHO/4SP51kQLLC3USaB0xt+oK+ck1d3n8QDGWDyOlgryVq YC5I7PjpnUSyoOjtv9RUtrs= X-Google-Smtp-Source: ANB0VdbejVTlKHykLHLRKRDbhBGCwq2R0bQSVdymfm9yAIY19MaHRCjB2G3XkriRgKv/mMR3OwATcA== X-Received: by 2002:a1c:dc1:: with SMTP id 184-v6mr3910796wmn.145.1536301521586; Thu, 06 Sep 2018 23:25:21 -0700 (PDT) Received: from NewMoon.iit.local ([90.147.180.254]) by smtp.gmail.com with ESMTPSA id w10-v6sm8387233wrp.31.2018.09.06.23.25.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Sep 2018 23:25:20 -0700 (PDT) From: Andrea Merello To: vkoul@kernel.org, dan.j.williams@intel.com, michal.simek@xilinx.com, appana.durga.rao@xilinx.com, dmaengine@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, radhey.shyam.pandey@xilinx.com, Andrea Merello Subject: [PATCH v5 3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx, sg-length-width property Date: Fri, 7 Sep 2018 08:24:58 +0200 Message-Id: <20180907062502.8241-3-andrea.merello@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180907062502.8241-1-andrea.merello@gmail.com> References: <20180907062502.8241-1-andrea.merello@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The width of the "length register" cannot be autodetected, and it is now specified with a DT property. Add documentation for it. Cc: Rob Herring Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: Radhey Shyam Pandey Signed-off-by: Andrea Merello Reviewed-by: Radhey Shyam Pandey Reviewed-by: Rob Herring --- Changes in v2: - change property name - property is now optional - cc DT maintainer Changes in v3: - reword - cc DT maintainerS and ML Changes in v4: - specify the unit, the valid range and the default value Changes in v5: - commit message trivial fix - fix spaces before tab --- Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt index a2b8bfaec43c..5df4eac7300c 100644 --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt @@ -41,6 +41,10 @@ Optional properties: - xlnx,include-sg: Tells configured for Scatter-mode in the hardware. Optional properties for AXI DMA: +- xlnx,sg-length-width: Should be set to the width in bits of the length + register as configured in h/w. Takes values {8...26}. If the property + is missing or invalid then the default value 23 is used. This is the + maximum value that is supported by all IP versions. - xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware. Optional properties for VDMA: - xlnx,flush-fsync: Tells which channel to Flush on Frame sync. From patchwork Fri Sep 7 06:25:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrea Merello X-Patchwork-Id: 967209 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="mo1x0tRw"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4266rb4jN8z9s47 for ; Fri, 7 Sep 2018 16:25:51 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727728AbeIGLFH (ORCPT ); Fri, 7 Sep 2018 07:05:07 -0400 Received: from mail-wm0-f65.google.com ([74.125.82.65]:36321 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727608AbeIGLEu (ORCPT ); Fri, 7 Sep 2018 07:04:50 -0400 Received: by mail-wm0-f65.google.com with SMTP id j192-v6so13474371wmj.1; Thu, 06 Sep 2018 23:25:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=g6yEf7sPUTftU4J49gga7zTfK93CLLR+cwQ15WOA01U=; b=mo1x0tRwtohb/U/gO32QUcNXFIZvBuiAwYmOV7B2Y+7CWbZf3/EijKYIqDPR1VWkMQ /2qFVQ/8aqsRUx34wZLXxoMM8IZLnvME/wazBSTvT9lggm5Gc6cFm5oY5ckCy/XbSv45 cqA8PgPr+3AfpAJ9WNE6w6yuCwL7oX6xAfqQEnFbE0YbHkzSyLnx8302+h5sPk88Bdny jGSybm64/dFZJZHwME1GoTSsbRQgFD/7OG9D097rosXD4ckKzlrSWsRXDCTeKL2CRYsi InspE/TsJyk4cHqX9S8U2lQnT86bjlb0Fd21zh1kcbMDlhwinuGrxiog6VnOvmxAmjy0 /U8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=g6yEf7sPUTftU4J49gga7zTfK93CLLR+cwQ15WOA01U=; b=ajtxAYE87nTR/zY42CXLul8Mz5Fodf9e4z3HRCSY/xk14rfnGjSQOhMWfj4amOs5eR xQA+N+6dFip09/lRNJYRcHIYsroDFXFOkKECdel/kqHRVVHgy/j7N2IidgDerTnYo8nW bBQyCFRjJ+3koYgYLTVEAjbajNbQ1g3wdgHFRrej4izPX36fwCazz3RuI567jxtN2BXI YBl6FcyFJwpZg9wgTluf5vJVusLaqedw4onxcL8zY4VwRrCcpmFXVKderrHT3vyzMWIE ricud8wLc7MYCNzc82OZ9HXIfnRC4cl31bNxxxtUNMey4Jr1amLy04avnINRTWYxD4Bo JrJg== X-Gm-Message-State: APzg51DzcfDKQMQ5UH9B7TBhnrWhg1OOVZiiAQZUK2y4Blo027I2GgKW 4EGZ2so+A4pDod9Ir0BDHA4= X-Google-Smtp-Source: ANB0VdZPyWU0yto9phBQMluQxwVIkHdJpJqHhag12U8FqLdTHE3VVR7cHhRAjVujruV67ng6F3xIgQ== X-Received: by 2002:a1c:bc86:: with SMTP id m128-v6mr3892949wmf.147.1536301525462; Thu, 06 Sep 2018 23:25:25 -0700 (PDT) Received: from NewMoon.iit.local ([90.147.180.254]) by smtp.gmail.com with ESMTPSA id w10-v6sm8387233wrp.31.2018.09.06.23.25.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Sep 2018 23:25:24 -0700 (PDT) From: Andrea Merello To: vkoul@kernel.org, dan.j.williams@intel.com, michal.simek@xilinx.com, appana.durga.rao@xilinx.com, dmaengine@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, radhey.shyam.pandey@xilinx.com, Andrea Merello Subject: [PATCH v5 6/7] dt-bindings: dmaengine: xilinx_dma: drop has-sg property Date: Fri, 7 Sep 2018 08:25:01 +0200 Message-Id: <20180907062502.8241-6-andrea.merello@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180907062502.8241-1-andrea.merello@gmail.com> References: <20180907062502.8241-1-andrea.merello@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This property is not needed anymore, because the driver now autodetects it. Delete references in documentation. Cc: Rob Herring Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: Radhey Shyam Pandey Signed-off-by: Andrea Merello Reviewed-by: Radhey Shyam Pandey Reviewed-by: Rob Herring --- Changes in v2: - cc DT maintainer Changes in v3: - cc DT maintainerS/ML Changes in v4: None Changes in v5: None --- Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 3 --- 1 file changed, 3 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt index 5df4eac7300c..6303ce7fcc3d 100644 --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt @@ -37,9 +37,6 @@ Required properties: Required properties for VDMA: - xlnx,num-fstores: Should be the number of framebuffers as configured in h/w. -Optional properties: -- xlnx,include-sg: Tells configured for Scatter-mode in - the hardware. Optional properties for AXI DMA: - xlnx,sg-length-width: Should be set to the width in bits of the length register as configured in h/w. Takes values {8...26}. If the property