From patchwork Tue Sep 4 12:41:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 965888 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="ZZFMIhmX"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 424RKV51YRz9s3C for ; Tue, 4 Sep 2018 22:41:34 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726108AbeIDRGb (ORCPT ); Tue, 4 Sep 2018 13:06:31 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:37321 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726087AbeIDRGb (ORCPT ); Tue, 4 Sep 2018 13:06:31 -0400 Received: by mail-lf1-f65.google.com with SMTP id j8-v6so2819538lfb.4 for ; Tue, 04 Sep 2018 05:41:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=0R2o2oDVigWmkgDco1YurZOejFFyofsCuVIFyagOqYY=; b=ZZFMIhmXahPghBp+VjfDATz6eDjTXhCU5u3Wsly2+jWJSz/rWHn8q7E7NOgyxpvB1D 0GMpqm+38QHP73fPvCzE+iEO91zrQi7heGvQUwsIIBbAdrQIctgU9s/FR6KTvnTOj3MD g51NdKpytripdhxuCkjGhk1zr8JCCmIkhCujw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=0R2o2oDVigWmkgDco1YurZOejFFyofsCuVIFyagOqYY=; b=CKhJZ0NpvOtWf18MMgXmkFNi1Ag3XOJOdXAg0SM5SDmBHdyeoC9TFNooRlQgwOi7oi Ih1lEeq4IxkYBBvqz5ZczzdI1LLkJREW5Y+hgD9rtWJEY9DsGHrY8/UnbIKaNnPW+WgX O+IbzXM+3+ToBqaKonGTgdLdYXTmzZxmak9BdMVnBnsSICedMcmMw4IN3w2+nTCsO0pW VAxi8137E9X7UbCykRnLmnOgWYPwgwSBfEIQ8Ofcwhe3rHGJr+/7B2UKkHdvrflP0AFc KTS+R+D691a3UcYvaRHpiYX9pDDoHOiNSAt/rXhf2si6TbHb3BQ5NacF9e/uokpokXex yz/A== X-Gm-Message-State: APzg51D4htshzcGWWq8QeacbIym+ljlgkvFmOLaDDJAe19N3QVHwcmP8 XMEOTUuqIHR5wNlALnguQyJdlviNlmgLTA== X-Google-Smtp-Source: ANB0VdZKMI7ZpsfDsPrAO8K45Boj922eDe2FG3m/zBOAvE1OxfiiUGkGzRBnf6Q2P6Qq3Cx8pz6w+w== X-Received: by 2002:a19:cb93:: with SMTP id b141-v6mr19809691lfg.119.1536064891506; Tue, 04 Sep 2018 05:41:31 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id k4-v6sm4016152ljc.6.2018.09.04.05.41.30 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 04 Sep 2018 05:41:30 -0700 (PDT) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Linus Walleij , Sekhar Nori , Kevin Hilman , Michele Dionisio , Frode Isaksen Subject: [PATCH] spi: davinci: Remove chip select GPIO pdata Date: Tue, 4 Sep 2018 14:41:28 +0200 Message-Id: <20180904124128.14826-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.1 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The DaVinci SPI can use either: - Internal chip selects (inside the SPI host) - External chip selects (using GPIO) - External chip selects passed in pdata The last way of passing external chip selects through platform data is not used in the kernel. Delete it to make the code simpler when refactoring GPIO. Cc: Sekhar Nori Cc: Kevin Hilman Cc: Michele Dionisio Cc: Frode Isaksen Signed-off-by: Linus Walleij --- drivers/spi/spi-davinci.c | 7 ------- include/linux/platform_data/spi-davinci.h | 4 ---- 2 files changed, 11 deletions(-) diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index a02099c90c5c..76a87a674b87 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -434,13 +434,6 @@ static int davinci_spi_setup(struct spi_device *spi) retval = gpio_direction_output( spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); internal_cs = false; - } else if (pdata->chip_sel && - spi->chip_select < pdata->num_chipselect && - pdata->chip_sel[spi->chip_select] != SPI_INTERN_CS) { - spi->cs_gpio = pdata->chip_sel[spi->chip_select]; - retval = gpio_direction_output( - spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); - internal_cs = false; } if (retval) { diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h index f4edcb03c40c..0638fb6353bc 100644 --- a/include/linux/platform_data/spi-davinci.h +++ b/include/linux/platform_data/spi-davinci.h @@ -36,9 +36,6 @@ enum { * @num_chipselect: number of chipselects supported by this SPI master * @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt * controller withn the SoC. Possible values are 0 and 1. - * @chip_sel: list of GPIOs which can act as chip-selects for the SPI. - * SPI_INTERN_CS denotes internal SPI chip-select. Not necessary - * to populate if all chip-selects are internal. * @cshold_bug: set this to true if the SPI controller on your chip requires * a write to CSHOLD bit in between transfers (like in DM355). * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any @@ -48,7 +45,6 @@ struct davinci_spi_platform_data { u8 version; u8 num_chipselect; u8 intr_line; - u8 *chip_sel; u8 prescaler_limit; bool cshold_bug; enum dma_event_q dma_event_q;