From patchwork Thu Aug 30 18:04:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 964048 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="JhFtXVj2"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 421VmG36NWz9s1c for ; Fri, 31 Aug 2018 04:06:06 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727645AbeH3WIp (ORCPT ); Thu, 30 Aug 2018 18:08:45 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:43806 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727285AbeH3WIo (ORCPT ); Thu, 30 Aug 2018 18:08:44 -0400 Received: by mail-lf1-f65.google.com with SMTP id h64-v6so7899497lfi.10; Thu, 30 Aug 2018 11:05:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JvSO0dczpNLWTzHOOBaNzPUDUqa2BMj87UWzjeeshg0=; b=JhFtXVj2j4o8LMl2qgBvT9Z8dT812PGiK3s5tu243KhPWIlbK7bzO8vzuoX7xEmoZb jO/7evKIfqGNIro8kSGyVpJRQO2drQOEcL9RYGy/sQi/50HWjwLFz8R94HOtF4RZ3uR+ AeImLlqlhg8rBJ8b8K1o2zqPhpUn/4V4S3ooal7rJjmBa88gqwi0S4Oe0MwnZw498zuN bIYv+dB0frEJj3itoQ9aYYZSwq6yFld4mVu5IMLQqI74BvwTQ7RVSs5mKanCYL86kMF8 kUM4jAcrFppFbSdFPTYl5o6zt4nV71KiC3/wNHjdrJGbkHDlz9R4vhOBPFz6nLD87gZP MaSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JvSO0dczpNLWTzHOOBaNzPUDUqa2BMj87UWzjeeshg0=; b=VeMJFnyiA3+/H+KcaENI7LPXb7kPlpA7GE60BIadXjdZ6uAeJB7tLYVIgp/nCXYUek OqejEyAE8Pgt05UwKVKwQ9QXxYI8XBKtniGn31LAbWP9MjYAMsAqcr+EPw2xpykz/7Ii zHPmQ3SAdPdxi0OP02XBIcHz/yjjChuz6ATFr8Sc1swXVRTDqrBlDUpBpZF4BxpGfSy2 B1aHzcr2LppxScRuAaIA0yI4Wrsyb2DKnCcSloZepq902RidJM1dCyFvgnaxIcV7xKyN 8/JT72E5sy8BC+p90dzKwfsl8cBQLMdNbRyB7ZxSldWeHLk+9Zkh2S//zxxJ0hIG1v7Y YtYQ== X-Gm-Message-State: APzg51DUzthgb/eoUhCH9UpJGsEVfg2mn2oTnI5Be8TDk4NrUItV3A5y L/ZFjaubqzoK2mhPzilBqcM= X-Google-Smtp-Source: ANB0Vdb/m5Rdj9LgsSQAYgyq+EsfiZDKo8eZeD36wlslUlZH9TxcBplZT7cU7CHpBkw0KxOfQMQ8hQ== X-Received: by 2002:a19:2a91:: with SMTP id q17-v6mr8574174lfq.74.1535652322600; Thu, 30 Aug 2018 11:05:22 -0700 (PDT) Received: from localhost.localdomain (109-252-90-13.nat.spd-mgts.ru. [109.252.90.13]) by smtp.gmail.com with ESMTPSA id 13-v6sm1420789lfy.87.2018.08.30.11.05.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Aug 2018 11:05:22 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/8] ARM: trusted_foundations: Implement L2 cache initialization callback Date: Thu, 30 Aug 2018 21:04:14 +0300 Message-Id: <20180830180421.6415-2-digetx@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180830180421.6415-1-digetx@gmail.com> References: <20180830180421.6415-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Implement L2 cache initialization firmware callback that should be invoked early in boot in order to setup the required outer cache driver callbacks. Signed-off-by: Dmitry Osipenko --- arch/arm/firmware/trusted_foundations.c | 46 +++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm/firmware/trusted_foundations.c b/arch/arm/firmware/trusted_foundations.c index 689e6565abfc..3bf61a5933b9 100644 --- a/arch/arm/firmware/trusted_foundations.c +++ b/arch/arm/firmware/trusted_foundations.c @@ -18,8 +18,15 @@ #include #include #include +#include +#include #include +#define TF_CACHE_MAINT 0xfffff100 + +#define TF_CACHE_ENABLE 1 +#define TF_CACHE_DISABLE 2 + #define TF_SET_CPU_BOOT_ADDR_SMC 0xfffff200 #define TF_CPU_PM 0xfffffffc @@ -67,9 +74,48 @@ static int tf_prepare_idle(void) return 0; } +#ifdef CONFIG_CACHE_L2X0 +static void tf_cache_write_sec(unsigned long val, unsigned int reg) +{ + static u32 l2x0_way_mask = 0xff; + static u32 l2x0_aux_ctrl = 0; + + switch (reg) { + case L2X0_AUX_CTRL: + l2x0_aux_ctrl = val; + + if (l2x0_aux_ctrl & BIT(16)) + l2x0_way_mask = 0xffff; + break; + + case L2X0_CTRL: + if (val == L2X0_CTRL_EN) + tf_generic_smc(TF_CACHE_MAINT, TF_CACHE_ENABLE, + l2x0_aux_ctrl); + else + tf_generic_smc(TF_CACHE_MAINT, TF_CACHE_DISABLE, + l2x0_way_mask); + break; + + default: + break; + } +} + +static int tf_init_cache(void) +{ + outer_cache.write_sec = tf_cache_write_sec; + + return 0; +} +#endif /* CONFIG_CACHE_L2X0 */ + static const struct firmware_ops trusted_foundations_ops = { .set_cpu_boot_addr = tf_set_cpu_boot_addr, .prepare_idle = tf_prepare_idle, +#ifdef CONFIG_CACHE_L2X0 + .l2x0_init = tf_init_cache, +#endif }; void register_trusted_foundations(struct trusted_foundations_platform_data *pd) From patchwork Thu Aug 30 18:04:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 964047 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="pIi3+AiK"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 421VmC1y3xz9s1c for ; Fri, 31 Aug 2018 04:06:03 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727685AbeH3WIq (ORCPT ); Thu, 30 Aug 2018 18:08:46 -0400 Received: from mail-lf1-f67.google.com ([209.85.167.67]:39101 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727178AbeH3WIq (ORCPT ); Thu, 30 Aug 2018 18:08:46 -0400 Received: by mail-lf1-f67.google.com with SMTP id j201-v6so7924449lfg.6; Thu, 30 Aug 2018 11:05:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9v+w8nN/A6Frgkr+jrAIaiXhOfG+TiNL1K224zqxYZk=; b=pIi3+AiK9ewAMIkJqZDYucNokk/Gosab5ntB4JxFFMDbapjyBEbYhzYiqCT/Xx3EKs bywZGjBt+PLz8Rggd4mblS7XdyMi0kwi1FQF9l8xn5nib0WTVeiuVmR3Bo6cK+mTvsFo qOP2eSsH/gfE+eKaC3Ku7T4w9nw5btVhV6x2xOk3Qw48OvKzFuogRBPZX3U5iFJnHDxG PjA2PnQuJDzsgrLUAg5grqWClzD0kz82R7pf8CobYY76xqvyA2w8ZPLJY2z1ifX+cEOt oaoUtRhk5tWjS1b9pRiW1SFvZFZpNQdXCyuab/cBhervpCg5Xy23LuW4mIwsoX1TGc87 CSNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9v+w8nN/A6Frgkr+jrAIaiXhOfG+TiNL1K224zqxYZk=; b=MZW8xf/rNEK1e0GTyPJAz0naI8KktbxIopAu1g6rc5JHvtIrowfFK6xR+nPVO21wJ7 x3PjzpryiXUP79MKaPUKGNhvboglcQQaupskuaRFvPa4Mm7XZwQtNGZsDGwKpa8hkvu3 nLiqctYJ1FBerOoEkLl7+6mj4AERUeW+QBTkMzm97v5BgpnQSyxR3oZ9BabHniwZxQNc vQ1K91nrFNBvLFnqRxILZ+NMKwewwfLHl+u2W6pq3GoDgdCi5RO4qx1wnNVG41bt/D3z uwXQaXY6V6ZdGLjjEm2jQtngZyoWt4bHRMlpWJmdK8kY1cEAAXXcoEkETmJGtgRON/3B wAVg== X-Gm-Message-State: APzg51Cf71K4z+q0LS258CTnl0sgEgbN8P5G2+xoZfcHn/0IbucWX+A8 YUOivgnHyqdBNRkcbWGOr/E= X-Google-Smtp-Source: ANB0VdYyx2OSmgt+FtCUWSuqL4zUjelsB5aZ2FSWO5Vsp3ebXatJ1n8cNVxBDa2fElgvgNkrHSdFgw== X-Received: by 2002:a19:9bcc:: with SMTP id d195-v6mr8679683lfe.123.1535652323520; Thu, 30 Aug 2018 11:05:23 -0700 (PDT) Received: from localhost.localdomain (109-252-90-13.nat.spd-mgts.ru. [109.252.90.13]) by smtp.gmail.com with ESMTPSA id 13-v6sm1420789lfy.87.2018.08.30.11.05.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Aug 2018 11:05:23 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/8] ARM: trusted_foundations: Make prepare_idle call to take mode argument Date: Thu, 30 Aug 2018 21:04:15 +0300 Message-Id: <20180830180421.6415-3-digetx@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180830180421.6415-1-digetx@gmail.com> References: <20180830180421.6415-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The Trusted Foundations firmware call varies depending on the required suspend-mode. Make the firmware API to take the mode argument in order to expose all of the modes to firmware user. Signed-off-by: Dmitry Osipenko --- arch/arm/firmware/trusted_foundations.c | 29 ++++++++++++++++++++-- arch/arm/include/asm/firmware.h | 2 +- arch/arm/include/asm/trusted_foundations.h | 6 +++++ arch/arm/mach-tegra/cpuidle-tegra114.c | 3 ++- 4 files changed, 36 insertions(+), 4 deletions(-) diff --git a/arch/arm/firmware/trusted_foundations.c b/arch/arm/firmware/trusted_foundations.c index 3bf61a5933b9..c496f4cc49cb 100644 --- a/arch/arm/firmware/trusted_foundations.c +++ b/arch/arm/firmware/trusted_foundations.c @@ -67,9 +67,34 @@ static int tf_set_cpu_boot_addr(int cpu, unsigned long boot_addr) return 0; } -static int tf_prepare_idle(void) +static int tf_prepare_idle(unsigned long mode) { - tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S1_NOFLUSH_L2, cpu_boot_addr); + switch (mode) { + case TF_PM_MODE_LP0: + tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S3, cpu_boot_addr); + break; + + case TF_PM_MODE_LP1: + tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S2, cpu_boot_addr); + break; + + case TF_PM_MODE_LP1_NO_MC_CLK: + tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S2_NO_MC_CLK, + cpu_boot_addr); + break; + + case TF_PM_MODE_LP2: + tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S1, cpu_boot_addr); + break; + + case TF_PM_MODE_LP2_NOFLUSH_L2: + tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S1_NOFLUSH_L2, + cpu_boot_addr); + break; + + default: + return -EINVAL; + } return 0; } diff --git a/arch/arm/include/asm/firmware.h b/arch/arm/include/asm/firmware.h index 34c1d96ef46d..6698272bbcbf 100644 --- a/arch/arm/include/asm/firmware.h +++ b/arch/arm/include/asm/firmware.h @@ -24,7 +24,7 @@ struct firmware_ops { /* * Inform the firmware we intend to enter CPU idle mode */ - int (*prepare_idle)(void); + int (*prepare_idle)(unsigned long mode); /* * Enters CPU idle mode */ diff --git a/arch/arm/include/asm/trusted_foundations.h b/arch/arm/include/asm/trusted_foundations.h index 00748350cf72..cdd48ab7d191 100644 --- a/arch/arm/include/asm/trusted_foundations.h +++ b/arch/arm/include/asm/trusted_foundations.h @@ -32,6 +32,12 @@ #include #include +#define TF_PM_MODE_LP0 0 +#define TF_PM_MODE_LP1 1 +#define TF_PM_MODE_LP1_NO_MC_CLK 2 +#define TF_PM_MODE_LP2 3 +#define TF_PM_MODE_LP2_NOFLUSH_L2 4 + struct trusted_foundations_platform_data { unsigned int version_major; unsigned int version_minor; diff --git a/arch/arm/mach-tegra/cpuidle-tegra114.c b/arch/arm/mach-tegra/cpuidle-tegra114.c index e3fbcfedf845..3b9af4766cdf 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra114.c +++ b/arch/arm/mach-tegra/cpuidle-tegra114.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include "cpuidle.h" @@ -46,7 +47,7 @@ static int tegra114_idle_power_down(struct cpuidle_device *dev, tegra_set_cpu_in_lp2(); cpu_pm_enter(); - call_firmware_op(prepare_idle); + call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2); /* Do suspend by ourselves if the firmware does not implement it */ if (call_firmware_op(do_idle, 0) == -ENOSYS) From patchwork Thu Aug 30 18:04:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 964040 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="eN5QeZqH"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 421VlZ2577z9sD0 for ; Fri, 31 Aug 2018 04:05:30 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727749AbeH3WIr (ORCPT ); Thu, 30 Aug 2018 18:08:47 -0400 Received: from mail-lj1-f194.google.com ([209.85.208.194]:47067 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727622AbeH3WIq (ORCPT ); Thu, 30 Aug 2018 18:08:46 -0400 Received: by mail-lj1-f194.google.com with SMTP id 203-v6so7979278ljj.13; Thu, 30 Aug 2018 11:05:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jiYxzZYlLxYwiCUBX9+009bBH7xfhIzJMM0X4EjQePU=; b=eN5QeZqH0c30fW+dqI1cVGjL5h3cen2L7BX5R/YdiX9e6CjDPp56zIMrBr5vgIUfTE DXKc3smXef3p1HFW5VBOJwhVv9qvgSKNuaI92apbJEXa+wLS09JEvRwD09zTqzY4Sk35 v8ljY+1WmR0/ABtUBzul/e6279l5uU2g/CkPlDpDn6Nt11hBku3eAc8UuZxMOc+B17cd izfQAbVZjl1xRzfC+hM28H/49PSoW6HBMeeB5z2iQacRqQjtaWwPICDOIYJNuND2bHKw BHY1DP3FPKb4i/1PYVzuhirkO+dVOflNytZwd7SUrX5AaAaeD9g3K0A7kDRpVqa8yih4 XyPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jiYxzZYlLxYwiCUBX9+009bBH7xfhIzJMM0X4EjQePU=; b=BMxce7cHIq8nIsrM/qyEYzdEM1Yrc/REsP8WpoKwG7jFWTJ5lv2hVhm0NgUX+IcUe0 iroZC46mznYIke+vEzX9ELr4X/nr949dh1c2M/41btTeFwYY8xR75k/veNnzV8vL46DN 5DCJVIwGT8qL/NzUPQGRPuUepyjL2VdICY5fOMPZgfX6qR43KfUiSTihvYfURdFbu5Fu bceD/REuMJQ051ur8HVYtCC0jgGmRx0Y0VfcbAa6sdgA4Fgljkexlxx9cPLsL/nPhVZE A295IUy0BfQ4+RA6b1ye8BYYxxIGBPTReQT2X7UOAo6Lv6K1pNcr7e9quzdmwjf7S25S Kugw== X-Gm-Message-State: APzg51ACV/D3jXwaFSCgX8WWRWI1HGeYJbIqvCw4Xby3u9wyg07AIogc dSPGb3eYR1I8rzTBVMO0U/I= X-Google-Smtp-Source: ANB0VdYhPafGlqOEdbXy1bmb80xp5zicWVfD2Unzt2ol5lSahKedAC18SzHXQTGtjCbtre2bq5FQUw== X-Received: by 2002:a2e:9198:: with SMTP id f24-v6mr7728460ljg.64.1535652324441; Thu, 30 Aug 2018 11:05:24 -0700 (PDT) Received: from localhost.localdomain (109-252-90-13.nat.spd-mgts.ru. [109.252.90.13]) by smtp.gmail.com with ESMTPSA id 13-v6sm1420789lfy.87.2018.08.30.11.05.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Aug 2018 11:05:23 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/8] ARM: trusted_foundations: Provide information about whether firmware is registered Date: Thu, 30 Aug 2018 21:04:16 +0300 Message-Id: <20180830180421.6415-4-digetx@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180830180421.6415-1-digetx@gmail.com> References: <20180830180421.6415-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add a helper that provides information about whether Trusted Foundations firmware operations have been registered. Signed-off-by: Dmitry Osipenko --- arch/arm/firmware/trusted_foundations.c | 5 +++++ arch/arm/include/asm/trusted_foundations.h | 7 +++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/firmware/trusted_foundations.c b/arch/arm/firmware/trusted_foundations.c index c496f4cc49cb..d795ed83a3cd 100644 --- a/arch/arm/firmware/trusted_foundations.c +++ b/arch/arm/firmware/trusted_foundations.c @@ -172,3 +172,8 @@ void of_register_trusted_foundations(void) panic("Trusted Foundation: missing version-minor property\n"); register_trusted_foundations(&pdata); } + +bool trusted_foundations_registered(void) +{ + return firmware_ops == &trusted_foundations_ops; +} diff --git a/arch/arm/include/asm/trusted_foundations.h b/arch/arm/include/asm/trusted_foundations.h index cdd48ab7d191..3f23fa493db6 100644 --- a/arch/arm/include/asm/trusted_foundations.h +++ b/arch/arm/include/asm/trusted_foundations.h @@ -31,6 +31,7 @@ #include #include #include +#include #define TF_PM_MODE_LP0 0 #define TF_PM_MODE_LP1 1 @@ -47,6 +48,7 @@ struct trusted_foundations_platform_data { void register_trusted_foundations(struct trusted_foundations_platform_data *pd); void of_register_trusted_foundations(void); +bool trusted_foundations_registered(void); #else /* CONFIG_TRUSTED_FOUNDATIONS */ @@ -74,6 +76,11 @@ static inline void of_register_trusted_foundations(void) if (of_find_compatible_node(NULL, NULL, "tlm,trusted-foundations")) register_trusted_foundations(NULL); } + +static inline bool trusted_foundations_registered(void) +{ + return false; +} #endif /* CONFIG_TRUSTED_FOUNDATIONS */ #endif From patchwork Thu Aug 30 18:04:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 964045 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="M44SoKfT"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 421Vm13kQ0z9s3C for ; Fri, 31 Aug 2018 04:05:53 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727751AbeH3WIs (ORCPT ); Thu, 30 Aug 2018 18:08:48 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:45017 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727285AbeH3WIr (ORCPT ); Thu, 30 Aug 2018 18:08:47 -0400 Received: by mail-lj1-f195.google.com with SMTP id q127-v6so8003790ljq.11; Thu, 30 Aug 2018 11:05:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bqXBzGttmLbwA1tWVcC4ztFYtQ17JkPgOJF7TeCjrQM=; b=M44SoKfTQYxXncRXe+sQpbpCcP6pB/OL8hJhMfpeIkPLnG7cMvIJkNOM3KpfbP2Koj sGsNxr7iIgyeBaaCHE3MSuhUu24lBDY+9T3DU0nRSiIVsN1X8lc8lOKVZV1kWXEGfZ39 O/462rzfb66PswKqggEJDr4L8+p4W0U5kU31haTIUJBX8Is05loSZOAcxMqyHXKkY+BM +7jzPXmMwM0uvUxpV/GAeXFJRrx5DbWlAsYRV+qvkb2joqab0gvdWK5OIcwWOQW15JCo UgbulB/EmgR3PF/dpYzj9YSdpCTQLcQiAhjfVm7LATQImbZuLqHLJd4kJOyiDu6/9r3r mtLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bqXBzGttmLbwA1tWVcC4ztFYtQ17JkPgOJF7TeCjrQM=; b=KQTrbrYN/S4O3N0Rj6szilr5qOxjAkg2cLJ7BjeAqcC25BPAuAtuz8M45FynQ5Odv7 uGFsofULtPM/MsMAuGKyWIMVoq6+hbaqXWYv4C5wngUv98g48C8+sAI6XtbEpv4xDKqW 0xt6DI6I0LOapAZWCOr7biHbxwjSb7/0T6AlLAk/V14oSyMCJfZmYanGOpgRHAeIR9UU FvRxCbaumFbwYjgi+/5s/gp7yne3i27zQHvJPQkvOah6N0N6YtfBWoNo6v6wKjLNGaiL RlyHDyJ6JTP5z4QkO5w1uy1R3ue26XrhOc5QTc5KghZWQUPxcJJvyb5TTu6zyMTZKLBa LmNA== X-Gm-Message-State: APzg51DR7UBH3XTdHoq9hYlUyRfO0QdJAZeBY7hhO+4YJw0/dB1j2J8F lHkSTYzv/Yt/JSS8YZVB9+8= X-Google-Smtp-Source: ANB0VdbxonLX3/tHfylXGtFG76UKRY87tiyShDKVhxYJyauhL0lsJJ3vB2b1tqj3CTwHtyBLN/rknQ== X-Received: by 2002:a2e:990b:: with SMTP id v11-v6mr7955986lji.87.1535652325589; Thu, 30 Aug 2018 11:05:25 -0700 (PDT) Received: from localhost.localdomain (109-252-90-13.nat.spd-mgts.ru. [109.252.90.13]) by smtp.gmail.com with ESMTPSA id 13-v6sm1420789lfy.87.2018.08.30.11.05.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Aug 2018 11:05:24 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/8] ARM: tegra: Setup L2 cache using Trusted Foundations firmware Date: Thu, 30 Aug 2018 21:04:17 +0300 Message-Id: <20180830180421.6415-5-digetx@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180830180421.6415-1-digetx@gmail.com> References: <20180830180421.6415-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org On Tegra30 L2 cache should be initialized using firmware call if CPU is running in insecure mode. Initialize L2 cache and setup the outer-cache callbacks in early boot using the firmware API. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/tegra.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index f9587be48235..67d8ae60ac67 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -38,6 +38,7 @@ #include #include +#include #include #include #include @@ -70,9 +71,18 @@ u32 tegra_uart_config[3] = { 0, }; +static void __init tegra_trusted_foundations_l2x0_cache_init(void) +{ + if (IS_ENABLED(CONFIG_CACHE_L2X0) && + IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && + of_machine_is_compatible("nvidia,tegra30")) + call_firmware_op(l2x0_init); +} + static void __init tegra_init_early(void) { of_register_trusted_foundations(); + tegra_trusted_foundations_l2x0_cache_init(); tegra_cpu_reset_handler_init(); } From patchwork Thu Aug 30 18:04:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 964044 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="TZFuR7Fa"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 421Vly4bsSz9s3C for ; Fri, 31 Aug 2018 04:05:50 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727792AbeH3WIu (ORCPT ); Thu, 30 Aug 2018 18:08:50 -0400 Received: from mail-lj1-f194.google.com ([209.85.208.194]:35673 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727178AbeH3WIt (ORCPT ); Thu, 30 Aug 2018 18:08:49 -0400 Received: by mail-lj1-f194.google.com with SMTP id p10-v6so8033335ljg.2; Thu, 30 Aug 2018 11:05:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wxnbvPyqV9MwtYpRFTERECdapTydYiOKIVc11OZOZ1g=; b=TZFuR7FaQcOV/na0BmDQRYbWwKbmhq2PMpeO/OOVSdvqtVCtgCI7HGUS8wGgOTqpTG xiGoecj/+SEZStzrteI9Bta2afXRe6dGC2MD9xhLudDe11c7cDHrWWAjtaVWDvsMlJF0 DUDsw+28zG4rV0Bzb2sJoHf1jvRHZLoK33fRGaOBjyLIUDVglPEyAbamk9rhaysNoZus q+9iBg/lQlcBiBKWtPXBpV4eJag3PwraT56iHNxKakPB2/H4WJ84l6woLPyGke/+bnug r0/ZH/RW9wNmktfjI6AKeoCeDnPrJLnHdo/0GJkVCgkUPCZGkxJKuQJ8EMIeSncS/TP4 lQpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wxnbvPyqV9MwtYpRFTERECdapTydYiOKIVc11OZOZ1g=; b=nU1eO6HrjMQrV6iGfJ92kh5j8ZbKZSSvayigmCRdmZmpyuVCmSksNNl9l9kNSDEUUk mtIm8PeWPyuYGFEn7LU5O8LNx2XfBuly+S/HV6hfgaOaPvJ6WqK4/N89pTbJSRtBG7VW bO4HqcjTnYHa3TIsCD0LB+SbjuYQmRCVh3dkHmiEIfyBZ/fYRAg3iic7CgNWotz7tjln 0GnSEcb7PfN7VGmRAmLG2AKFeCqFQf15olTAI+UGL9+K8PNydCptv+xDz3uZmAAmjrXZ en8buKHQ/Y3wTYBmjbGnKm8iDD+kEyCvb22C5YqFeQ/8eTc4hjeUlPtuQLaTiYGawSHE Ojwg== X-Gm-Message-State: APzg51Bz8jDGjUf1O1RkDf5Q3MmLT5F0aJaLVkP/OwhhIoN5MmUKfl2u Ib+WCzuypJLOGiyqfteI2Qk= X-Google-Smtp-Source: ANB0Vdb8b97qS7fwtXan4rU2YGPlpcWmk56YL4hQGawOliBBQp1+rozAC8yfsFKESFnQ/P953m2M1A== X-Received: by 2002:a2e:6a04:: with SMTP id f4-v6mr8472532ljc.109.1535652326528; Thu, 30 Aug 2018 11:05:26 -0700 (PDT) Received: from localhost.localdomain (109-252-90-13.nat.spd-mgts.ru. [109.252.90.13]) by smtp.gmail.com with ESMTPSA id 13-v6sm1420789lfy.87.2018.08.30.11.05.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Aug 2018 11:05:26 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 5/8] ARM: tegra: Don't apply CPU erratas in insecure mode Date: Thu, 30 Aug 2018 21:04:18 +0300 Message-Id: <20180830180421.6415-6-digetx@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180830180421.6415-1-digetx@gmail.com> References: <20180830180421.6415-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org CPU isn't allowed to touch secure registers while running under secure monitor. Hence skip applying of CPU erratas in the reset handler if Trusted Foundations firmware presents. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/reset-handler.S | 24 ++++++++++++------------ arch/arm/mach-tegra/reset.c | 3 +++ arch/arm/mach-tegra/reset.h | 9 +++++++-- arch/arm/mach-tegra/sleep-tegra20.S | 4 ++++ 4 files changed, 26 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index 805f306fa6f7..a9f13230da2f 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -29,8 +29,6 @@ #define PMC_SCRATCH41 0x140 -#define RESET_DATA(x) ((TEGRA_RESET_##x)*4) - #ifdef CONFIG_PM_SLEEP /* * tegra_resume @@ -121,6 +119,12 @@ ENTRY(__tegra_cpu_reset_handler) cpsid aif, 0x13 @ SVC mode, interrupts disabled tegra_get_soc_id TEGRA_APB_MISC_BASE, r6 + + adr r12, __tegra_cpu_reset_handler_data + ldr r5, [r12, #RESET_DATA(TF_PRESENT)] + cmp r5, #0 + bne after_errata + #ifdef CONFIG_ARCH_TEGRA_2x_SOC t20_check: cmp r6, #TEGRA20 @@ -155,7 +159,6 @@ after_errata: and r10, r10, #0x3 @ R10 = CPU number mov r11, #1 mov r11, r11, lsl r10 @ R11 = CPU mask - adr r12, __tegra_cpu_reset_handler_data #ifdef CONFIG_SMP /* Does the OS know about this CPU? */ @@ -169,10 +172,9 @@ after_errata: cmp r6, #TEGRA20 bne 1f /* If not CPU0, don't let CPU0 reset CPU1 now that CPU1 is coming up. */ - mov32 r5, TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET mov r0, #CPU_NOT_RESETTABLE cmp r10, #0 - strneb r0, [r5, #__tegra20_cpu1_resettable_status_offset] + strneb r0, [r12, #RESET_DATA(RESETTABLE_STATUS)] 1: #endif @@ -277,14 +279,12 @@ ENDPROC(__tegra_cpu_reset_handler) .align L1_CACHE_SHIFT .type __tegra_cpu_reset_handler_data, %object .globl __tegra_cpu_reset_handler_data + .globl __tegra_cpu_reset_handler_data_offset + .equ __tegra_cpu_reset_handler_data_offset, \ + . - __tegra_cpu_reset_handler_start __tegra_cpu_reset_handler_data: - .rept TEGRA_RESET_DATA_SIZE - .long 0 + .rept TEGRA_RESET_DATA_SIZE + .long 0 .endr - .globl __tegra20_cpu1_resettable_status_offset - .equ __tegra20_cpu1_resettable_status_offset, \ - . - __tegra_cpu_reset_handler_start - .byte 0 .align L1_CACHE_SHIFT - ENTRY(__tegra_cpu_reset_handler_end) diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c index dc558892753c..b02ae7699842 100644 --- a/arch/arm/mach-tegra/reset.c +++ b/arch/arm/mach-tegra/reset.c @@ -24,6 +24,7 @@ #include #include #include +#include #include "iomap.h" #include "irammap.h" @@ -89,6 +90,8 @@ static void __init tegra_cpu_reset_handler_enable(void) void __init tegra_cpu_reset_handler_init(void) { + __tegra_cpu_reset_handler_data[TEGRA_RESET_TF_PRESENT] = + trusted_foundations_registered(); #ifdef CONFIG_SMP __tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_PRESENT] = diff --git a/arch/arm/mach-tegra/reset.h b/arch/arm/mach-tegra/reset.h index 9c479c7925b8..db0e6b3097ab 100644 --- a/arch/arm/mach-tegra/reset.h +++ b/arch/arm/mach-tegra/reset.h @@ -25,7 +25,11 @@ #define TEGRA_RESET_STARTUP_SECONDARY 3 #define TEGRA_RESET_STARTUP_LP2 4 #define TEGRA_RESET_STARTUP_LP1 5 -#define TEGRA_RESET_DATA_SIZE 6 +#define TEGRA_RESET_RESETTABLE_STATUS 6 +#define TEGRA_RESET_TF_PRESENT 7 +#define TEGRA_RESET_DATA_SIZE 8 + +#define RESET_DATA(x) ((TEGRA_RESET_##x)*4) #ifndef __ASSEMBLY__ @@ -49,7 +53,8 @@ void __tegra_cpu_reset_handler_end(void); (u32)__tegra_cpu_reset_handler_start))) #define tegra20_cpu1_resettable_status \ (IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \ - (u32)__tegra20_cpu1_resettable_status_offset)) + ((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_RESETTABLE_STATUS] - \ + (u32)__tegra_cpu_reset_handler_start))) #endif #define tegra_cpu_reset_handler_offset \ diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S index 5c8e638ee51a..11f423e4a263 100644 --- a/arch/arm/mach-tegra/sleep-tegra20.S +++ b/arch/arm/mach-tegra/sleep-tegra20.S @@ -28,6 +28,7 @@ #include #include "irammap.h" +#include "reset.h" #include "sleep.h" #define EMC_CFG 0xc @@ -54,6 +55,9 @@ #define APB_MISC_XM2CFGCPADCTRL2 0x8e4 #define APB_MISC_XM2CFGDPADCTRL2 0x8e8 +#define __tegra20_cpu1_resettable_status_offset \ + (__tegra_cpu_reset_handler_data_offset + RESET_DATA(RESETTABLE_STATUS)) + .macro pll_enable, rd, r_car_base, pll_base ldr \rd, [\r_car_base, #\pll_base] tst \rd, #(1 << 30) From patchwork Thu Aug 30 18:04:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 964041 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="EbqdchwX"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 421Vlc0Zfxz9sD0 for ; Fri, 31 Aug 2018 04:05:32 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727790AbeH3WIu (ORCPT ); Thu, 30 Aug 2018 18:08:50 -0400 Received: from mail-lf1-f68.google.com ([209.85.167.68]:43824 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727622AbeH3WIu (ORCPT ); Thu, 30 Aug 2018 18:08:50 -0400 Received: by mail-lf1-f68.google.com with SMTP id h64-v6so7899760lfi.10; Thu, 30 Aug 2018 11:05:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tcKFedpKwPfw1JlfTbqpZJDN1CaZbc+G2vd2PvtCtNc=; b=EbqdchwX8jfqttxqyoqz3SvSqTfR6ixXhWKIzVJajiFsakwjg3L1rVqw21GaVokSb6 xbdiw2TD14a6R6gibFyD9R6lmApJA+KYGx29F2Q7zfxkcv9CJ9SLdBTQ82PIqCIrLqs0 GIQvgo5wvStudDFYkAIi40lsjEN9VOwKUm6IX4sKYf9T0K+NOboGd1CLBmj+YSOXG6pi llnwGHLL7mFZOc7lb2894+kjgkYzjaMODbZvuG61IYIsMbDbe+c6fEo3Kma9tgxBe9I7 /sUyvRok4O0h7qhGxfDM4LrXPR/YKS6A3kpPheNodqEfdLwS0nkYwreqGcs3SimRIIWG Psqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tcKFedpKwPfw1JlfTbqpZJDN1CaZbc+G2vd2PvtCtNc=; b=JWEdG4kSkM2FOjAdURwBwkL/4nUhW8jHQggrPA+jF+J7G9/zAhHQfZVJ6zdxjBLNQF aoeLOATyxMmBmt5XlAwJFhdJf2KAocGFnAlFo5z6iK6uZJrYNitgjrjkyvp5V6vZqEVb dVanLAN/yOhH/MA1chyco1zGdmN5w7o+IuZbkQQH4Og9hsH0+qRAaY59KkE7MQlqjU3Z 7krkI3I9dkWmNRBdEtbAZNYhPTJW4YupIAcAAkQc7l2NO9kYIZODvhRmualInbPndJIq rJ4CnHTJzW3aRqKELVpdgqHPgcYAPgh4cZ2GSrM2crTYPSSIyuYbymuD/WmJVM7ocXDA gedQ== X-Gm-Message-State: APzg51A2Jc3ai+Z/s/B+TJmTR1B4QracalLQM0gPfnw4gGa+8HsLkJ0o myq70rzxnjD/7sdESr0NMJY= X-Google-Smtp-Source: ANB0Vdbxv7aZL4XC/1eeroHssT9Nml9X/ny3YSGiEX30upk8nCv5jMSNUHEVN4pIdrpbNeELdmF46g== X-Received: by 2002:a19:c38b:: with SMTP id t133-v6mr8527066lff.7.1535652327705; Thu, 30 Aug 2018 11:05:27 -0700 (PDT) Received: from localhost.localdomain (109-252-90-13.nat.spd-mgts.ru. [109.252.90.13]) by smtp.gmail.com with ESMTPSA id 13-v6sm1420789lfy.87.2018.08.30.11.05.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Aug 2018 11:05:27 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 6/8] ARM: tegra: Always boot CPU in ARM-mode Date: Thu, 30 Aug 2018 21:04:19 +0300 Message-Id: <20180830180421.6415-7-digetx@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180830180421.6415-1-digetx@gmail.com> References: <20180830180421.6415-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org CPU always jumps into reset handler in ARM-mode from the Trusted Foundations firmware, hence let's make CPU to always jump into kernel in ARM-mode regardless of the firmware presence to support. This is required to make Thumb-2 kernel working with the Trusted Foundations firmware on Tegra30. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/reset-handler.S | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index a9f13230da2f..555c652f5a07 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -20,6 +20,7 @@ #include #include +#include #include #include @@ -112,10 +113,20 @@ ENTRY(__tegra_cpu_reset_handler_start) * NOTE: This code is copied to IRAM. All code and data accesses * must be position-independent. */ - + .arm .align L1_CACHE_SHIFT ENTRY(__tegra_cpu_reset_handler) + /* + * Tegra30 ignores first bit of the reset vector and always jumps + * into kernel in .ARM mode from the firmware, hence force the mode + * switch if kernel is compiled in Thumb-2. + */ + THUMB( badr r0, 1f ) + THUMB( bx r0 ) + THUMB( .thumb ) + THUMB( 1: ) + cpsid aif, 0x13 @ SVC mode, interrupts disabled tegra_get_soc_id TEGRA_APB_MISC_BASE, r6 @@ -215,7 +226,7 @@ __no_cpu0_chk: ldr lr, [r12, #RESET_DATA(STARTUP_SECONDARY)] cmp lr, #0 bleq __die @ no secondary startup handler - bx lr + ret lr #endif /* From patchwork Thu Aug 30 18:04:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 964043 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="jsABhjJl"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 421Vlw0k1wz9s3C for ; Fri, 31 Aug 2018 04:05:48 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727814AbeH3WIv (ORCPT ); Thu, 30 Aug 2018 18:08:51 -0400 Received: from mail-lf1-f67.google.com ([209.85.167.67]:45926 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727285AbeH3WIu (ORCPT ); Thu, 30 Aug 2018 18:08:50 -0400 Received: by mail-lf1-f67.google.com with SMTP id r4-v6so7913180lff.12; Thu, 30 Aug 2018 11:05:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gzoUL224jX0LdcQuHl3QNpfOd2p4daBp/oJP6u+IJQI=; b=jsABhjJl5ipsNtvgdx0BajWqOKPpYsM/a6XaMVYu+7hd6M3jsaVqy7ZIXZHzBJUW4j UgafmTy9YBHe9eP0jGlnOhnnqVc2ywZi3zuKZNlpqaf8dxsowZF5gNuC7C5SmNQwmEvh 5qY7iGDflaLNk+iyj2zf/jy4XetQnQf5oSqtU3DLQ6ChjQ29Nm20TpyWUlTWJWNYapAi fMh4Oz80TULiArj+jbk6Skzsrb16OL0W93RGHgRQRZbPxw7TBcgtx0CD7TZjR7XxtnZC mQnjE1mUZY7M+JgDVC/sHwMHIbTKYPfgo6viLYf9A/niX3bcYbz9QnShnSdx6gDWLD+B OOrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gzoUL224jX0LdcQuHl3QNpfOd2p4daBp/oJP6u+IJQI=; b=Axs8p5FZrCldWxh/2ZDDRXZQg6KDNQYi16AtybUed1ucjUI3hJ4IQ8uOHUSq5HcJDg GF23YHJd+638hDf1T+1xRpUyYuf5W5zoeZ5zbDbrydiOROqQZDNHL8gUliARFWHSwZ+r yBo/JGtXglgjSnr/FB/47prir16FSp6vqCHjgElNBVt/x2aInP6tUwlf0bvaVmU6aCvJ TlJ/ZV7MbLCEUo51Xjq4gEfqfB9mhxLIkA811VSuKZbYQHXqXpXIwy3XcRuBAqGX3FPb qEUkoCoBDL4rqsFO6BVOdHYLR42B028PFcgxRwAjSr+6QVKBM1QCZNofFNNR9cgNMpwP xnIQ== X-Gm-Message-State: APzg51CGnD+4bLITguJdNzy+yPTLdp/HXoyCIfs+u+q3590/QvuXzAl4 NE8HrmwbSaCnLg3JeyCQe2Q= X-Google-Smtp-Source: ANB0VdaNiDWWi1NIzkr9GyFQ71be5Vr5ImkYyEJcF4crdGGp3fnfunSq3K9kNy8Z4NZ3PIX0jhQT4g== X-Received: by 2002:a19:a345:: with SMTP id m66-v6mr2280499lfe.23.1535652328614; Thu, 30 Aug 2018 11:05:28 -0700 (PDT) Received: from localhost.localdomain (109-252-90-13.nat.spd-mgts.ru. [109.252.90.13]) by smtp.gmail.com with ESMTPSA id 13-v6sm1420789lfy.87.2018.08.30.11.05.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Aug 2018 11:05:28 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 7/8] ARM: tegra: Support L2 cache maintenance done via firmware Date: Thu, 30 Aug 2018 21:04:20 +0300 Message-Id: <20180830180421.6415-8-digetx@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180830180421.6415-1-digetx@gmail.com> References: <20180830180421.6415-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Trusted Foundations firmware require MMU to be enabled for L2 cache maintenance on Tegra30, hence perform the maintenance early-late on suspend-resume respectively. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/pm.c | 36 +++++++++++++++++++++++++++++ arch/arm/mach-tegra/reset-handler.S | 8 ++----- arch/arm/mach-tegra/sleep.S | 4 ++++ 3 files changed, 42 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 1ad5719779b0..66c8cd63dd86 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -38,6 +38,7 @@ #include #include #include +#include #include "iomap.h" #include "pm.h" @@ -195,8 +196,27 @@ void tegra_idle_lp2_last(void) cpu_cluster_pm_enter(); suspend_cpu_complex(); + /* + * L2 cache disabling using kernel API only allowed when all + * secondary CPU's are offline. Cache have to be disabled early + * if cache maintenance is done via Trusted Foundations firmware. + * Note that CPUIDLE won't ever enter powergate on Tegra30 if any + * of secondary CPU's is online and this is the LP2 codepath only + * for Tegra20/30. + */ + if (trusted_foundations_registered()) + outer_disable(); + cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, &tegra_sleep_cpu); + /* + * Resume L2 cache if it wasn't re-enabled early during resume, + * which is the case for Tegra30 that has to re-enable the cache + * via firmware call. In other cases cache is already enabled and + * hence re-enabling is a no-op. + */ + outer_resume(); + restore_cpu_complex(); cpu_cluster_pm_exit(); } @@ -340,8 +360,24 @@ static int tegra_suspend_enter(suspend_state_t state) break; } + /* + * Cache have to be disabled early if cache maintenance is done + * via Trusted Foundations firmware. Otherwise this is a no-op, + * like on Tegra114+. + */ + if (trusted_foundations_registered()) + outer_disable(); + cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, tegra_sleep_func); + /* + * Resume L2 cache if it wasn't re-enabled early during resume, + * which is the case for Tegra30 that has to re-enable the cache + * via firmware call. In other cases cache is already enabled and + * hence re-enabling is a no-op. + */ + outer_resume(); + switch (mode) { case TEGRA_SUSPEND_LP1: tegra_suspend_exit_lp1(); diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index 555c652f5a07..4973ea053bd7 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -69,7 +69,7 @@ ENTRY(tegra_resume) mov32 r9, 0xc09 cmp r8, r9 - bne end_ca9_scu_l2_resume + bne end_ca9_scu_resume #ifdef CONFIG_HAVE_ARM_SCU /* enable SCU */ mov32 r0, TEGRA_ARM_PERIF_BASE @@ -78,11 +78,7 @@ ENTRY(tegra_resume) str r1, [r0] #endif -#ifdef CONFIG_CACHE_L2X0 - /* L2 cache resume & re-enable */ - bl l2c310_early_resume -#endif -end_ca9_scu_l2_resume: +end_ca9_scu_resume: mov32 r9, 0xc0f cmp r8, r9 bleq tegra_init_l2_for_a15 diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S index 5e3496753df1..b96126fe5dc5 100644 --- a/arch/arm/mach-tegra/sleep.S +++ b/arch/arm/mach-tegra/sleep.S @@ -132,8 +132,12 @@ ENTRY(tegra_shut_off_mmu) #ifdef CONFIG_CACHE_L2X0 /* Disable L2 cache */ check_cpu_part_num 0xc09, r9, r10 + retne r0 + movweq r2, #:lower16:(TEGRA_ARM_PERIF_BASE + 0x3000) movteq r2, #:upper16:(TEGRA_ARM_PERIF_BASE + 0x3000) + ldr r3, [r2, #L2X0_CTRL] + cmp r3, #1 moveq r3, #0 streq r3, [r2, #L2X0_CTRL] #endif From patchwork Thu Aug 30 18:04:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 964042 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="WVF+g8T5"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 421Vlq1CHzz9s1x for ; Fri, 31 Aug 2018 04:05:43 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727285AbeH3WI4 (ORCPT ); Thu, 30 Aug 2018 18:08:56 -0400 Received: from mail-lj1-f193.google.com ([209.85.208.193]:34562 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727773AbeH3WIv (ORCPT ); Thu, 30 Aug 2018 18:08:51 -0400 Received: by mail-lj1-f193.google.com with SMTP id f8-v6so8019663ljk.1; Thu, 30 Aug 2018 11:05:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=8oMFGxXF6QUlJj5F31ofFC/byB4gOQFq079DGk4vXTU=; b=WVF+g8T56Wa5yvSO7+HtBo/1wWJw2I+/Gt1i4ISB6wcx6pPaYrW5Mk5YrslapLh1XV RoyXYDloAFZb4EYqwmDJV4M9Ui7vvFW4LKb1oSO031/VQq8XnI0vkKc3JjXOW+rDCoG0 GRehMi0xhBYoBo2jet0h/k5GwJnak7lPjYSa8IQgPwQgWh2YDuIFmGQ96colrthjlnzO GdSNp5ZkszVDbqJYTsUr2yl+iGb5uwyHrTeY6ILIbxWsWnQu15oOzG3OEh5F2rk4iKoX yXTZJPGfzsfFhxAFS8D1PLzYbiJvh2KBz9TLr5Ug7OqXo2idlqv9fS/uX+hLWKlt/fpd R/Zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8oMFGxXF6QUlJj5F31ofFC/byB4gOQFq079DGk4vXTU=; b=MYy7mtMqZpUNCrOgMaVR21Q7Q0+ZDHuL+CN5E0TRLUdtwHKKcCiGlge0StTwgcwRAu njd0m6Me7T50hulweio5oUbdQdEL9kjCwWPdB+M3tbDnXi1HRK39sJpBSYve/ESZbNuE GRE33crrtYXQcUGhoT5bDscbyAhbE9j4khH4bys7A4Ix88ha4vXSYXJMJj7Ht+81cn4p FgBNzA3Qw6HaSzkhhObn3qvrnLJUeRynFYvyxvCr12GPCx1+XFR3jcEhla10mmZP78Ft Ni/hayAbDeZk6SSKZ36839Or5U0Ikoq9tiHZTf14WwsX2UxgQB3qNpqeJwCvYfDaZGzb JbyA== X-Gm-Message-State: APzg51BTVvzCgxDU+m/7PLgUS6Pj8rbyzYbVjxEbUE32irJwUUm1Exhy XyoAJvJ3oADL94rZSBIg+SY= X-Google-Smtp-Source: ANB0VdbuSB/JaEZO4HXFI+IdiQJOsLmtRkKAAAwzNcz8e2DHekyQh9V3BpF4V53XDh+4HW8SBgCNaw== X-Received: by 2002:a2e:85d5:: with SMTP id h21-v6mr7864981ljj.103.1535652329646; Thu, 30 Aug 2018 11:05:29 -0700 (PDT) Received: from localhost.localdomain (109-252-90-13.nat.spd-mgts.ru. [109.252.90.13]) by smtp.gmail.com with ESMTPSA id 13-v6sm1420789lfy.87.2018.08.30.11.05.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Aug 2018 11:05:29 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 8/8] ARM: tegra: Add firmware calls required for suspend-resume Date: Thu, 30 Aug 2018 21:04:21 +0300 Message-Id: <20180830180421.6415-9-digetx@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180830180421.6415-1-digetx@gmail.com> References: <20180830180421.6415-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org In order to resume CPU from suspend via trusted Foundations firmware, the LP1/LP2 boot vectors shall be specified using the firmware calls. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/pm.c | 7 ++++++ arch/arm/mach-tegra/reset-handler.S | 33 +++++++++++++++++++++++++++-- 2 files changed, 38 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 66c8cd63dd86..12341ffabb99 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -33,6 +33,7 @@ #include #include +#include #include #include #include @@ -150,6 +151,10 @@ bool tegra_set_cpu_in_lp2(void) tegra20_cpu_set_resettable_soon(); spin_unlock(&tegra_lp2_lock); + + if (last_cpu) + call_firmware_op(prepare_idle, TF_PM_MODE_LP2); + return last_cpu; } @@ -316,6 +321,8 @@ static void tegra_suspend_enter_lp1(void) tegra_lp1_iram.start_addr, iram_save_size); *((u32 *)tegra_cpu_lp1_mask) = 1; + + call_firmware_op(prepare_idle, TF_PM_MODE_LP1); } static void tegra_suspend_exit_lp1(void) diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index 4973ea053bd7..0e208b2e246e 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -69,7 +69,7 @@ ENTRY(tegra_resume) mov32 r9, 0xc09 cmp r8, r9 - bne end_ca9_scu_resume + bne end_ca9_scu_l2_resume #ifdef CONFIG_HAVE_ARM_SCU /* enable SCU */ mov32 r0, TEGRA_ARM_PERIF_BASE @@ -77,14 +77,43 @@ ENTRY(tegra_resume) orr r1, r1, #1 str r1, [r0] #endif + bl tegra_resume_trusted_foundations -end_ca9_scu_resume: +#ifdef CONFIG_CACHE_L2X0 + /* L2 cache resume & re-enable */ + bleq l2c310_early_resume @ No, resume cache early +#endif +end_ca9_scu_l2_resume: mov32 r9, 0xc0f cmp r8, r9 bleq tegra_init_l2_for_a15 b cpu_resume ENDPROC(tegra_resume) + +/* + * tegra_resume_trusted_foundations + * + * Trusted Foundations firmware initialization. + * + * Doesn't return if firmware presents. + * Corrupted registers: r1, r2 + */ +ENTRY(tegra_resume_trusted_foundations) + /* Check whether Trusted Foundations firmware presents. */ + mov32 r2, TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + ldr r1, =__tegra_cpu_reset_handler_data_offset + \ + RESET_DATA(TF_PRESENT) + ldr r1, [r2, r1] + cmp r1, #0 + reteq lr + + .arch_extension sec + /* First call after suspend wakes firmware. No arguments required. */ + smc #0 + + b cpu_resume +ENDPROC(tegra_resume_trusted_foundations) #endif .align L1_CACHE_SHIFT