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[178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.15.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:15:22 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:19 +0200 Message-Id: <20180826231332.2491-2-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> X-Mailman-Approved-At: Mon, 27 Aug 2018 01:08:09 +0000 Cc: Baruch Siach , Alexander Graf , Miquel Raynal , Marek Vasut , Eugeniu Rosca , Stephen Warren , Heinrich Schuchardt , Michal Simek , Maxime Ripard , Raghav Dogra , Jagan Teki , Stefan Agner , Eugeniu Rosca , Andre Przywara , Andy Shevchenko , Joe Hershberger , Tom Warren , Fabio Estevam Subject: [U-Boot] [PATCH v2 01/13] UBSAN: run-time undefined behavior sanity checker X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Import Undefined Behavior SANitizer from Linux Kernel v4.18, as implemented by Andrey Ryabinin . Roughly, the UBSAN development history in Linux kernel looks like: v4.18 3ca17b1f3628 ("lib/ubsan: remove null-pointer checks") v4.17-rc1 317506009216 ("lib/test_ubsan.c: make test_ubsan_misaligned_access() static") v4.17-rc1 854686f4edf4 ("lib: add testing module for UBSAN") v4.16-rc1 bac7a1fff792 ("lib/ubsan: remove returns-nonnull-attribute checks") v4.16-rc1 42440c1f9911 ("lib/ubsan: add type mismatch handler for new GCC/Clang") v4.16-rc1 b8fe1120b4ba ("lib/ubsan.c: s/missaligned/misaligned/") v4.10-rc1 0462554707d6 ("Kconfig: lib/Kconfig.ubsan fix reference to ubsan documentation") v4.9-rc5 a76bcf557ef4 ("Kbuild: enable -Wmaybe-uninitialized warning for "make W=1"") v4.9-rc1 725c4d22bbc4 ("ubsan: allow to disable the null sanitizer") v4.9-rc1 1ead009cd622 ("docs: sphinxify ubsan.txt and move it to dev-tools") v4.8-rc1 901d805c33fc ("UBSAN: fix typo in format string") v4.8-rc1 6e8d666e9253 ("Disable "maybe-uninitialized" warning globally") v4.6-rc1 dde5cf39d4d2 ("ubsan: fix tree-wide -Wmaybe-uninitialized false positives") v4.5-rc4 7707535ab95e ("ubsan: cosmetic fix to Kconfig text") v4.5-rc1 bf76f73c5f65 ("powerpc: enable UBSAN support") v4.5-rc1 c6d308534aef ("UBSAN: run-time undefined behavior sanity checker") What's not interesting for U-Boot is: - 317506009216 ("lib/test_ubsan.c: make test_ubsan_misaligned_access() static") - 854686f4edf4 ("lib: add testing module for UBSAN") since they add a module-only test functionality. - any Documentation commits. Since dump_stack() evaluates to NOOP in U-Boot, the UBSAN report retains only the header from the original kernel report. As example, below is a UB found in U-Boot thanks to UBSAN: ==================================================================== UBSAN: Undefined behaviour in drivers/net/phy/phy.c:728:19 left shift of 1 by 31 places cannot be represented in type 'int' ==================================================================== For comparison, below is a full-fledged kernel UBSAN report, based on v4.17-rc4 Linux commit 0dfc0c792d69 ("iommu/vt-d: fix shift-out-of- bounds in bug checking"): ================================================================================ UBSAN: Undefined behaviour in drivers/iommu/dmar.c:1348:3 shift exponent 64 is too large for 32-bit type 'int' CPU: 2 PID: 0 Comm: swapper/2 Tainted: G U 4.17.0-rc1+ #89 Hardware name: Dell Inc. OptiPlex 7040/0Y7WYT, BIOS 1.2.8 01/26/2016 Call Trace: dump_stack+0x90/0xfb ubsan_epilogue+0x9/0x40 __ubsan_handle_shift_out_of_bounds+0x10e/0x170 ? qi_flush_dev_iotlb+0x124/0x180 -----[snip]----- apic_timer_interrupt+0xf/0x20 RIP: 0010:poll_idle+0x60/0xe7 RSP: 0018:ffffb1b201943e30 EFLAGS: 00000246 ORIG_RAX: ffffffffffffff13 RAX: 0000000080200000 RBX: 000000000000008e RCX: 000000000000001f RDX: 0000000000000000 RSI: 000000002819aa06 RDI: 0000000000000000 RBP: ffff9e93c6b33280 R08: 00000010f717d567 R09: 000000000010d205 R10: ffffb1b201943df8 R11: 0000000000000001 R12: 00000000e01b169d R13: 0000000000000000 R14: ffffffffb12aa400 R15: 0000000000000000 cpuidle_enter_state+0xb4/0x470 do_idle+0x222/0x310 cpu_startup_entry+0x78/0x90 start_secondary+0x205/0x2e0 secondary_startup_64+0xa5/0xb0 ================================================================================ To enable UBSAN, two prerequisites must be met from Kconfig perspective: * ARCH has to select CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL * defconfig has to enable CONFIG_UBSAN Enable CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL on below architectures (specify compiler, defconfig and phys/virt target used for testing): * SANDBOX: * gcc (Ubuntu 8.1.0-5ubuntu1~16.04) * sandbox*_defconfig * x86_64 Ubuntu machine * x86: * gcc (Ubuntu 8.1.0-5ubuntu1~16.04) * qemu-x86_defconfig * qemu-system-i386 * ARM: * arm-linux-gnueabihf-gcc (Linaro GCC 7.2-2017.11) * vexpress_ca9x4_defconfig * qemu-system-arm * ARM64: * aarch64-linux-gnu-gcc (Linaro GCC 7.2-2017.11) * r8a7795_salvator-x_defconfig * R-Car H3 ES2.0 Salvator-X board * PPC: * powerpc-linux-gnu-gcc (Ubuntu 5.4.0-6ubuntu1~16.04.9) * qemu-ppce500_defconfig * qemu-system-ppc Any defconfig update (UBSAN=y) is expected to come separately. No functional change is intended, assuming CONFIG_UBSAN=n. Signed-off-by: Eugeniu Rosca Reviewed-by: Tom Rini --- Changes in v2: - [Tom Rini] Relocate the ELF/BIN size measurements to the commit updating the sandbox defconfig, to avoid confusion. - [York Sun] Fix SPL build with UBSAN=y. - Enable CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL on x86, ARM and PPC, in addition to SANDBOX and ARM64 (all build and runtime tested with at least one defconfig as described in the commit description). --- Makefile | 3 +- arch/Kconfig | 4 ++ arch/arm/Kconfig | 1 + examples/standalone/Makefile | 2 + include/linux/compat.h | 3 + lib/Kconfig | 1 + lib/Kconfig.ubsan | 29 +++++++++ lib/Makefile | 2 + lib/linux_compat.c | 3 + lib/ubsan.c | 461 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ lib/ubsan.h | 94 +++++++++++++++++++++++++++++ scripts/Makefile.lib | 6 ++ scripts/Makefile.ubsan | 20 +++++++ 13 files changed, 628 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index b5bf8abc1f88..d1eeaa9dbcd2 100644 --- a/Makefile +++ b/Makefile @@ -391,7 +391,7 @@ export MAKE LEX YACC AWK PERL PYTHON PYTHON2 PYTHON3 export HOSTCXX HOSTCXXFLAGS CHECK CHECKFLAGS DTC DTC_FLAGS export KBUILD_CPPFLAGS NOSTDINC_FLAGS UBOOTINCLUDE OBJCOPYFLAGS LDFLAGS -export KBUILD_CFLAGS KBUILD_AFLAGS +export KBUILD_CFLAGS KBUILD_AFLAGS CFLAGS_UBSAN # When compiling out-of-tree modules, put MODVERDIR in the module # tree rather than in the kernel tree. The kernel tree might @@ -648,6 +648,7 @@ endif KBUILD_CFLAGS += $(call cc-option,-Werror=date-time) include scripts/Makefile.extrawarn +include scripts/Makefile.ubsan # Add user supplied CPPFLAGS, AFLAGS and CFLAGS as the last assignments KBUILD_CPPFLAGS += $(KCPPFLAGS) diff --git a/arch/Kconfig b/arch/Kconfig index bf1b4a9afac6..ebb8ee5979e0 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -19,6 +19,7 @@ config ARC config ARM bool "ARM architecture" + select ARCH_HAS_UBSAN_SANITIZE_ALL select CREATE_ARCH_SYMLINK select HAVE_PRIVATE_LIBGCC if !ARM64 select SUPPORT_OF_CONTROL @@ -54,6 +55,7 @@ config NIOS2 config PPC bool "PowerPC architecture" + select ARCH_HAS_UBSAN_SANITIZE_ALL select HAVE_PRIVATE_LIBGCC select SUPPORT_OF_CONTROL select SYS_BOOT_GET_CMDLINE @@ -65,6 +67,7 @@ config RISCV config SANDBOX bool "Sandbox" + select ARCH_HAS_UBSAN_SANITIZE_ALL select BOARD_LATE_INIT select DM select DM_GPIO @@ -98,6 +101,7 @@ config SH config X86 bool "x86 architecture" + select ARCH_HAS_UBSAN_SANITIZE_ALL select CREATE_ARCH_SYMLINK select DM select DM_PCI diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9f5eaf8591b6..0905ebce7004 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -6,6 +6,7 @@ config SYS_ARCH config ARM64 bool + select ARCH_HAS_UBSAN_SANITIZE_ALL select PHYS_64BIT select SYS_CACHE_SHIFT_6 diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile index 09364d84a0ad..66716d37465a 100644 --- a/examples/standalone/Makefile +++ b/examples/standalone/Makefile @@ -3,6 +3,8 @@ # (C) Copyright 2000-2006 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. +UBSAN_SANITIZE := n + extra-y := hello_world extra-$(CONFIG_SMC91111) += smc91111_eeprom extra-$(CONFIG_SMC911X) += smc911x_eeprom diff --git a/include/linux/compat.h b/include/linux/compat.h index 6e3feb64d2d5..e851b2982d76 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -11,6 +11,9 @@ typedef struct unused unused_t; struct p_current{ int pid; +#ifdef CONFIG_UBSAN + unsigned int in_ubsan; +#endif }; extern struct p_current *current; diff --git a/lib/Kconfig b/lib/Kconfig index 622f3c26c331..251903af9e6b 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -375,6 +375,7 @@ endmenu source lib/efi/Kconfig source lib/efi_loader/Kconfig +source lib/Kconfig.ubsan source lib/optee/Kconfig endmenu diff --git a/lib/Kconfig.ubsan b/lib/Kconfig.ubsan new file mode 100644 index 000000000000..dbbfe974221d --- /dev/null +++ b/lib/Kconfig.ubsan @@ -0,0 +1,29 @@ +config ARCH_HAS_UBSAN_SANITIZE_ALL + bool + +config UBSAN + bool "Undefined behaviour sanity checker" + help + This option enables undefined behaviour sanity checker + Compile-time instrumentation is used to detect various undefined + behaviours in runtime. + +config UBSAN_SANITIZE_ALL + bool "Enable instrumentation for the entire kernel" + depends on UBSAN + depends on ARCH_HAS_UBSAN_SANITIZE_ALL + default y + help + This option activates instrumentation for the entire kernel. + If you don't enable this option, you have to explicitly specify + UBSAN_SANITIZE := y for the files/directories you want to check for UB. + Enabling this option will get kernel image size increased + significantly. + +config UBSAN_ALIGNMENT + bool "Enable checking of pointers alignment" + depends on UBSAN + help + This option enables detection of unaligned memory accesses. + Enabling this option on architectures that support unaligned + accesses may produce a lot of false positives. diff --git a/lib/Makefile b/lib/Makefile index 5f583aed37d9..0ae2c121cacf 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -51,6 +51,8 @@ endif obj-$(CONFIG_RSA) += rsa/ obj-$(CONFIG_SHA1) += sha1.o obj-$(CONFIG_SHA256) += sha256.o +obj-$(CONFIG_UBSAN) += ubsan.o +UBSAN_SANITIZE_ubsan.o := n obj-$(CONFIG_$(SPL_)ZLIB) += zlib/ obj-$(CONFIG_$(SPL_)GZIP) += gunzip.o diff --git a/lib/linux_compat.c b/lib/linux_compat.c index a936a7eac214..4dd89b50e924 100644 --- a/lib/linux_compat.c +++ b/lib/linux_compat.c @@ -4,6 +4,9 @@ struct p_current cur = { .pid = 1, +#ifdef CONFIG_UBSAN + .in_ubsan = 0, +#endif }; __maybe_unused struct p_current *current = &cur; diff --git a/lib/ubsan.c b/lib/ubsan.c new file mode 100644 index 000000000000..642ef9f02c00 --- /dev/null +++ b/lib/ubsan.c @@ -0,0 +1,461 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * UBSAN error reporting functions + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * Author: Andrey Ryabinin + */ + +#include +#include +#include +#include +#include + +#ifdef __UBOOT__ +#include +#include +#endif + +#include "ubsan.h" + +const char *type_check_kinds[] = { + "load of", + "store to", + "reference binding to", + "member access within", + "member call on", + "constructor call on", + "downcast of", + "downcast of" +}; + +#define REPORTED_BIT 31 + +#if (BITS_PER_LONG == 64) && defined(__BIG_ENDIAN) +#define COLUMN_MASK (~(1U << REPORTED_BIT)) +#define LINE_MASK (~0U) +#else +#define COLUMN_MASK (~0U) +#define LINE_MASK (~(1U << REPORTED_BIT)) +#endif + +#define VALUE_LENGTH 40 + +static bool was_reported(struct source_location *location) +{ + return test_and_set_bit(REPORTED_BIT, &location->reported); +} + +static void print_source_location(const char *prefix, + struct source_location *loc) +{ + pr_err("%s %s:%d:%d\n", prefix, loc->file_name, + loc->line & LINE_MASK, loc->column & COLUMN_MASK); +} + +static bool suppress_report(struct source_location *loc) +{ + return current->in_ubsan || was_reported(loc); +} + +static bool type_is_int(struct type_descriptor *type) +{ + return type->type_kind == type_kind_int; +} + +static bool type_is_signed(struct type_descriptor *type) +{ + WARN_ON(!type_is_int(type)); + return type->type_info & 1; +} + +static unsigned type_bit_width(struct type_descriptor *type) +{ + return 1 << (type->type_info >> 1); +} + +static bool is_inline_int(struct type_descriptor *type) +{ + unsigned inline_bits = sizeof(unsigned long)*8; + unsigned bits = type_bit_width(type); + + WARN_ON(!type_is_int(type)); + + return bits <= inline_bits; +} + +static s_max get_signed_val(struct type_descriptor *type, unsigned long val) +{ + if (is_inline_int(type)) { + unsigned extra_bits = sizeof(s_max)*8 - type_bit_width(type); + return ((s_max)val) << extra_bits >> extra_bits; + } + + if (type_bit_width(type) == 64) + return *(s64 *)val; + + return *(s_max *)val; +} + +static bool val_is_negative(struct type_descriptor *type, unsigned long val) +{ + return type_is_signed(type) && get_signed_val(type, val) < 0; +} + +static u_max get_unsigned_val(struct type_descriptor *type, unsigned long val) +{ + if (is_inline_int(type)) + return val; + + if (type_bit_width(type) == 64) + return *(u64 *)val; + + return *(u_max *)val; +} + +static void val_to_string(char *str, size_t size, struct type_descriptor *type, + unsigned long value) +{ + if (type_is_int(type)) { + if (type_bit_width(type) == 128) { +#if defined(CONFIG_ARCH_SUPPORTS_INT128) && defined(__SIZEOF_INT128__) + u_max val = get_unsigned_val(type, value); + + scnprintf(str, size, "0x%08x%08x%08x%08x", + (u32)(val >> 96), + (u32)(val >> 64), + (u32)(val >> 32), + (u32)(val)); +#else + WARN_ON(1); +#endif + } else if (type_is_signed(type)) { + scnprintf(str, size, "%lld", + (s64)get_signed_val(type, value)); + } else { + scnprintf(str, size, "%llu", + (u64)get_unsigned_val(type, value)); + } + } +} + +#ifndef __UBOOT__ +static DEFINE_SPINLOCK(report_lock); +#endif + +static void ubsan_prologue(struct source_location *location, + unsigned long *flags) +{ + current->in_ubsan++; + spin_lock_irqsave(&report_lock, *flags); + + pr_err("========================================" + "========================================\n"); + print_source_location("UBSAN: Undefined behaviour in", location); +} + +static void ubsan_epilogue(unsigned long *flags) +{ + dump_stack(); + pr_err("========================================" + "========================================\n"); + spin_unlock_irqrestore(&report_lock, *flags); + current->in_ubsan--; +} + +static void handle_overflow(struct overflow_data *data, unsigned long lhs, + unsigned long rhs, char op) +{ + + struct type_descriptor *type = data->type; + unsigned long flags; + char lhs_val_str[VALUE_LENGTH]; + char rhs_val_str[VALUE_LENGTH]; + + if (suppress_report(&data->location)) + return; + + ubsan_prologue(&data->location, &flags); + + val_to_string(lhs_val_str, sizeof(lhs_val_str), type, lhs); + val_to_string(rhs_val_str, sizeof(rhs_val_str), type, rhs); + pr_err("%s integer overflow:\n", + type_is_signed(type) ? "signed" : "unsigned"); + pr_err("%s %c %s cannot be represented in type %s\n", + lhs_val_str, + op, + rhs_val_str, + type->type_name); + + ubsan_epilogue(&flags); +} + +void __ubsan_handle_add_overflow(struct overflow_data *data, + unsigned long lhs, + unsigned long rhs) +{ + + handle_overflow(data, lhs, rhs, '+'); +} +EXPORT_SYMBOL(__ubsan_handle_add_overflow); + +void __ubsan_handle_sub_overflow(struct overflow_data *data, + unsigned long lhs, + unsigned long rhs) +{ + handle_overflow(data, lhs, rhs, '-'); +} +EXPORT_SYMBOL(__ubsan_handle_sub_overflow); + +void __ubsan_handle_mul_overflow(struct overflow_data *data, + unsigned long lhs, + unsigned long rhs) +{ + handle_overflow(data, lhs, rhs, '*'); +} +EXPORT_SYMBOL(__ubsan_handle_mul_overflow); + +void __ubsan_handle_negate_overflow(struct overflow_data *data, + unsigned long old_val) +{ + unsigned long flags; + char old_val_str[VALUE_LENGTH]; + + if (suppress_report(&data->location)) + return; + + ubsan_prologue(&data->location, &flags); + + val_to_string(old_val_str, sizeof(old_val_str), data->type, old_val); + + pr_err("negation of %s cannot be represented in type %s:\n", + old_val_str, data->type->type_name); + + ubsan_epilogue(&flags); +} +EXPORT_SYMBOL(__ubsan_handle_negate_overflow); + + +void __ubsan_handle_divrem_overflow(struct overflow_data *data, + unsigned long lhs, + unsigned long rhs) +{ + unsigned long flags; + char rhs_val_str[VALUE_LENGTH]; + + if (suppress_report(&data->location)) + return; + + ubsan_prologue(&data->location, &flags); + + val_to_string(rhs_val_str, sizeof(rhs_val_str), data->type, rhs); + + if (type_is_signed(data->type) && get_signed_val(data->type, rhs) == -1) + pr_err("division of %s by -1 cannot be represented in type %s\n", + rhs_val_str, data->type->type_name); + else + pr_err("division by zero\n"); + + ubsan_epilogue(&flags); +} +EXPORT_SYMBOL(__ubsan_handle_divrem_overflow); + +static void handle_null_ptr_deref(struct type_mismatch_data_common *data) +{ + unsigned long flags; + + if (suppress_report(data->location)) + return; + + ubsan_prologue(data->location, &flags); + + pr_err("%s null pointer of type %s\n", + type_check_kinds[data->type_check_kind], + data->type->type_name); + + ubsan_epilogue(&flags); +} + +static void handle_misaligned_access(struct type_mismatch_data_common *data, + unsigned long ptr) +{ + unsigned long flags; + + if (suppress_report(data->location)) + return; + + ubsan_prologue(data->location, &flags); + + pr_err("%s misaligned address %p for type %s\n", + type_check_kinds[data->type_check_kind], + (void *)ptr, data->type->type_name); + pr_err("which requires %ld byte alignment\n", data->alignment); + + ubsan_epilogue(&flags); +} + +static void handle_object_size_mismatch(struct type_mismatch_data_common *data, + unsigned long ptr) +{ + unsigned long flags; + + if (suppress_report(data->location)) + return; + + ubsan_prologue(data->location, &flags); + pr_err("%s address %p with insufficient space\n", + type_check_kinds[data->type_check_kind], + (void *) ptr); + pr_err("for an object of type %s\n", data->type->type_name); + ubsan_epilogue(&flags); +} + +static void ubsan_type_mismatch_common(struct type_mismatch_data_common *data, + unsigned long ptr) +{ + + if (!ptr) + handle_null_ptr_deref(data); + else if (data->alignment && !IS_ALIGNED(ptr, data->alignment)) + handle_misaligned_access(data, ptr); + else + handle_object_size_mismatch(data, ptr); +} + +void __ubsan_handle_type_mismatch(struct type_mismatch_data *data, + unsigned long ptr) +{ + struct type_mismatch_data_common common_data = { + .location = &data->location, + .type = data->type, + .alignment = data->alignment, + .type_check_kind = data->type_check_kind + }; + + ubsan_type_mismatch_common(&common_data, ptr); +} +EXPORT_SYMBOL(__ubsan_handle_type_mismatch); + +void __ubsan_handle_type_mismatch_v1(struct type_mismatch_data_v1 *data, + unsigned long ptr) +{ + + struct type_mismatch_data_common common_data = { + .location = &data->location, + .type = data->type, + .alignment = 1UL << data->log_alignment, + .type_check_kind = data->type_check_kind + }; + + ubsan_type_mismatch_common(&common_data, ptr); +} +EXPORT_SYMBOL(__ubsan_handle_type_mismatch_v1); + +void __ubsan_handle_vla_bound_not_positive(struct vla_bound_data *data, + unsigned long bound) +{ + unsigned long flags; + char bound_str[VALUE_LENGTH]; + + if (suppress_report(&data->location)) + return; + + ubsan_prologue(&data->location, &flags); + + val_to_string(bound_str, sizeof(bound_str), data->type, bound); + pr_err("variable length array bound value %s <= 0\n", bound_str); + + ubsan_epilogue(&flags); +} +EXPORT_SYMBOL(__ubsan_handle_vla_bound_not_positive); + +void __ubsan_handle_out_of_bounds(struct out_of_bounds_data *data, + unsigned long index) +{ + unsigned long flags; + char index_str[VALUE_LENGTH]; + + if (suppress_report(&data->location)) + return; + + ubsan_prologue(&data->location, &flags); + + val_to_string(index_str, sizeof(index_str), data->index_type, index); + pr_err("index %s is out of range for type %s\n", index_str, + data->array_type->type_name); + ubsan_epilogue(&flags); +} +EXPORT_SYMBOL(__ubsan_handle_out_of_bounds); + +void __ubsan_handle_shift_out_of_bounds(struct shift_out_of_bounds_data *data, + unsigned long lhs, unsigned long rhs) +{ + unsigned long flags; + struct type_descriptor *rhs_type = data->rhs_type; + struct type_descriptor *lhs_type = data->lhs_type; + char rhs_str[VALUE_LENGTH]; + char lhs_str[VALUE_LENGTH]; + + if (suppress_report(&data->location)) + return; + + ubsan_prologue(&data->location, &flags); + + val_to_string(rhs_str, sizeof(rhs_str), rhs_type, rhs); + val_to_string(lhs_str, sizeof(lhs_str), lhs_type, lhs); + + if (val_is_negative(rhs_type, rhs)) + pr_err("shift exponent %s is negative\n", rhs_str); + + else if (get_unsigned_val(rhs_type, rhs) >= + type_bit_width(lhs_type)) + pr_err("shift exponent %s is too large for %u-bit type %s\n", + rhs_str, + type_bit_width(lhs_type), + lhs_type->type_name); + else if (val_is_negative(lhs_type, lhs)) + pr_err("left shift of negative value %s\n", + lhs_str); + else + pr_err("left shift of %s by %s places cannot be" + " represented in type %s\n", + lhs_str, rhs_str, + lhs_type->type_name); + + ubsan_epilogue(&flags); +} +EXPORT_SYMBOL(__ubsan_handle_shift_out_of_bounds); + + +void __noreturn +__ubsan_handle_builtin_unreachable(struct unreachable_data *data) +{ + unsigned long flags; + + ubsan_prologue(&data->location, &flags); + pr_err("calling __builtin_unreachable()\n"); + ubsan_epilogue(&flags); + panic("can't return from __builtin_unreachable()"); +} +EXPORT_SYMBOL(__ubsan_handle_builtin_unreachable); + +void __ubsan_handle_load_invalid_value(struct invalid_value_data *data, + unsigned long val) +{ + unsigned long flags; + char val_str[VALUE_LENGTH]; + + if (suppress_report(&data->location)) + return; + + ubsan_prologue(&data->location, &flags); + + val_to_string(val_str, sizeof(val_str), data->type, val); + + pr_err("load of value %s is not a valid value for type %s\n", + val_str, data->type->type_name); + + ubsan_epilogue(&flags); +} +EXPORT_SYMBOL(__ubsan_handle_load_invalid_value); diff --git a/lib/ubsan.h b/lib/ubsan.h new file mode 100644 index 000000000000..01efea6bae11 --- /dev/null +++ b/lib/ubsan.h @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0 +#ifndef _LIB_UBSAN_H +#define _LIB_UBSAN_H + +enum { + type_kind_int = 0, + type_kind_float = 1, + type_unknown = 0xffff +}; + +struct type_descriptor { + u16 type_kind; + u16 type_info; + char type_name[1]; +}; + +struct source_location { + const char *file_name; + union { + unsigned long reported; + struct { + u32 line; + u32 column; + }; + }; +}; + +struct overflow_data { + struct source_location location; + struct type_descriptor *type; +}; + +struct type_mismatch_data { + struct source_location location; + struct type_descriptor *type; + unsigned long alignment; + unsigned char type_check_kind; +}; + +struct type_mismatch_data_v1 { + struct source_location location; + struct type_descriptor *type; + unsigned char log_alignment; + unsigned char type_check_kind; +}; + +struct type_mismatch_data_common { + struct source_location *location; + struct type_descriptor *type; + unsigned long alignment; + unsigned char type_check_kind; +}; + +struct nonnull_arg_data { + struct source_location location; + struct source_location attr_location; + int arg_index; +}; + +struct vla_bound_data { + struct source_location location; + struct type_descriptor *type; +}; + +struct out_of_bounds_data { + struct source_location location; + struct type_descriptor *array_type; + struct type_descriptor *index_type; +}; + +struct shift_out_of_bounds_data { + struct source_location location; + struct type_descriptor *lhs_type; + struct type_descriptor *rhs_type; +}; + +struct unreachable_data { + struct source_location location; +}; + +struct invalid_value_data { + struct source_location location; + struct type_descriptor *type; +}; + +#if defined(CONFIG_ARCH_SUPPORTS_INT128) && defined(__SIZEOF_INT128__) +typedef __int128 s_max; +typedef unsigned __int128 u_max; +#else +typedef s64 s_max; +typedef u64 u_max; +#endif + +#endif diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index f8c3fff1d151..ccf683265fcb 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -131,6 +131,12 @@ _c_flags += $(if $(patsubst n%,, \ $(CFLAGS_KASAN)) endif +ifeq ($(CONFIG_UBSAN),y) +_c_flags += $(if $(patsubst n%,, \ + $(UBSAN_SANITIZE_$(basetarget).o)$(UBSAN_SANITIZE)$(CONFIG_UBSAN_SANITIZE_ALL)), \ + $(CFLAGS_UBSAN)) +endif + # If building the kernel in a separate objtree expand all occurrences # of -Idir to -I$(srctree)/dir except for absolute paths (starting with '/'). diff --git a/scripts/Makefile.ubsan b/scripts/Makefile.ubsan new file mode 100644 index 000000000000..38b2b4818e8e --- /dev/null +++ b/scripts/Makefile.ubsan @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: GPL-2.0 +ifdef CONFIG_UBSAN + CFLAGS_UBSAN += $(call cc-option, -fsanitize=shift) + CFLAGS_UBSAN += $(call cc-option, -fsanitize=integer-divide-by-zero) + CFLAGS_UBSAN += $(call cc-option, -fsanitize=unreachable) + CFLAGS_UBSAN += $(call cc-option, -fsanitize=vla-bound) + CFLAGS_UBSAN += $(call cc-option, -fsanitize=signed-integer-overflow) + CFLAGS_UBSAN += $(call cc-option, -fsanitize=bounds) + CFLAGS_UBSAN += $(call cc-option, -fsanitize=object-size) + CFLAGS_UBSAN += $(call cc-option, -fsanitize=bool) + CFLAGS_UBSAN += $(call cc-option, -fsanitize=enum) + +ifdef CONFIG_UBSAN_ALIGNMENT + CFLAGS_UBSAN += $(call cc-option, -fsanitize=alignment) +endif + + # -fsanitize=* options makes GCC less smart than usual and + # increase number of 'maybe-uninitialized false-positives + CFLAGS_UBSAN += $(call cc-option, -Wno-maybe-uninitialized) +endif From patchwork Sun Aug 26 23:13:20 2018 Content-Type: text/plain; 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[178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.15.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:15:38 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:20 +0200 Message-Id: <20180826231332.2491-3-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> X-Mailman-Approved-At: Mon, 27 Aug 2018 01:08:09 +0000 Cc: Baruch Siach , Michal Simek , Eugeniu Rosca , Suniel Mahesh , Vipul Kumar , Stephen Warren , eil Eilmsteiner Heribert , Karthik Tummala , Kishon Vijay Abraham I , Eugeniu Rosca , Guillaume GARDET , Jonathan Gray Subject: [U-Boot] [PATCH v2 02/13] mmc: Fix signed shift overflow X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Below is reproduced both with sandbox and R-Car Gen3 arm64 U-Boot: =================================================================== UBSAN: Undefined behaviour in drivers/mmc/mmc.c:1147:21 left shift of 1 by 31 places cannot be represented in type 'int' =================================================================== Fixes: 272cc70b211e ("Add MMC Framework") Signed-off-by: Eugeniu Rosca --- Changes in v2: - Shorten the summary line --- drivers/mmc/mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index ad429f49c992..447519f46f15 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1136,7 +1136,7 @@ int mmc_getcd(struct mmc *mmc) #endif #if !CONFIG_IS_ENABLED(MMC_TINY) -static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) +static int sd_switch(struct mmc *mmc, uint mode, int group, u8 value, u8 *resp) { struct mmc_cmd cmd; struct mmc_data data; From patchwork Sun Aug 26 23:13:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugeniu Rosca X-Patchwork-Id: 962296 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="BSivva4e"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41z9qn1NVwz9ryt for ; Mon, 27 Aug 2018 09:16:00 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 29E33C21E2F; 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[178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.15.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:15:50 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:21 +0200 Message-Id: <20180826231332.2491-4-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> Cc: Eugeniu Rosca , Eugeniu Rosca , Andy Yan Subject: [U-Boot] [PATCH v2 03/13] armv8: mmu: Fix signed shift overflow X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Fix the following UBSAN warnings: ------8<----- CPU: Renesas Electronics R8A7795 rev 2.0 Model: Renesas Salvator-X board based on r8a7795 ES2.0+ ==================================================================== UBSAN: Undefined behaviour in arch/arm/cpu/armv8/cache_v8.c:72:9 left shift of 1 by 31 places cannot be represented in type 'int' ==================================================================== ==================================================================== UBSAN: Undefined behaviour in arch/arm/cpu/armv8/cache_v8.c:74:9 left shift of 1 by 31 places cannot be represented in type 'int' ==================================================================== ------8<----- Use (1UL << i) instead of BIT() macro for consistency. Fixes: ad3d6e88a1a4 ("armv8/mmu: Set bits marked RES1 in TCR") Fixes: 9bb367a590fe ("arm64: Disable TTBR1 maps in EL1") Signed-off-by: Eugeniu Rosca Reviewed-by: Tom Rini --- Changes in v2: - Shorten the summary line - Use (1UL << i) instead of BIT() macro for consistency --- arch/arm/include/asm/armv8/mmu.h | 42 +++++++++++++++++++++--------------------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index 62d00d15c26d..632d3a442df8 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -78,27 +78,27 @@ * TCR flags. */ #define TCR_T0SZ(x) ((64 - (x)) << 0) -#define TCR_IRGN_NC (0 << 8) -#define TCR_IRGN_WBWA (1 << 8) -#define TCR_IRGN_WT (2 << 8) -#define TCR_IRGN_WBNWA (3 << 8) -#define TCR_IRGN_MASK (3 << 8) -#define TCR_ORGN_NC (0 << 10) -#define TCR_ORGN_WBWA (1 << 10) -#define TCR_ORGN_WT (2 << 10) -#define TCR_ORGN_WBNWA (3 << 10) -#define TCR_ORGN_MASK (3 << 10) -#define TCR_SHARED_NON (0 << 12) -#define TCR_SHARED_OUTER (2 << 12) -#define TCR_SHARED_INNER (3 << 12) -#define TCR_TG0_4K (0 << 14) -#define TCR_TG0_64K (1 << 14) -#define TCR_TG0_16K (2 << 14) -#define TCR_EPD1_DISABLE (1 << 23) - -#define TCR_EL1_RSVD (1 << 31) -#define TCR_EL2_RSVD (1 << 31 | 1 << 23) -#define TCR_EL3_RSVD (1 << 31 | 1 << 23) +#define TCR_IRGN_NC (0UL << 8) +#define TCR_IRGN_WBWA (1UL << 8) +#define TCR_IRGN_WT (2UL << 8) +#define TCR_IRGN_WBNWA (3UL << 8) +#define TCR_IRGN_MASK (3UL << 8) +#define TCR_ORGN_NC (0UL << 10) +#define TCR_ORGN_WBWA (1UL << 10) +#define TCR_ORGN_WT (2UL << 10) +#define TCR_ORGN_WBNWA (3UL << 10) +#define TCR_ORGN_MASK (3UL << 10) +#define TCR_SHARED_NON (0UL << 12) +#define TCR_SHARED_OUTER (2UL << 12) +#define TCR_SHARED_INNER (3UL << 12) +#define TCR_TG0_4K (0UL << 14) +#define TCR_TG0_64K (1UL << 14) +#define TCR_TG0_16K (2UL << 14) +#define TCR_EPD1_DISABLE (1UL << 23) + +#define TCR_EL1_RSVD (1UL << 31) +#define TCR_EL2_RSVD (1UL << 31 | 1UL << 23) +#define TCR_EL3_RSVD (1UL << 31 | 1UL << 23) #ifndef __ASSEMBLY__ static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr) From patchwork Sun Aug 26 23:13:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugeniu Rosca X-Patchwork-Id: 962297 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="tOGWkaCH"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41z9rb1d61z9ryt for ; Mon, 27 Aug 2018 09:16:47 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id D17ABC21DD3; Sun, 26 Aug 2018 23:16:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0645FC21E89; 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[178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.15.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:16:00 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:22 +0200 Message-Id: <20180826231332.2491-5-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> Cc: Takeshi Kihara , Eugeniu Rosca , Eugeniu Rosca , Marek Vasut Subject: [U-Boot] [PATCH v2 04/13] pinctrl: renesas: Fix signed shift overflow X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Booting R-Car H3-Salvator-X (CONFIG_UBSAN=y) consistently results in: ===================================================================== UBSAN: Undefined behaviour in drivers/pinctrl/renesas/pfc.c:402:40 left shift of 1 by 31 places cannot be represented in type 'int' ===================================================================== ===================================================================== UBSAN: Undefined behaviour in drivers/pinctrl/renesas/pfc.c:410:39 left shift of 1 by 31 places cannot be represented in type 'int' ===================================================================== While fixing these warnings, convert *all* SH_PFC_PIN_CFG_* definitions to use the recommended BIT() macro. Fixes: 910df4d07e37 ("pinctrl: rmobile: Add Renesas RCar pincontrol driver") Signed-off-by: Eugeniu Rosca Acked-by: Marek Vasut --- Changes in v2: - Shorten the summary line - Add "Acked-by: Marek Vasut " --- drivers/pinctrl/renesas/sh_pfc.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h index b98c2f185d26..b58e52bbfbb9 100644 --- a/drivers/pinctrl/renesas/sh_pfc.h +++ b/drivers/pinctrl/renesas/sh_pfc.h @@ -21,13 +21,13 @@ enum { PINMUX_TYPE_INPUT, }; -#define SH_PFC_PIN_CFG_INPUT (1 << 0) -#define SH_PFC_PIN_CFG_OUTPUT (1 << 1) -#define SH_PFC_PIN_CFG_PULL_UP (1 << 2) -#define SH_PFC_PIN_CFG_PULL_DOWN (1 << 3) -#define SH_PFC_PIN_CFG_IO_VOLTAGE (1 << 4) -#define SH_PFC_PIN_CFG_DRIVE_STRENGTH (1 << 5) -#define SH_PFC_PIN_CFG_NO_GPIO (1 << 31) +#define SH_PFC_PIN_CFG_INPUT BIT(0) +#define SH_PFC_PIN_CFG_OUTPUT BIT(1) +#define SH_PFC_PIN_CFG_PULL_UP BIT(2) +#define SH_PFC_PIN_CFG_PULL_DOWN BIT(3) +#define SH_PFC_PIN_CFG_IO_VOLTAGE BIT(4) +#define SH_PFC_PIN_CFG_DRIVE_STRENGTH BIT(5) +#define SH_PFC_PIN_CFG_NO_GPIO BIT(31) struct sh_pfc_pin { u16 pin; From patchwork Sun Aug 26 23:13:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugeniu Rosca X-Patchwork-Id: 962300 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Ey1o5cGH"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41z9w45wNtz9s1c for ; Mon, 27 Aug 2018 09:19:48 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 87127C21E3A; Sun, 26 Aug 2018 23:16:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 3F690C21D8E; Sun, 26 Aug 2018 23:16:33 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B6AE8C21D56; Sun, 26 Aug 2018 23:16:10 +0000 (UTC) Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) by lists.denx.de (Postfix) with ESMTPS id C3201C21E18 for ; Sun, 26 Aug 2018 23:16:08 +0000 (UTC) Received: by mail-wr1-f65.google.com with SMTP id u12-v6so10597960wrr.4 for ; Sun, 26 Aug 2018 16:16:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dX2nLVR3tsGUOEJ/oPnGWgI2JKCv6fUcgXOlvnE2+I0=; b=Ey1o5cGHIc3Qqlp5OJp1Fgv/JBzrnjp6ESRfOwtU2S2/VEcPo24EIDldNXalZo7Q7O LiQvF/CAq347/udilhlxQIKzDpGkkBIuS5MMOcGVsEuhz6SrdhqTphl8R/0rJrgzBcw8 GxDBueN5Lwt6OXuv+QkxzHPlfDPshAzJwPBKrcS2QEBZNrnJBpZszbpoBldvKkQhcxH0 BFtRwJFqs+4I9rlvXG7aBAa+h+PjSa2bgb+/x6VhUCL0oOBl3chZEGwQG11+aWjaNOqg 8q7nxNA33uhf8t0PZMbuJPtsHI3Pc/7D6cwaHuQo1TIJRqpPwTdkHdiOtvtChDSba1zo KhZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dX2nLVR3tsGUOEJ/oPnGWgI2JKCv6fUcgXOlvnE2+I0=; b=t525254zpDZ0K6zz8/ag/lr3IKUqI74YV3NGHF/2zeFVxa1tRP4o/Ox904KriUJvKh Gnn0nUIaQlFCoSNtYxykUOngzqHl17c1DZ7X9KyFvPmK4ACz3d+fAY24nFwenBrlJ06Q E8bkQ3LRXWt3IN6WudbJER1SpHKd9aHGgaLIr4mMHTggGwO6RjjW7FjzTZyeXUkvaisP VJ+m9dOoDZXgxNBsjPeVx76gRGc0vHQXD0uYK6JgPzouAcf4bhjz481M8McXer+QphWZ LZWiZWZlSrAM9nEwgTy0euzb8Mk0pPtPKIUCicgQCzl4fPnxzaxr//QNSN+AmYmLrY49 Fvsw== X-Gm-Message-State: APzg51CXEE6POBzG2Vs93Dsdk+oo53PtfggMBHMvkOjBtwDys2PEJC9s uxgbRNZwz6VzN2wc0Tq8fws= X-Google-Smtp-Source: ANB0VdaDUCjKiV/SREHX0e00w8DkuifFJ6ReQlgdpYqbL3ux897jrWuTlYbfrDE1HD9WYg4HmGYspw== X-Received: by 2002:adf:e711:: with SMTP id c17-v6mr6632830wrm.143.1535325368436; Sun, 26 Aug 2018 16:16:08 -0700 (PDT) Received: from localhost.localdomain (ipb218f467.dynamic.kabel-deutschland.de. [178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.16.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:16:07 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:23 +0200 Message-Id: <20180826231332.2491-6-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> Cc: Eugeniu Rosca , Eugeniu Rosca , Joe Hershberger , Stefan Roese Subject: [U-Boot] [PATCH v2 05/13] net: phy: Fix signed shift overflow X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Booting R-Car Gen3 arm64 U-Boot with CONFIG_UBSAN=y results in: ===================================================================== UBSAN: Undefined behaviour in drivers/net/phy/phy.c:728:19 left shift of 1 by 31 places cannot be represented in type 'int' ===================================================================== Fix it by appending the UL suffix to the numeric literal. While at it, convert the type of "addr" variable from signed to unsigned, to protect against shifting the numeric literal by a negative value (which would lead to yet another undefined behavior). Fixes: 1adb406b0141 ("phy: add phy_find_by_mask/phy_connect_dev") Signed-off-by: Eugeniu Rosca --- Changes in v2: - Shorten the summary line. Rephrase/rewrap the description. --- drivers/net/phy/phy.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index e837eb7688cc..0a8df72a495f 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -719,13 +719,13 @@ static struct phy_device *search_for_existing_phy(struct mii_dev *bus, { /* If we have one, return the existing device, with new interface */ while (phy_mask) { - int addr = ffs(phy_mask) - 1; + unsigned int addr = ffs(phy_mask) - 1; if (bus->phymap[addr]) { bus->phymap[addr]->interface = interface; return bus->phymap[addr]; } - phy_mask &= ~(1 << addr); + phy_mask &= ~(1UL << addr); } return NULL; } From patchwork Sun Aug 26 23:13:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugeniu Rosca X-Patchwork-Id: 962298 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="acRGIun0"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41z9rw1QBKz9ryt for ; Mon, 27 Aug 2018 09:17:04 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id C99FDC21DD3; Sun, 26 Aug 2018 23:16:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0951CC21DED; Sun, 26 Aug 2018 23:16:31 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B56D1C21DD7; Sun, 26 Aug 2018 23:16:15 +0000 (UTC) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by lists.denx.de (Postfix) with ESMTPS id DFC9FC21C8B for ; Sun, 26 Aug 2018 23:16:14 +0000 (UTC) Received: by mail-wr1-f68.google.com with SMTP id j26-v6so11918172wre.2 for ; Sun, 26 Aug 2018 16:16:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=H7Yq7p+6gyQXdXj6JwHEnZ2Ku3TYWPlBavrPWNi647g=; b=acRGIun0hscmYA/5nLyKX5qeEBXdSw18mjvGt5b8esAMu91QNNXZf7cXQFFEoAcdfZ etya+r42BHkSleihM7WVn2yqiWpJBM74W8uSkE7QVQGBcNmD9MHTeDIJ6RXXP2flsi1d 7b2lsu39AQ9aNEGOMekqhM9U5Tcbef/t7Fn56IrRlAVbLvP9uMFTXbD2YZCr+DjBjZgc ScrDVsTsUL/s7zxQGrLL2lKoBxabwfLwazmRnhbbKlnbDYNRpJR66ZEnCd3m5lgvwTll o+Y9QArcOEupqA3Rbh10up5DGSsuCc6IWiMxJvWszbMgQ+xw3fvsH/Y8Wgb0jXHJ5pUw D2QQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=H7Yq7p+6gyQXdXj6JwHEnZ2Ku3TYWPlBavrPWNi647g=; b=Df/+1Fqa7BreBnITgKKdmYVwtfEUURthi3f3V2mOLsPmYX8H4lGabGJ/albJ8bsehp EO+l7N5g4GkCcoH7cd7gDmkGe5btmKdGC7YokqcB3daaP6s+YNORPO/8NKQUcWUcBjge L4Fp4a/x6a9jUlqMs49C3gEjJ3C/prlQ/4CSrnZSiVJ+8WZJoVercoetNlA7NS5EyQrC KFbjsXAlznBgpfoN0yyHZKJF1FXzvmE34HETccGHdF6Tc4PAQhURQ+Qjg3a9IqS458P8 wfhehYqOt8mf+mygyEojdr7idUi4x2KuEs7TASNIzk6GMPUPBGbod4WyzCwqySmiI9WU HY7A== X-Gm-Message-State: APzg51Cx5kwxW62YygRt6M2Gk7ob36pdnaqEFzDHqbj0dDnRVCQOSNzI tlELWsbvM2q0zcusowvZcFs= X-Google-Smtp-Source: ANB0VdZcgyVaIZ+maEg9Y3U2ahLr0E7hpp3nX27YzXAheuvTjdGiwGTkKr6aEdrxnPitvAMM1PyZBA== X-Received: by 2002:adf:ba12:: with SMTP id o18-v6mr6577049wrg.249.1535325374552; Sun, 26 Aug 2018 16:16:14 -0700 (PDT) Received: from localhost.localdomain (ipb218f467.dynamic.kabel-deutschland.de. [178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.16.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:16:13 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:24 +0200 Message-Id: <20180826231332.2491-7-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> Cc: Eugeniu Rosca , Joe Hershberger , Eugeniu Rosca , Jagan Teki , Marek Vasut Subject: [U-Boot] [PATCH v2 06/13] net: ravb: Fix signed shift overflow X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Running "tftp" on R-Car H3 Salvator-X with CONFIG_UBSAN=y results in: => tftp ===================================================================== UBSAN: Undefined behaviour in drivers/net/ravb.c:237:28 left shift of 10 by 28 places cannot be represented in type 'int' ===================================================================== ===================================================================== UBSAN: Undefined behaviour in drivers/net/ravb.c:258:44 left shift of 9 by 28 places cannot be represented in type 'int' ===================================================================== ===================================================================== UBSAN: Undefined behaviour in drivers/net/ravb.c:263:46 left shift of 9 by 28 places cannot be represented in type 'int' ===================================================================== ===================================================================== UBSAN: Undefined behaviour in drivers/net/ravb.c:283:31 left shift of 9 by 28 places cannot be represented in type 'int' ===================================================================== ===================================================================== UBSAN: Undefined behaviour in drivers/net/ravb.c:288:49 left shift of 9 by 28 places cannot be represented in type 'int' ===================================================================== ===================================================================== UBSAN: Undefined behaviour in drivers/net/ravb.c:293:46 left shift of 9 by 28 places cannot be represented in type 'int' ===================================================================== ===================================================================== UBSAN: Undefined behaviour in drivers/net/ravb.c:345:2 left shift of 222 by 24 places cannot be represented in type 'int' ===================================================================== Pinging the host results in: => ping 192.168.2.11 Using ethernet@e6800000 device ===================================================================== UBSAN: Undefined behaviour in drivers/net/ravb.c:161:21 left shift of 15 by 28 places cannot be represented in type 'int' ===================================================================== ===================================================================== UBSAN: Undefined behaviour in drivers/net/ravb.c:182:25 left shift of 15 by 28 places cannot be represented in type 'int' ===================================================================== ===================================================================== UBSAN: Undefined behaviour in drivers/net/ravb.c:182:47 left shift of 12 by 28 places cannot be represented in type 'int' ===================================================================== ===================================================================== UBSAN: Undefined behaviour in drivers/net/ravb.c:205:20 left shift of 12 by 28 places cannot be represented in type 'int' ===================================================================== host 192.168.2.11 is alive There are two issues behind: - calculating RAVB_DESC_DT_* bitfields - assembling MAC address from its char components Fix both. Fixes: 8ae51b6f324e ("net: ravb: Add Renesas Ethernet RAVB driver") Signed-off-by: Eugeniu Rosca Acked-by: Marek Vasut --- Changes in v2: - Shorten the summary line - Add "Acked-by: Marek Vasut " --- drivers/net/ravb.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index 749562db960e..5baff198889b 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -73,12 +73,12 @@ #define RAVB_RX_QUEUE_OFFSET 4 #define RAVB_DESC_DT(n) ((n) << 28) -#define RAVB_DESC_DT_FSINGLE RAVB_DESC_DT(0x7) -#define RAVB_DESC_DT_LINKFIX RAVB_DESC_DT(0x9) -#define RAVB_DESC_DT_EOS RAVB_DESC_DT(0xa) -#define RAVB_DESC_DT_FEMPTY RAVB_DESC_DT(0xc) -#define RAVB_DESC_DT_EEMPTY RAVB_DESC_DT(0x3) -#define RAVB_DESC_DT_MASK RAVB_DESC_DT(0xf) +#define RAVB_DESC_DT_FSINGLE RAVB_DESC_DT(0x7UL) +#define RAVB_DESC_DT_LINKFIX RAVB_DESC_DT(0x9UL) +#define RAVB_DESC_DT_EOS RAVB_DESC_DT(0xaUL) +#define RAVB_DESC_DT_FEMPTY RAVB_DESC_DT(0xcUL) +#define RAVB_DESC_DT_EEMPTY RAVB_DESC_DT(0x3UL) +#define RAVB_DESC_DT_MASK RAVB_DESC_DT(0xfUL) #define RAVB_DESC_DS(n) (((n) & 0xfff) << 0) #define RAVB_DESC_DS_MASK 0xfff @@ -342,8 +342,8 @@ static int ravb_write_hwaddr(struct udevice *dev) struct eth_pdata *pdata = dev_get_platdata(dev); unsigned char *mac = pdata->enetaddr; - writel((mac[0] << 24) | (mac[1] << 16) | (mac[2] << 8) | mac[3], - eth->iobase + RAVB_REG_MAHR); + writel(((u32)mac[0] << 24) | ((u32)mac[1] << 16) | ((u32)mac[2] << 8) | + mac[3], eth->iobase + RAVB_REG_MAHR); writel((mac[4] << 8) | mac[5], eth->iobase + RAVB_REG_MALR); From patchwork Sun Aug 26 23:13:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugeniu Rosca X-Patchwork-Id: 962305 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="hx5lwluP"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41z9xX4Rwnz9rvt for ; Mon, 27 Aug 2018 09:21:04 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 5E8D9C21E0B; Sun, 26 Aug 2018 23:17:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6A9B8C21DF8; Sun, 26 Aug 2018 23:16:37 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 991E6C21C51; Sun, 26 Aug 2018 23:16:22 +0000 (UTC) Received: from mail-wm0-f67.google.com (mail-wm0-f67.google.com [74.125.82.67]) by lists.denx.de (Postfix) with ESMTPS id 9B522C21DE8 for ; Sun, 26 Aug 2018 23:16:18 +0000 (UTC) Received: by mail-wm0-f67.google.com with SMTP id f21-v6so6392434wmc.5 for ; Sun, 26 Aug 2018 16:16:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CCQWlXHqnFLSVOoYnscEc+hAKuXQSTqQhzJXEcnrVVw=; b=hx5lwluPZMuVLCTYOKwGPQBXeoZOpsUso/EtBGifmqaSZu3IGaPXa4BwfEOiIBbrTi mW0pkWYMd926rY7vnAAaRx+gR+r9sLkDsUpvNcCUVZX6xtXmzR7s7JwFaMjv+VI2oF5M QG45MORhGzJvQrDq+8JyI2jJwn7S6eWXoORnkijMZunDR/gS5Q/yp0ufgq00XyVhmG9u RH1hAaeLClRut5XOqm5ySizSGXo2jcbwtrRK886jsr2fyZeI53ODrk3yIu81+/REysxh L2z810ibv8bR1/8egv30OZDx+Tw1aRUChqAntsIP9Zs/cyRyGXERtIW2zimHOg08KBV4 9cGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CCQWlXHqnFLSVOoYnscEc+hAKuXQSTqQhzJXEcnrVVw=; b=bUpoFseBveyXtjWiQs5ntsiqDJolJ656tFEt7/C22C7bTwHmqpJEaAZo8JLU7YV7sy MX7G8RniITXSwOvB60fv7eQJwVXtyee9qPi6u1BrONsu+LWNWxTN65meFqCghdDCQlZO QuFHNc0nP1Fo2pGV+xK+Y5L0ZtIDnBKz72ScOh5u0A3N6V3SQ+iVQx3hp5GTqb7oHHg1 LlzDv+pkAoKht14Keip3KBdlr4MLO8cKgrFkk7E8dWB4ykx3EwPYNi/Enn2y5M461IZ+ xbKqR3J2QLnItbmnQB7pNxA1miGR4UHBMhkqi+fqIEJ1DFbUj+IvmWc9wTobAZMaQuSp vArg== X-Gm-Message-State: APzg51BmWxZ3OEyIu8Iimr9njTL0D+GGTKr+pfjEUvZEdzkYt0G6tCwm EKTf/Tdm79rqiGn3LplP0LE= X-Google-Smtp-Source: ANB0VdZH7w78fT4fnhP7vHJ4Sj7XIiUR0gzN9QEjwQC7X80kPbFWszfXtD6eVh0Vi/yrOTj6cwAzuQ== X-Received: by 2002:a1c:9dc3:: with SMTP id g186-v6mr4147384wme.26.1535325378283; Sun, 26 Aug 2018 16:16:18 -0700 (PDT) Received: from localhost.localdomain (ipb218f467.dynamic.kabel-deutschland.de. [178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.16.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:16:17 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:25 +0200 Message-Id: <20180826231332.2491-8-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> Cc: Eugeniu Rosca , Eugeniu Rosca Subject: [U-Boot] [PATCH v2 07/13] x86: Fix signed shift overflow in MSR_IA32_APICBASE_BASE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Fix the following UBSAN report: ====================================================================== UBSAN: Undefined behaviour in arch/x86/cpu/lapic.c:73:14 left shift of 1048575 by 12 places cannot be represented in type 'int' ====================================================================== Steps to reproduce the above: * echo CONFIG_UBSAN=y >> configs/qemu-x86_defconfig * make ARCH=x86 qemu-x86_defconfig all * qemu-system-i386 --version QEMU emulator version 2.5.0 (Debian 1:2.5+dfsg-5ubuntu10.31) * qemu-system-i386 --nographic -bios u-boot.rom Fixes: 98568f0fa96b ("x86: Import MSR/MTRR code from Linux") Signed-off-by: Eugeniu Rosca --- Changes in v2: - None. Newly pushed. --- arch/x86/include/asm/msr-index.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 9c1dbe61d596..d8b7b8013c74 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -370,7 +370,7 @@ #define MSR_IA32_APICBASE 0x0000001b #define MSR_IA32_APICBASE_BSP (1<<8) #define MSR_IA32_APICBASE_ENABLE (1<<11) -#define MSR_IA32_APICBASE_BASE (0xfffff<<12) +#define MSR_IA32_APICBASE_BASE (0xfffffUL << 12) #define MSR_IA32_TSCDEADLINE 0x000006e0 From patchwork Sun Aug 26 23:13:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugeniu Rosca X-Patchwork-Id: 962304 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="r0qPxB4c"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41z9xV4vnKz9rvt for ; Mon, 27 Aug 2018 09:21:02 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 64B96C21E15; Sun, 26 Aug 2018 23:18:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 014E9C21E0B; Sun, 26 Aug 2018 23:17:50 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 44A7EC21E1B; Sun, 26 Aug 2018 23:16:28 +0000 (UTC) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by lists.denx.de (Postfix) with ESMTPS id 5BE59C21E1A for ; Sun, 26 Aug 2018 23:16:25 +0000 (UTC) Received: by mail-wr1-f68.google.com with SMTP id 20-v6so11879297wrb.12 for ; Sun, 26 Aug 2018 16:16:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=15JQKuFj84nVIae0VWiIsyUAwT727Hn0h8EIBc7lKbw=; b=r0qPxB4c7CXNp3WKjFJFCZxjSrS+IwU05JpIYPcbFG2xad7UxO55d2HbH8wa8zNyoY XzPkMalBP9jWiuxOfBfWelqfOOiGcceRsJHqxkVXjcU091PanN/e+TeNjQgB86bx4mqb jhquIbPsZnp8agU42LrTfFmJyyAHJcC107SyjjP2ROMC7BlD+1elfPUF/f216tWl/OLl DPEQVFQnONsZxzkIKWnDQ2YCducnru4zebXdWltyiUzm3B3tlb+fwVfr4RPEKfHMIQwL t5IeGIoBq+9wOESvoZ3F/eA3YiFZvd+ec5RHLUZ/9l9oP4KysYDHd6fTAGHg6nTP4gx/ CEtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=15JQKuFj84nVIae0VWiIsyUAwT727Hn0h8EIBc7lKbw=; b=GsQXLs77urRB6ExMgwDMspE+R8y//eLyKXt7zyhXmc6Hx6XjOAugFPNZJmO0vIlnHj JiM/lSnK2QOpzC0vtnEV754MKvuLXCfhgnYFoe5X81XV/tcQoPSEDYmfermp+Tw/7HES NkpdM1EnUjvMlP+eGZp+m4UoiPZdCwGPtUf5UrYeGbKHpRW4tcou0VIHHOrItpAwRzBR 34V/Ie+yjp3DDSjzhNJj5k04pE15YdKcIPNkBvXCSM4KMu6ERFrKvKVJBJHRqRphVWVa Z7CUC5Z+dD5fRyFC95ruxVeoH1AgoYRSTb7tY9Q7M3IrX2Yvs4TiSZlo8Q0zpgv52WOV oTow== X-Gm-Message-State: APzg51DFzSN8y101noHAEzuAeCl13NSoKUWC9iAb2vtp6ThF0aK2pkjH i8v6mxej3rlKdXL3RHTwX8Y= X-Google-Smtp-Source: ANB0VdZO+xFs+ONtQv0z99/0NKLNvog8fEEEU40lqH8KR1OdNhkZvF8UFVz5a1HROTCtY+Kz8U5dUQ== X-Received: by 2002:adf:ff82:: with SMTP id j2-v6mr6516678wrr.165.1535325385046; Sun, 26 Aug 2018 16:16:25 -0700 (PDT) Received: from localhost.localdomain (ipb218f467.dynamic.kabel-deutschland.de. [178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.16.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:16:24 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:26 +0200 Message-Id: <20180826231332.2491-9-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> Cc: Eugeniu Rosca , Andre Przywara , Alexey Brodkin , Alexander Graf , Peter Jones , Fabio Estevam , Eugeniu Rosca Subject: [U-Boot] [PATCH v2 08/13] disk: part_dos: Fix signed shift overflow X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Fix the following UBSAN report: ==================================================================== UBSAN: Undefined behaviour in disk/part_dos.c:30:22 left shift of 209 by 24 places cannot be represented in type 'int' ==================================================================== Steps to reproduce the above: * echo CONFIG_UBSAN=y >> configs/qemu-x86_defconfig * make ARCH=x86 qemu-x86_defconfig all * qemu-system-i386 --version QEMU emulator version 2.5.0 (Debian 1:2.5+dfsg-5ubuntu10.31) * qemu-system-i386 --nographic -bios u-boot.rom * bootefi selftest Fixes: fe8c2806cdba ("Initial revision") Signed-off-by: Eugeniu Rosca --- Changes in v2: - None. Newly pushed. --- disk/part_dos.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/disk/part_dos.c b/disk/part_dos.c index 936cee0d36ce..e19695846a95 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -27,11 +27,10 @@ */ static inline unsigned int le32_to_int(unsigned char *le32) { - return ((le32[3] << 24) + - (le32[2] << 16) + - (le32[1] << 8) + - le32[0] - ); + return (((unsigned int)le32[3] << 24) + + ((unsigned int)le32[2] << 16) + + ((unsigned int)le32[1] << 8) + + (unsigned int)le32[0]); } static inline int is_extended(int part_type) From patchwork Sun Aug 26 23:13:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugeniu Rosca X-Patchwork-Id: 962303 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="X0CgbJ34"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41z9xK3Td2z9ryt for ; Mon, 27 Aug 2018 09:20:53 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 12A17C21DFA; Sun, 26 Aug 2018 23:17:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BE424C21DD7; Sun, 26 Aug 2018 23:17:49 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 8706CC21DFF; Sun, 26 Aug 2018 23:16:32 +0000 (UTC) Received: from mail-wm0-f67.google.com (mail-wm0-f67.google.com [74.125.82.67]) by lists.denx.de (Postfix) with ESMTPS id 0BE2EC21C8B for ; Sun, 26 Aug 2018 23:16:29 +0000 (UTC) Received: by mail-wm0-f67.google.com with SMTP id o18-v6so6613213wmc.0 for ; Sun, 26 Aug 2018 16:16:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LjHOjUdGY/DQ/mIKlWl6ookE/Elnmsv4AKAXJZB+uu0=; b=X0CgbJ34zVQO+w/sKQ8oS6VtW2965PjHyDEvmzy3jqSVl0aqs/BX0a9sw+rBar5zQc R+GzQTMp9k6Y98wp+xkGNu60m71q5Azratg2272BZHxgq3tZrqnPFEquMOrqwMhVPAgp 4VGuQW0HuyV03eBGuXCb75IsVS9zhnkHbTPTB1yvP2cltt/i0F3gq2junokFhpqp9bDk 31rJnfaZkx6VuPThLd7d341R88MbqNiTn8A3nYJY3MSW4CRzF1+AtOApdvxq0z0rI7iG Pw1V6tzuYr/JxAb4u9BQJJKt/UL73AsWJgHB15K88Tpt08IPAkVfS65ynxE7Uv94tL5a BHDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LjHOjUdGY/DQ/mIKlWl6ookE/Elnmsv4AKAXJZB+uu0=; b=qkVTa2jPLO5wthA1P3wq7BUjRznu75tmrszvogoxOX+wY8RpJChvKbNTKkG222twbu JFFQASW+W8CiIAYZDn/GimlrRxHTBzQJftnD+F+dKV4cpjlRXnZaRMKayH3ty2o7FCZP 2yjZrTwi+L/U2pswqNuXDg4x6EO0d2qHl5vkzsxaOKSsVDt2JJrHDteCuTuSPGSerYnN dreg6UxWcHr1IYvfeJzpRTVVklHjAzJ0+N0vJ6uVQDXw5qvTLkcLGab6zpU/L7mmrci1 yWL7YyS3vgONIX9ywC4ZwJlplYtoreKRDNubpw2aNkcXglqEEw0X0VR18GqmBQBa6Ycr qNcA== X-Gm-Message-State: APzg51A9IUOi0wrBjkNYkcnjV2PhGRFo71x5LjVqrbOlQjvmNflG+i8c cKNRRLgTDMWOGyfLoEuGJpM= X-Google-Smtp-Source: ANB0VdasVIgNtDfW5NEd5OqAWE5WP7QZPoC5eXwznxs5V+o6g4cDf9DOAx1C3HnG4yZvQpHf2wz+0Q== X-Received: by 2002:a1c:cb4d:: with SMTP id b74-v6mr4442548wmg.123.1535325388726; Sun, 26 Aug 2018 16:16:28 -0700 (PDT) Received: from localhost.localdomain (ipb218f467.dynamic.kabel-deutschland.de. [178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.16.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:16:28 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:27 +0200 Message-Id: <20180826231332.2491-10-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> Cc: Eugeniu Rosca , Michal Simek , Eugeniu Rosca , Diego Dorta Subject: [U-Boot] [PATCH v2 09/13] common.h: Fix signed shift overflow in cpumask_next() X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Fix the following UBSAN report: ================================================================= UBSAN: Undefined behaviour in include/common.h:322:19 left shift of 1 by 31 places cannot be represented in type 'int' ================================================================= Steps to reproduce the above: * echo CONFIG_UBSAN=y >> configs/qemu-ppce500_defconfig * make ARCH=powerpc CROSS_COMPILE=/usr/bin/powerpc-linux-gnu- \ qemu-ppce500_defconfig all * qemu-system-ppc --version QEMU emulator version 2.5.0 (Debian 1:2.5+dfsg-5ubuntu10.31) * qemu-system-ppc -machine ppce500 -nographic -no-reboot -kernel u-boot It looks like cpumask_next() intentionally uses shift overflow in its for loop condition to break the loop. Relying on UB is not safe. Convert the numeric literal 1 to 1UL and limit its maximum shift index to 31. Fixes: fbb9ecf7493f ("powerpc/mp: add support for discontiguous cores") Signed-off-by: Eugeniu Rosca --- Changes in v2: - None. Newly pushed. --- include/common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/common.h b/include/common.h index 940161f1758b..5b92666d0e79 100644 --- a/include/common.h +++ b/include/common.h @@ -319,7 +319,7 @@ void trap_init (ulong); /* $(CPU)/cpu.c */ static inline int cpumask_next(int cpu, unsigned int mask) { - for (cpu++; !((1 << cpu) & mask); cpu++) + for (cpu++; (cpu < 31) && !((1UL << cpu) & mask); cpu++) ; return cpu; From patchwork Sun Aug 26 23:13:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugeniu Rosca X-Patchwork-Id: 962310 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="r3pL8pJP"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41zDMP21R0z9ryn for ; Mon, 27 Aug 2018 11:10:09 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 08FCEC21E45; Mon, 27 Aug 2018 01:09:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, KHOP_BIG_TO_CC, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B641CC21E13; Mon, 27 Aug 2018 01:08:12 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3736AC21E15; Sun, 26 Aug 2018 23:16:44 +0000 (UTC) Received: from mail-wr1-f67.google.com (mail-wr1-f67.google.com [209.85.221.67]) by lists.denx.de (Postfix) with ESMTPS id EF95AC21DD9 for ; Sun, 26 Aug 2018 23:16:40 +0000 (UTC) Received: by mail-wr1-f67.google.com with SMTP id v17-v6so11883319wrr.9 for ; Sun, 26 Aug 2018 16:16:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NhKS8g8/TZkc6fQhUY2eIr0PHkAUUI71lytV12SRdEE=; b=r3pL8pJPTSWlkY+vjvhYnC+Q5QXTnWal28TxdG3xP7d3AB8exOR511uvHwaErERiQ0 HFZrwA/rEgSwR4Nq1C23Z0N44xByuohauflF8wDWoPYiRD9ZlZYjhYJIb6SekbLm//do 878FAVOqqyQ2dnHuYidP4lh88FcfvqiGAprjOp/UiAogMt0r6ipZx1hmtQauMPoNTK/W CztEbja+ZWB2MazMkMg278SQilAWdakjLGo/oyw2NMbyOmszNkTiMVjcqnO5QGYlR7QR IZs9/ng9HiuWQJxWRkdmUcSXMOQ0GBIlK5sSxPjhdx4ZsNDfk6yPZCa8fsxabzlaeLxu JPzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NhKS8g8/TZkc6fQhUY2eIr0PHkAUUI71lytV12SRdEE=; b=JEI7Or08p79Z2C3YfpycSkQl+Ly6bCglhdhoNJmn3TdBgqVcStcvwlFkQI9+wCaSVs HKtE5nLqF/NRZWwM/jvtpS2E4tgss3FxMW70GhRJgRLwog1g3QVMl/u+zL6GZ0kKw0aj 3rk3l/RXQMZGIydol6GwfGri6SNjs6UBNa9lL2owcwzJ8UeFidk2CX1b8x4jMHrx0dWn EVIeiGGxO0bg9lAw5f7F6BBE+eRtTPmzKeyaSFdnMHLOYwzwf3MwZQLA9CEDm47EwoS7 IwwDpbpXH0llxKM7PzjcYSYnaFJcXQBjoSGXcONGbvgKWVv93+fzFSaotybY9jAEM/8e SDfA== X-Gm-Message-State: APzg51B7iLk+aPqzaBYX+g/Rvs3jxir47mFL2gKJgSS4UjEzsEiYooa7 yRfrpgJEfT/AbvDsc1yl8Mk= X-Google-Smtp-Source: ANB0VdaHrzQ0se0mG+PDTSW3UXGib5VL3ZEwejvETiQ2kX2TtE1V/TUfGfPAbXQFUsEhjdN/abVKkg== X-Received: by 2002:adf:c98d:: with SMTP id f13-v6mr7261324wrh.148.1535325400668; Sun, 26 Aug 2018 16:16:40 -0700 (PDT) Received: from localhost.localdomain (ipb218f467.dynamic.kabel-deutschland.de. [178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.16.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:16:39 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:28 +0200 Message-Id: <20180826231332.2491-11-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> X-Mailman-Approved-At: Mon, 27 Aug 2018 01:08:10 +0000 Cc: Baruch Siach , Michal Simek , Eugeniu Rosca , Suniel Mahesh , Vipul Kumar , Stephen Warren , eil Eilmsteiner Heribert , Karthik Tummala , Kishon Vijay Abraham I , Eugeniu Rosca , Guillaume GARDET , Jonathan Gray Subject: [U-Boot] [PATCH v2 10/13] mmc: Fix read-past-end-of-array X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Running "mmc dev 0" on R-Car H3 Salvator-X (CONFIG_UBSAN=y) occasionally results in: => mmc dev 0 ================================================================= UBSAN: Undefined behaviour in drivers/mmc/mmc.c:2233:14 index 7 is out of range for type 'int [4]' ================================================================= Currently, fbase[] array consists of 4 elements: -------8<------- static const int fbase[] = { 10000, 100000, 1000000, 10000000, }; -------8<------- Adjust the mask used to compute the fbase[] index accordingly. Fixes: 272cc70b211e ("Add MMC Framework") Signed-off-by: Eugeniu Rosca --- Changes in v2: - Shorten the summary line --- drivers/mmc/mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 447519f46f15..01da99edb084 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -2230,7 +2230,7 @@ static int mmc_startup(struct mmc *mmc) } /* divide frequency by 10, since the mults are 10x bigger */ - freq = fbase[(cmd.response[0] & 0x7)]; + freq = fbase[(cmd.response[0] & 0x3)]; mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; mmc->legacy_speed = freq * mult; From patchwork Sun Aug 26 23:13:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugeniu Rosca X-Patchwork-Id: 962299 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Q2Mf4Ykh"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41z9w33vvzz9ryt for ; Mon, 27 Aug 2018 09:19:47 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 48BE7C21DB6; Sun, 26 Aug 2018 23:17:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A5462C21E0F; Sun, 26 Aug 2018 23:16:57 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 43096C21D8A; Sun, 26 Aug 2018 23:16:49 +0000 (UTC) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by lists.denx.de (Postfix) with ESMTPS id 4DB4BC21DED for ; Sun, 26 Aug 2018 23:16:46 +0000 (UTC) Received: by mail-wr1-f66.google.com with SMTP id v17-v6so11883430wrr.9 for ; Sun, 26 Aug 2018 16:16:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wLuM1u2byWaxNToM+0njEcW10SIQKBrOP6uG2iPgD7k=; b=Q2Mf4YkhDEe36IVD6HcJ4w04JC9NXMcDB0Gox57SGZcpFgrwC7MyMpD6hbkl5+yIdX qkABv4dA4d7Po+dTyJlIMpHIc1vXjuBCwTp7JX6tVeQ/kUKt+/U/Kdc70gIWDNM8vCnx 5xIbr9TzoWgPRfjibbiVfy98dTrM+tz1VsYixSvvf5xUJOihWIdWRwOfFIOVBkiFo67n cYUWEXguibTdtQxxrPkEfiJFY/7khIfGIdKNc9w5uaEy6XLpczRG1Ln2zSNDEqp9TIU+ 5O3Bh/GM1fOcbZVT+9O/gL9PqHZz7gj+1UKUTgNyjfmQn9dQd0bC0IslGkFThRtxhVZz Jd6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wLuM1u2byWaxNToM+0njEcW10SIQKBrOP6uG2iPgD7k=; b=VLqFIbjAc5S3fM8+2tNZyvZaZhL/24afjLQ2p2urjLF0nZw+TIjEoH7/DQ71kPB6VV 300eePFRElyO5ECe9AO1IBG1VOGp5vi24/nWyswc8daHkM2Aeq6FQf/lnAQIwkvIJh8D LRbIreUuT/64vnmlLqUzYusmGa8jleM4K8hZMrN180H3tdM4v5CnaCdHwTY8JneIELBJ p3F+bMuTabDey4ekrQSEMqSCs2wriGdw3WWAjRqe1oD1in0hxPcZbQKVceYYrKp3WwlY Z3vdnmz93m8KZn2QZApmnNVnIsfyH0AmTFwvFlB9fxWV8elBqQORWxY5Xn5O+TXDzw+z NGJw== X-Gm-Message-State: APzg51AZdC40mCRPBFPA8mGjspFi9U0+Gpr1B1/9weYALf+pSfxM8gRX eASJmSXY9oMb3BlyBm/pjOBGcK9WF2s= X-Google-Smtp-Source: ANB0VdZHj6SdDMe7RsEG43oD/w//2IuNWQYT5IYlRsekLfB+YcTSSbYdp6jRkI9hq/HKi007qeKTug== X-Received: by 2002:adf:e8c1:: with SMTP id k1-v6mr6601472wrn.43.1535325406004; Sun, 26 Aug 2018 16:16:46 -0700 (PDT) Received: from localhost.localdomain (ipb218f467.dynamic.kabel-deutschland.de. [178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.16.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:16:45 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:29 +0200 Message-Id: <20180826231332.2491-12-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> Cc: Eugeniu Rosca , Eugeniu Rosca Subject: [U-Boot] [PATCH v2 11/13] hashtable: Fix zero-sized array X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enabling CONFIG_UBSAN=y, below runtime warning occurs both in sandbox and R-Car H3 Salvator-X U-Boot: ===================================================================== UBSAN: Undefined behaviour in lib/hashtable.c:784:8 variable length array bound value 0 <= 0 ===================================================================== It has a slightly different wording when compiling sandbox U-Boot with "gcc-8 -fsanitize=undefined -lubsan": -----8<----- lib/hashtable.c:784:8: runtime error: \ variable length array bound evaluates to non-positive value 0 -----8<----- Inspired from v4.11-rc1 commit 620711944459 ("crypto: algif_hash - avoid zero-sized array"), which fixes the same type of UB. Fixes: d5370febbcbc ("env: delete selected vars not present in imported env") Signed-off-by: Eugeniu Rosca Reviewed-by: Tom Rini --- Changes in v2: - Switch to a more elegant solution, inspired from v4.11-rc1 commit 620711944459 ("crypto: algif_hash - avoid zero-sized array") - Shorten the summary line - Drop Reviewed-by due to updates --- include/search.h | 2 +- lib/hashtable.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/search.h b/include/search.h index 5d07b49073cc..417dacdb4482 100644 --- a/include/search.h +++ b/include/search.h @@ -99,7 +99,7 @@ extern ssize_t hexport_r(struct hsearch_data *__htab, */ extern int himport_r(struct hsearch_data *__htab, const char *__env, size_t __size, const char __sep, - int __flag, int __crlf_is_lf, int nvars, + int __flag, int __crlf_is_lf, unsigned int nvars, char * const vars[]); /* Walk the whole table calling the callback on each element */ diff --git a/lib/hashtable.c b/lib/hashtable.c index 1c48692b69ed..e01a42993dd3 100644 --- a/lib/hashtable.c +++ b/lib/hashtable.c @@ -778,10 +778,10 @@ static int drop_var_from_set(const char *name, int nvars, char * vars[]) int himport_r(struct hsearch_data *htab, const char *env, size_t size, const char sep, int flag, - int crlf_is_lf, int nvars, char * const vars[]) + int crlf_is_lf, unsigned int nvars, char * const vars[]) { char *data, *sp, *dp, *name, *value; - char *localvars[nvars]; + char *localvars[nvars ? : 1]; int i; /* Test for correct arguments. */ From patchwork Sun Aug 26 23:13:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugeniu Rosca X-Patchwork-Id: 962302 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="XdDDtTsS"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41z9xG0rshz9ryt for ; Mon, 27 Aug 2018 09:20:50 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id C5A5EC21E35; Sun, 26 Aug 2018 23:19:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 8986AC21E0B; Sun, 26 Aug 2018 23:18:47 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 45C69C21C51; Sun, 26 Aug 2018 23:16:57 +0000 (UTC) Received: from mail-wm0-f66.google.com (mail-wm0-f66.google.com [74.125.82.66]) by lists.denx.de (Postfix) with ESMTPS id 96BC9C21E07 for ; Sun, 26 Aug 2018 23:16:52 +0000 (UTC) Received: by mail-wm0-f66.google.com with SMTP id c14-v6so6398894wmb.4 for ; Sun, 26 Aug 2018 16:16:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Hmt9XdJ6luvwJAGyoTBIt9sEZhiJmyf/YBq9uJHgv28=; b=XdDDtTsSR1yoPWtBVWu8mZYs1AYa5khpb6Uq25s2ATlr1O0OaP48zGM7344GsBYF0J rC+aQxUJSTklEyC3fNNI2eJbL5gQTMklvs0SyCEYTiWlQuqzPhcKo6Fr/78WtlijchD9 eyoNocf5QUrTjOltUpIyWmuEsxVXo/QaQy6UJeCoFW+5cM1Szu8sEDTrxMXDs0N7ErR7 GKHEP9lv4Eh2Z8xgFxPxlBwcg3nqIgvPKHWXgU2vihNkG2XwMsOGf2w90liJ9fcJiDDS 5E+36pxseY8J3yYhJ9vib+vLYtYYFNo7/G/lXbhnIjaigAsQGy1xLjCXyw8JWBUibTeB BqKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Hmt9XdJ6luvwJAGyoTBIt9sEZhiJmyf/YBq9uJHgv28=; b=FeEILh/dEpPk1OsTkBo9p3Y2LtAuhCJo2CHfT4omnmbczxO3TDJKfykkya3VkDJaNV kEs8zh6XETh0KTnSqkpHP3g+W/47HuZ/jS9mgUWy7gmhJv9jpKDoCEPlO1f+Kvxog2QD 6n/93PFtHfly0Isk0IJj83qBLviLPv3hOZsiWQM0DDHj96/2v35qevAPIYurJvNOb/KK nSazEZT1k/3S8gV+V3r9eijx4flF5cxC3UAjY3wkVrc7QeK4kS8jH88nMxt6jhIR+HOt jrW1wT9CMQTgN5/f9ihWRVO6Sc7VI/n+AIz11rhS+KrwTebYtqA1heNzfmvQZ93/gHU8 SAYg== X-Gm-Message-State: APzg51Dz2CD53xG1bUHUStT5O5vww1V0/PbXuuC85OslH2ePYXWnoP50 6NKIBilhIWUHdns9xX4I958= X-Google-Smtp-Source: ANB0VdbrMwdcrYmarJUmpbD9Ze0VKhh7j07N1wxb6G6lsU5s40cnn23tvvGhxNkCnnXqxx7BqN1umg== X-Received: by 2002:a1c:5e48:: with SMTP id s69-v6mr3965287wmb.19.1535325412273; Sun, 26 Aug 2018 16:16:52 -0700 (PDT) Received: from localhost.localdomain (ipb218f467.dynamic.kabel-deutschland.de. [178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.16.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:16:51 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:30 +0200 Message-Id: <20180826231332.2491-13-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> Cc: Heinrich Schuchardt , Eugeniu Rosca , Eugeniu Rosca Subject: [U-Boot] [PATCH v2 12/13] input: Fix zero-sized array X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Fix below UBSAN reports, thrown on sandbox: ============================================================ UBSAN: Undefined behaviour in drivers/input/input.c:512:7 variable length array bound value 0 <= 0 ============================================================ ============================================================ UBSAN: Undefined behaviour in drivers/input/input.c:340:6 variable length array bound value 0 <= 0 ============================================================ Inspired from Linux v4.11-rc1 commit 620711944459 ("crypto: algif_hash - avoid zero-sized array"). Fixes: 9bc590e5119f ("input: Add generic keyboard input handler") Signed-off-by: Eugeniu Rosca Reviewed-by: Tom Rini --- Changes in v2: - None. Newly pushed. --- drivers/input/input.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/input/input.c b/drivers/input/input.c index 29620a9e2793..a8fd197883aa 100644 --- a/drivers/input/input.c +++ b/drivers/input/input.c @@ -337,7 +337,7 @@ static int array_search(int *array, int count, int key) static int sort_array_by_ordering(int *dest, int count, int *order, int ocount) { - int temp[count]; + int temp[count ? : 1]; int dest_count; int same; /* number of elements which are the same */ int i; @@ -509,7 +509,7 @@ static int input_keycodes_to_ascii(struct input_config *config, static int _input_send_keycodes(struct input_config *config, int keycode[], int num_keycodes, bool do_send) { - char ch[num_keycodes * ANSI_CHAR_MAX]; + char ch[(num_keycodes * ANSI_CHAR_MAX) ? : 1]; int count, i, same = 0; int is_repeat = 0; unsigned delay_ms; From patchwork Sun Aug 26 23:13:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugeniu Rosca X-Patchwork-Id: 962301 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="DVg7KUGC"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41z9wh3Dy4z9ryt for ; Mon, 27 Aug 2018 09:20:20 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 36AE4C21DEC; Sun, 26 Aug 2018 23:18:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A734DC21DFA; Sun, 26 Aug 2018 23:18:44 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3E35CC21C51; Sun, 26 Aug 2018 23:17:02 +0000 (UTC) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by lists.denx.de (Postfix) with ESMTPS id 131FCC21DFF for ; Sun, 26 Aug 2018 23:16:59 +0000 (UTC) Received: by mail-wr1-f66.google.com with SMTP id g33-v6so11897560wrd.1 for ; Sun, 26 Aug 2018 16:16:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FS6BTiCy4Az49vRlqCcBNKsjOpPTKFOBX2gvZe0BGII=; b=DVg7KUGC4rIcEbhIYhyN/qXLISfk0e8SbjSdqSUPv7oTmCkf6Bl1eGWx6BCWK0+UDi fAZahsrCausaHepcY3OTUy0YfSGfiIO8/g6Tchs528YsvBPvHPIsN/o3DAsizFsI1xIt mOUzDcj4YwMMCSOLFSXtZXZ5MTf/qdfHOjZ2HIc6P5QTa7YpUmvCj9aMeYeVaW6J88J1 QP2iPEEIFFE+2JRIesqCx3p2QY2kw5J2/yX8UdUhhRqkFpEZa/Pajnj66oVOkpvi1J1k OVcylAy5sY/8WSAczhDLg2U0W/zLlEhdZfsLNZ9gEk0TGXCtDYQ+RNlpobGVOMQlCvoi b2Yw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FS6BTiCy4Az49vRlqCcBNKsjOpPTKFOBX2gvZe0BGII=; b=QRhrVAG8CQOqUkKYGEDE7UMADGpw9qsij7/BZHG9rIMESsZ9vVevIRpIkYjegDZb3g s4tGgjXlPHNpR9D2jl+6ysUm1/gVZvLKf/DLcITTjIPEubh/LZSsZQk+Ar1QOpa+Ba5F WZDB3ybN8jBsGhvUHr6Ih77Yw9crcCJwHLx6KHI+OfyLYhHDFw8DB0nrOM4lZPP69Js4 lXZ67xBJ17LxX8SjrMTGihWaJf8n87uHgRJxj9jXUc65iK0tl50Fx+v+9OkxLOntQ06M 46v+aAyIIsDzHtyMtm3lA7NR0aT8fI5BVdh09aY7o/UXldBddOGpVIUBNOg/YhT1FutW zZUg== X-Gm-Message-State: APzg51AvzpCAJGDt2eygrfhDAFC3QUljsI0yFsOGvGetRs89ENVtha6j RD8t5ypE6Nv9bLV0eEE7KfU5aJqoLS4= X-Google-Smtp-Source: ANB0VdY7OubzPR64+2CYBXYvyiKhtxvtICItFi9ylD1+Ea2uk+w4471N2tC/+djsPdp/f+on5K6txw== X-Received: by 2002:adf:ff82:: with SMTP id j2-v6mr6517492wrr.165.1535325418781; Sun, 26 Aug 2018 16:16:58 -0700 (PDT) Received: from localhost.localdomain (ipb218f467.dynamic.kabel-deutschland.de. [178.24.244.103]) by smtp.gmail.com with ESMTPSA id e141-v6sm10828362wmd.32.2018.08.26.16.16.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Aug 2018 16:16:58 -0700 (PDT) From: Eugeniu Rosca X-Google-Original-From: Eugeniu Rosca To: Tom Rini , u-boot@lists.denx.de Date: Mon, 27 Aug 2018 01:13:31 +0200 Message-Id: <20180826231332.2491-14-erosca@de.adit-jv.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180826231332.2491-1-erosca@de.adit-jv.com> References: <20180826231332.2491-1-erosca@de.adit-jv.com> Cc: Eugeniu Rosca , Pantelis Antoniou , Michal Simek , Alison Chaiken , Miquel Raynal , Eugeniu Rosca Subject: [U-Boot] [PATCH v2 13/13] configs: sandbox*: Enable UBSAN X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" On Sun, Aug 19, 2018 at 09:51:32PM -0400, Tom Rini wrote: > [..] we should be able to say more broadly that just about everyone > can enable this, but only out of the box sandbox should. Hence, turn UBSAN on for every available sandbox flavor. Make sure the inserted line complies with `make savedefconfig`. The size increase of sandbox_defconfig U-Boot (gcc 8.1.0): $ size u-boot.sandbox.* text data bss dec hex filename 1234958 80048 291472 1606478 18834e u-boot.sandbox.default 1422710 272240 291472 1986422 1e4f76 u-boot.sandbox.ubsan +187752 +192192 0 +379944 Signed-off-by: Eugeniu Rosca --- Changes in v2: - None. Newly pushed. --- configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + configs/sandbox_flattree_defconfig | 1 + configs/sandbox_noblk_defconfig | 1 + configs/sandbox_spl_defconfig | 1 + 5 files changed, 5 insertions(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index ebb3716e487a..006b0505edbf 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -195,6 +195,7 @@ CONFIG_TPM=y CONFIG_LZ4=y CONFIG_ERRNO_STR=y CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_UBSAN=y CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 96e951493698..1a8434f403cb 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -200,6 +200,7 @@ CONFIG_TPM=y CONFIG_LZ4=y CONFIG_ERRNO_STR=y CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_UBSAN=y CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index ca70f0437e40..0bcee60c4d77 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -171,6 +171,7 @@ CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y CONFIG_LZ4=y CONFIG_ERRNO_STR=y +CONFIG_UBSAN=y CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig index f70088ad7e9b..5da95a8a1726 100644 --- a/configs/sandbox_noblk_defconfig +++ b/configs/sandbox_noblk_defconfig @@ -172,6 +172,7 @@ CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y CONFIG_LZ4=y CONFIG_ERRNO_STR=y +CONFIG_UBSAN=y CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 315f721266e9..ab331cb5ae2a 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -191,6 +191,7 @@ CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y CONFIG_LZ4=y CONFIG_ERRNO_STR=y +CONFIG_UBSAN=y CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y