From patchwork Wed Jul 25 19:25:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joe Hershberger X-Patchwork-Id: 949356 X-Patchwork-Delegate: joe.hershberger@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ni.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41bQJP5KmGz9s0w for ; Thu, 26 Jul 2018 05:28:53 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 6D03EC21DD3; Wed, 25 Jul 2018 19:28:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id EB2CDC21C27; Wed, 25 Jul 2018 19:27:50 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 58602C21C3F; Wed, 25 Jul 2018 19:27:49 +0000 (UTC) Received: from mx0b-00010702.pphosted.com (mx0a-00010702.pphosted.com [148.163.156.75]) by lists.denx.de (Postfix) with ESMTPS id 7AC78C21BE5 for ; Wed, 25 Jul 2018 19:27:48 +0000 (UTC) Received: from pps.filterd (m0098780.ppops.net [127.0.0.1]) by mx0a-00010702.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w6PJQCcV026184; Wed, 25 Jul 2018 14:27:36 -0500 Received: from ni.com (skprod2.natinst.com [130.164.80.23]) by mx0a-00010702.pphosted.com with ESMTP id 2kewd3ga44-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 25 Jul 2018 14:27:36 -0500 Received: from us-aus-exhub1.ni.corp.natinst.com (us-aus-exhub1.ni.corp.natinst.com [130.164.68.41]) by us-aus-skprod2.natinst.com (8.16.0.22/8.16.0.22) with ESMTPS id w6PJRZFU028908 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 25 Jul 2018 14:27:35 -0500 Received: from us-aus-exch5.ni.corp.natinst.com (130.164.68.15) by us-aus-exhub1.ni.corp.natinst.com (130.164.68.41) with Microsoft SMTP Server (TLS) id 15.0.1156.6; Wed, 25 Jul 2018 14:27:35 -0500 Received: from us-aus-exhub1.ni.corp.natinst.com (130.164.68.41) by us-aus-exch5.ni.corp.natinst.com (130.164.68.15) with Microsoft SMTP Server (TLS) id 15.0.1156.6; Wed, 25 Jul 2018 14:27:35 -0500 Received: from linux-xvxi.natinst.com (130.164.49.7) by us-aus-exhub1.ni.corp.natinst.com (130.164.68.41) with Microsoft SMTP Server id 15.0.1156.6 via Frontend Transport; Wed, 25 Jul 2018 14:27:35 -0500 From: Joe Hershberger To: Date: Wed, 25 Jul 2018 14:25:30 -0500 Message-ID: <1532546732-11423-2-git-send-email-joe.hershberger@ni.com> X-Mailer: git-send-email 1.7.11.5 In-Reply-To: <1532546732-11423-1-git-send-email-joe.hershberger@ni.com> References: <1532546732-11423-1-git-send-email-joe.hershberger@ni.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-07-25_04:, , signatures=0 X-Proofpoint-Spam-Reason: safe Cc: Tom Rini , Sumit Garg , Heinrich Schuchardt , Alexander Graf , Joe Hershberger , Wenbin song Subject: [U-Boot] [PATCH 1/3] arm: Prevent redefinition error in fsl-layerscape X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The include/phy.h will start including dm.h, which pulls in linux/compat.h after the attempted redefinition in arch/arm/include/asm/armv8/mmu.h, so move this include to allow redefinition. Signed-off-by: Joe Hershberger --- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 40c2c3a..052e070 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -18,7 +19,6 @@ #include #include #include -#include #include #ifdef CONFIG_FSL_ESDHC #include From patchwork Wed Jul 25 19:25:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joe Hershberger X-Patchwork-Id: 949355 X-Patchwork-Delegate: joe.hershberger@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ni.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41bQHK5jbtz9s0w for ; Thu, 26 Jul 2018 05:27:57 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 73ED6C21D8E; Wed, 25 Jul 2018 19:27:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.8 required=5.0 tests=UPPERCASE_50_75 autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0FC27C21C29; Wed, 25 Jul 2018 19:27:49 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id CDFA1C21C27; Wed, 25 Jul 2018 19:27:47 +0000 (UTC) Received: from mx0b-00010702.pphosted.com (mx0a-00010702.pphosted.com [148.163.156.75]) by lists.denx.de (Postfix) with ESMTPS id 33B69C21BE5 for ; Wed, 25 Jul 2018 19:27:47 +0000 (UTC) Received: from pps.filterd (m0098781.ppops.net [127.0.0.1]) by mx0a-00010702.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w6PJQUcE013600; Wed, 25 Jul 2018 14:27:36 -0500 Received: from ni.com (skprod3.natinst.com [130.164.80.24]) by mx0a-00010702.pphosted.com with ESMTP id 2kewd30abv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 25 Jul 2018 14:27:36 -0500 Received: from us-aus-exch2.ni.corp.natinst.com (us-aus-exch2.ni.corp.natinst.com [130.164.68.12]) by us-aus-skprod3.natinst.com (8.16.0.22/8.16.0.22) with ESMTPS id w6PJRZlK027965 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 25 Jul 2018 14:27:35 -0500 Received: from us-aus-exhub1.ni.corp.natinst.com (130.164.68.41) by us-aus-exch2.ni.corp.natinst.com (130.164.68.12) with Microsoft SMTP Server (TLS) id 15.0.1156.6; Wed, 25 Jul 2018 14:27:35 -0500 Received: from linux-xvxi.natinst.com (130.164.49.7) by us-aus-exhub1.ni.corp.natinst.com (130.164.68.41) with Microsoft SMTP Server id 15.0.1156.6 via Frontend Transport; Wed, 25 Jul 2018 14:27:35 -0500 From: Joe Hershberger To: Date: Wed, 25 Jul 2018 14:25:31 -0500 Message-ID: <1532546732-11423-3-git-send-email-joe.hershberger@ni.com> X-Mailer: git-send-email 1.7.11.5 In-Reply-To: <1532546732-11423-1-git-send-email-joe.hershberger@ni.com> References: <1532546732-11423-1-git-send-email-joe.hershberger@ni.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-07-25_04:, , signatures=0 X-Proofpoint-Spam-Reason: safe Cc: Alexandru Gagniuc , Joe Hershberger , Stefan Roese Subject: [U-Boot] [PATCH 2/3] phy: Break include cycle X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Because some phy wants to export some functions [1], export.h was including the whole phy subsystem which pulls in lots of stuff that causes some ordering and redefinition issues. Split out the only part that is actually needed in export.h and include it there and in phy.h. [1] commit 95279315076c ("board/ls2085rdb: Export functions for standalone AQ FW load apps") Signed-off-by: Joe Hershberger --- include/exports.h | 3 +-- include/phy.h | 55 +---------------------------------------- include/phy_interface.h | 65 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 67 insertions(+), 56 deletions(-) create mode 100644 include/phy_interface.h diff --git a/include/exports.h b/include/exports.h index ebe81d9..a4b862f 100644 --- a/include/exports.h +++ b/include/exports.h @@ -3,8 +3,7 @@ #ifndef __ASSEMBLY__ #ifdef CONFIG_PHY_AQUANTIA -#include -#include +#include #endif struct spi_slave; diff --git a/include/phy.h b/include/phy.h index 7c3fc5c..09645a8 100644 --- a/include/phy.h +++ b/include/phy.h @@ -13,6 +13,7 @@ #include #include #include +#include #define PHY_FIXED_ID 0xa5a55a5a @@ -48,60 +49,6 @@ #endif -typedef enum { - PHY_INTERFACE_MODE_MII, - PHY_INTERFACE_MODE_GMII, - PHY_INTERFACE_MODE_SGMII, - PHY_INTERFACE_MODE_SGMII_2500, - PHY_INTERFACE_MODE_QSGMII, - PHY_INTERFACE_MODE_TBI, - PHY_INTERFACE_MODE_RMII, - PHY_INTERFACE_MODE_RGMII, - PHY_INTERFACE_MODE_RGMII_ID, - PHY_INTERFACE_MODE_RGMII_RXID, - PHY_INTERFACE_MODE_RGMII_TXID, - PHY_INTERFACE_MODE_RTBI, - PHY_INTERFACE_MODE_XGMII, - PHY_INTERFACE_MODE_XAUI, - PHY_INTERFACE_MODE_RXAUI, - PHY_INTERFACE_MODE_SFI, - PHY_INTERFACE_MODE_INTERNAL, - PHY_INTERFACE_MODE_NONE, /* Must be last */ - - PHY_INTERFACE_MODE_COUNT, -} phy_interface_t; - -static const char *phy_interface_strings[] = { - [PHY_INTERFACE_MODE_MII] = "mii", - [PHY_INTERFACE_MODE_GMII] = "gmii", - [PHY_INTERFACE_MODE_SGMII] = "sgmii", - [PHY_INTERFACE_MODE_SGMII_2500] = "sgmii-2500", - [PHY_INTERFACE_MODE_QSGMII] = "qsgmii", - [PHY_INTERFACE_MODE_TBI] = "tbi", - [PHY_INTERFACE_MODE_RMII] = "rmii", - [PHY_INTERFACE_MODE_RGMII] = "rgmii", - [PHY_INTERFACE_MODE_RGMII_ID] = "rgmii-id", - [PHY_INTERFACE_MODE_RGMII_RXID] = "rgmii-rxid", - [PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid", - [PHY_INTERFACE_MODE_RTBI] = "rtbi", - [PHY_INTERFACE_MODE_XGMII] = "xgmii", - [PHY_INTERFACE_MODE_XAUI] = "xaui", - [PHY_INTERFACE_MODE_RXAUI] = "rxaui", - [PHY_INTERFACE_MODE_SFI] = "sfi", - [PHY_INTERFACE_MODE_INTERNAL] = "internal", - [PHY_INTERFACE_MODE_NONE] = "", -}; - -static inline const char *phy_string_for_interface(phy_interface_t i) -{ - /* Default to unknown */ - if (i > PHY_INTERFACE_MODE_NONE) - i = PHY_INTERFACE_MODE_NONE; - - return phy_interface_strings[i]; -} - - struct phy_device; #define MDIO_NAME_LEN 32 diff --git a/include/phy_interface.h b/include/phy_interface.h new file mode 100644 index 0000000..0760d65 --- /dev/null +++ b/include/phy_interface.h @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * Andy Fleming + * + * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h + */ + +#ifndef _PHY_INTERFACE_H +#define _PHY_INTERFACE_H + +typedef enum { + PHY_INTERFACE_MODE_MII, + PHY_INTERFACE_MODE_GMII, + PHY_INTERFACE_MODE_SGMII, + PHY_INTERFACE_MODE_SGMII_2500, + PHY_INTERFACE_MODE_QSGMII, + PHY_INTERFACE_MODE_TBI, + PHY_INTERFACE_MODE_RMII, + PHY_INTERFACE_MODE_RGMII, + PHY_INTERFACE_MODE_RGMII_ID, + PHY_INTERFACE_MODE_RGMII_RXID, + PHY_INTERFACE_MODE_RGMII_TXID, + PHY_INTERFACE_MODE_RTBI, + PHY_INTERFACE_MODE_XGMII, + PHY_INTERFACE_MODE_XAUI, + PHY_INTERFACE_MODE_RXAUI, + PHY_INTERFACE_MODE_SFI, + PHY_INTERFACE_MODE_INTERNAL, + PHY_INTERFACE_MODE_NONE, /* Must be last */ + + PHY_INTERFACE_MODE_COUNT, +} phy_interface_t; + +static const char * const phy_interface_strings[] = { + [PHY_INTERFACE_MODE_MII] = "mii", + [PHY_INTERFACE_MODE_GMII] = "gmii", + [PHY_INTERFACE_MODE_SGMII] = "sgmii", + [PHY_INTERFACE_MODE_SGMII_2500] = "sgmii-2500", + [PHY_INTERFACE_MODE_QSGMII] = "qsgmii", + [PHY_INTERFACE_MODE_TBI] = "tbi", + [PHY_INTERFACE_MODE_RMII] = "rmii", + [PHY_INTERFACE_MODE_RGMII] = "rgmii", + [PHY_INTERFACE_MODE_RGMII_ID] = "rgmii-id", + [PHY_INTERFACE_MODE_RGMII_RXID] = "rgmii-rxid", + [PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid", + [PHY_INTERFACE_MODE_RTBI] = "rtbi", + [PHY_INTERFACE_MODE_XGMII] = "xgmii", + [PHY_INTERFACE_MODE_XAUI] = "xaui", + [PHY_INTERFACE_MODE_RXAUI] = "rxaui", + [PHY_INTERFACE_MODE_SFI] = "sfi", + [PHY_INTERFACE_MODE_INTERNAL] = "internal", + [PHY_INTERFACE_MODE_NONE] = "", +}; + +static inline const char *phy_string_for_interface(phy_interface_t i) +{ + /* Default to unknown */ + if (i > PHY_INTERFACE_MODE_NONE) + i = PHY_INTERFACE_MODE_NONE; + + return phy_interface_strings[i]; +} + +#endif /* _PHY_INTERFACE_H */ From patchwork Wed Jul 25 19:25:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joe Hershberger X-Patchwork-Id: 949357 X-Patchwork-Delegate: joe.hershberger@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ni.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41bQJs1VM0z9s0w for ; Thu, 26 Jul 2018 05:29:17 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id DC849C21E0B; Wed, 25 Jul 2018 19:28:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0F05EC21BE5; Wed, 25 Jul 2018 19:28:23 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A05C2C21DA1; Wed, 25 Jul 2018 19:28:03 +0000 (UTC) Received: from mx0b-00010702.pphosted.com (mx0a-00010702.pphosted.com [148.163.156.75]) by lists.denx.de (Postfix) with ESMTPS id 67389C21D65 for ; Wed, 25 Jul 2018 19:27:59 +0000 (UTC) Received: from pps.filterd (m0098781.ppops.net [127.0.0.1]) by mx0a-00010702.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w6PJQUcF013600; Wed, 25 Jul 2018 14:27:37 -0500 Received: from ni.com (skprod2.natinst.com [130.164.80.23]) by mx0a-00010702.pphosted.com with ESMTP id 2kewd30abx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 25 Jul 2018 14:27:36 -0500 Received: from us-aus-exhub2.ni.corp.natinst.com (us-aus-exhub2.ni.corp.natinst.com [130.164.68.32]) by us-aus-skprod2.natinst.com (8.16.0.22/8.16.0.22) with ESMTPS id w6PJRaLS028911 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 25 Jul 2018 14:27:36 -0500 Received: from us-aus-exhub1.ni.corp.natinst.com (130.164.68.41) by us-aus-exhub2.ni.corp.natinst.com (130.164.68.32) with Microsoft SMTP Server (TLS) id 15.0.1156.6; Wed, 25 Jul 2018 14:27:35 -0500 Received: from linux-xvxi.natinst.com (130.164.49.7) by us-aus-exhub1.ni.corp.natinst.com (130.164.68.41) with Microsoft SMTP Server id 15.0.1156.6 via Frontend Transport; Wed, 25 Jul 2018 14:27:35 -0500 From: Joe Hershberger To: Date: Wed, 25 Jul 2018 14:25:32 -0500 Message-ID: <1532546732-11423-4-git-send-email-joe.hershberger@ni.com> X-Mailer: git-send-email 1.7.11.5 In-Reply-To: <1532546732-11423-1-git-send-email-joe.hershberger@ni.com> References: <1532546732-11423-1-git-send-email-joe.hershberger@ni.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-07-25_04:, , signatures=0 X-Proofpoint-Spam-Reason: safe Cc: Arno Steffens , Alexandru Gagniuc , Arun Parameswaran , Joe Hershberger , Stefan Roese , Sebastien Bourdelin Subject: [U-Boot] [PATCH 3/3] net: phy: Clean up includes of common.h X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" We want to be able to include some other system headers in phy.h but that requires us to have included common.h in the top-level first. Also, common.h includes config.h as the first thing it does, so don't include it directly. Seried-cc: ti Signed-off-by: Joe Hershberger --- drivers/net/phy/atheros.c | 1 + drivers/net/phy/broadcom.c | 1 - drivers/net/phy/davicom.c | 1 + drivers/net/phy/generic_10g.c | 2 -- drivers/net/phy/lxt.c | 1 + drivers/net/phy/marvell.c | 1 - drivers/net/phy/micrel_ksz8xxx.c | 1 - drivers/net/phy/micrel_ksz90x1.c | 2 -- drivers/net/phy/natsemi.c | 1 + drivers/net/phy/phy.c | 2 -- drivers/net/phy/realtek.c | 1 - drivers/net/phy/smsc.c | 1 + drivers/net/phy/teranetics.c | 1 - drivers/net/phy/vitesse.c | 1 + 14 files changed, 6 insertions(+), 11 deletions(-) diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 79f68af..3783d15 100644 --- a/drivers/net/phy/atheros.c +++ b/drivers/net/phy/atheros.c @@ -5,6 +5,7 @@ * Copyright 2011, 2013 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include #include #define AR803x_PHY_DEBUG_ADDR_REG 0x1d diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c index 202e3dd..3399fd2 100644 --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c @@ -5,7 +5,6 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ -#include #include #include diff --git a/drivers/net/phy/davicom.c b/drivers/net/phy/davicom.c index 27c7788..4666497 100644 --- a/drivers/net/phy/davicom.c +++ b/drivers/net/phy/davicom.c @@ -5,6 +5,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include #include #define MIIM_DM9161_SCR 0x10 diff --git a/drivers/net/phy/generic_10g.c b/drivers/net/phy/generic_10g.c index 1024d7d..b4384e1 100644 --- a/drivers/net/phy/generic_10g.c +++ b/drivers/net/phy/generic_10g.c @@ -7,8 +7,6 @@ * * Based loosely off of Linux's PHY Lib */ - -#include #include #include #include diff --git a/drivers/net/phy/lxt.c b/drivers/net/phy/lxt.c index 5942664..2618deb 100644 --- a/drivers/net/phy/lxt.c +++ b/drivers/net/phy/lxt.c @@ -5,6 +5,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include #include /* LXT971 Status 2 registers */ diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index 436ff57..efbbd31 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -5,7 +5,6 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ -#include #include #include #include diff --git a/drivers/net/phy/micrel_ksz8xxx.c b/drivers/net/phy/micrel_ksz8xxx.c index c70c036..3411150 100644 --- a/drivers/net/phy/micrel_ksz8xxx.c +++ b/drivers/net/phy/micrel_ksz8xxx.c @@ -6,7 +6,6 @@ * author Andy Fleming * (C) 2012 NetModule AG, David Andrey, added KSZ9031 */ -#include #include #include #include diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c index 5462532..3951535 100644 --- a/drivers/net/phy/micrel_ksz90x1.c +++ b/drivers/net/phy/micrel_ksz90x1.c @@ -8,8 +8,6 @@ * (C) Copyright 2017 Adaptrum, Inc. * Written by Alexandru Gagniuc for Adaptrum, Inc. */ - -#include #include #include #include diff --git a/drivers/net/phy/natsemi.c b/drivers/net/phy/natsemi.c index 05c7e7c..efde457 100644 --- a/drivers/net/phy/natsemi.c +++ b/drivers/net/phy/natsemi.c @@ -5,6 +5,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ +#include #include /* NatSemi DP83630 */ diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 4e610bf..a88c13a 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -7,8 +7,6 @@ * * Based loosely off of Linux's PHY Lib */ - -#include #include #include #include diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index b0867af..b3e6578 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -6,7 +6,6 @@ * author Andy Fleming * Copyright 2016 Karsten Merker */ -#include #include #include #include diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c index 2f92957..7740a25 100644 --- a/drivers/net/phy/smsc.c +++ b/drivers/net/phy/smsc.c @@ -9,6 +9,7 @@ * Some code copied from linux kernel * Copyright (c) 2006 Herbert Valerio Riedel */ +#include #include /* This code does not check the partner abilities. */ diff --git a/drivers/net/phy/teranetics.c b/drivers/net/phy/teranetics.c index d674e8f..49d6a1a 100644 --- a/drivers/net/phy/teranetics.c +++ b/drivers/net/phy/teranetics.c @@ -5,7 +5,6 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. * author Andy Fleming */ -#include #include #include diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c index 9df4a3f..eca26c9 100644 --- a/drivers/net/phy/vitesse.c +++ b/drivers/net/phy/vitesse.c @@ -6,6 +6,7 @@ * Original Author: Andy Fleming * Add vsc8662 phy support - Priyanka Jain */ +#include #include /* Cicada Auxiliary Control/Status Register */