From patchwork Mon Jul 23 19:38:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 947945 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qnY9cos1"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41ZBf666m2z9rxx for ; Tue, 24 Jul 2018 05:39:58 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728390AbeGWUmk (ORCPT ); Mon, 23 Jul 2018 16:42:40 -0400 Received: from mail-qk0-f196.google.com ([209.85.220.196]:41911 "EHLO mail-qk0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728296AbeGWUmk (ORCPT ); Mon, 23 Jul 2018 16:42:40 -0400 Received: by mail-qk0-f196.google.com with SMTP id d22-v6so1178601qkc.8; Mon, 23 Jul 2018 12:39:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ct8x3E30AHH6EAGdxFhW39P6ckuCN8DkFYXBfUia9T8=; b=qnY9cos1j+8xXzxzAY8Pp1B+LTj/fPhTCHA0WAQWf2657r4FX4J9J+Dvy1OBsgfy6Q AIu7MnYBQx+hyZoeAVj1RR5DE+TqmF8WllgcFrEf9mVUQ7qLypAa7FuvU4ZgWMpBzklR ykqwk3OBf4sdUACK81scjRRUJtNgF6+ursARazWXZO+tCh03wnmR7OP8XDee3BVn8uah 8oiNtgaa6S1DqP82E2I9OBxSqx3iUVwtBGx3bG/L7IslkIL8l0BnOiC3i+7Zmozz6PRu 5ZgE9uK71IctEfNHOQLr94QlQWwhTdTocYKVGsYqiHA+tbLZkPYDBzx/W4oBD1jAnSCV 2n4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ct8x3E30AHH6EAGdxFhW39P6ckuCN8DkFYXBfUia9T8=; b=XzgGULLqNv8vGjZk2F1X6bYU/pAYBRK6FGFwHpyPRqXSN9VEuXtIf0OSQIPZIdtOuS CmLLpisMVC1N51nH9QqfYtzHl9bnmGcraJf/vM8BvBi0uW/L7iCoQXOKXsbcE+tVdFok tFDfSV5IMXfMpK3+A+WyJcGANo3OAfTjvPBVprBXDXKGYu3vzoS4UZqZiW9DX5+RfVnI DCs4PqvKMNHU8TtHNVGEgZlIKUu+wZAoDtLYj2tFw4+2bKVxwnT2BkRPny55Fzqdg4p0 2eC9PisFQDLUuiTKJ6BfBm5t/DTSvEvD7NytTSC/+kJYu+dQFzOiuCeZ4WPI4WSQwLWQ pPSw== X-Gm-Message-State: AOUpUlFcP7d+LNoyFUtJadA8B2qbvBH7ZwaTa/YwsRTDc9o8VRMIzODM dMyLxiwAwVkqXtZLXv8hiS0= X-Google-Smtp-Source: AAOMgpcILs2y9tRH6jfO0mh4kttVvIYl4LY6qrsca8syvZrUfRJK8ekbAncE1p9jBgK/mkPOHDtV2g== X-Received: by 2002:a37:cc44:: with SMTP id r65-v6mr13215944qki.285.1532374797141; Mon, 23 Jul 2018 12:39:57 -0700 (PDT) Received: from localhost.localdomain (c-73-134-220-116.hsd1.md.comcast.net. [73.134.220.116]) by smtp.gmail.com with ESMTPSA id 16-v6sm6863042qkd.93.2018.07.23.12.39.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 23 Jul 2018 12:39:56 -0700 (PDT) From: Peter Geis To: broonie@kernel.org Cc: lgirdwood@gmail.com, robh+dt@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, Peter Geis Subject: [PATCH 1/2 v2] Add sw2_sw4 voltage table to cpcap regulator. Date: Mon, 23 Jul 2018 15:38:47 -0400 Message-Id: <20180723193848.32491-2-pgwipeout@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180723193848.32491-1-pgwipeout@gmail.com> References: <20180723193848.32491-1-pgwipeout@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org SW2 and SW4 use a shared table to provide voltage to the cpu core and devices on Tegra hardware. Added this table to the cpcap regulator driver as the first step to supporting this device on Tegra. Signed-off-by: Peter Geis --- drivers/regulator/cpcap-regulator.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/regulator/cpcap-regulator.c b/drivers/regulator/cpcap-regulator.c index bd910fe123d9..c0b1e04bd90f 100644 --- a/drivers/regulator/cpcap-regulator.c +++ b/drivers/regulator/cpcap-regulator.c @@ -271,6 +271,29 @@ static struct regulator_ops cpcap_regulator_ops = { }; static const unsigned int unknown_val_tbl[] = { 0, }; +static const unsigned int sw2_sw4_val_tbl[] = { 612500, 625000, 637500, + 650000, 662500, 675000, + 687500, 700000, 712500, + 725000, 737500, 750000, + 762500, 775000, 787500, + 800000, 812500, 825000, + 837500, 850000, 862500, + 875000, 887500, 900000, + 912500, 925000, 937500, + 950000, 962500, 975000, + 987500, 1000000, 1012500, + 1025000, 1037500, 1050000, + 1062500, 1075000, 1087500, + 1100000, 1112500, 1125000, + 1137500, 1150000, 1162500, + 1175000, 1187500, 1200000, + 1212500, 1225000, 1237500, + 1250000, 1262500, 1275000, + 1287500, 1300000, 1312500, + 1325000, 1337500, 1350000, + 1362500, 1375000, 1387500, + 1400000, 1412500, 1425000, + 1437500, 1450000, 1462500, }; static const unsigned int sw5_val_tbl[] = { 0, 5050000, }; static const unsigned int vcam_val_tbl[] = { 2600000, 2700000, 2800000, 2900000, }; From patchwork Mon Jul 23 19:38:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 947947 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="n09SdPlH"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41ZBfL1W3Pz9s4c for ; Tue, 24 Jul 2018 05:40:10 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728439AbeGWUmp (ORCPT ); Mon, 23 Jul 2018 16:42:45 -0400 Received: from mail-qt0-f195.google.com ([209.85.216.195]:47021 "EHLO mail-qt0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728296AbeGWUmo (ORCPT ); Mon, 23 Jul 2018 16:42:44 -0400 Received: by mail-qt0-f195.google.com with SMTP id d4-v6so1838056qtn.13; Mon, 23 Jul 2018 12:40:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=u3omEZ3vVGIziZxnWon7S89NW399Sz3LBct46CTqtlg=; b=n09SdPlHZwHRE3DrSD2xrQxlU26LiVqqeh2JPF4KFTQmxmg0rw+J/Z1tBZPatXaa+U AawLJ/MQRC/EE2nqXKo3ZmxVA3SLmrCrVqrb0Mw44HVmP3JzQf47bJRoPFE82OyhLLk7 CMhy14brvVgMAxwcPEpnFyHYX8mQvyHiWGEBDWVASTWcgYdZ7uC7Y6XoH3H2/NBeWH9U cu4g2thooIzR4C2pps2+4IYCBaeJjR+HhiiUYzLyKbbYn1tFXNUEZu8BJamZHqRdouJn odd7IWCv1Q++ZHW7rB3iDoPx2T8QnDgg/UvmJejfqh8Be1QCaonFD4dAU3nh0b1HETl+ PI0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=u3omEZ3vVGIziZxnWon7S89NW399Sz3LBct46CTqtlg=; b=exIQBWmHX58CnMtNcVeBlgtToHYCSECHjp4unAYui99fZmwo/X1QgVgKEg2zSICwxJ RBjgtz/rTDLfbp6li/RjbsU+oj/5sC19ddvkh0d0+VNVSxIOyub6p5TjTre+p2imMl0Y P1ef9Fl2LHg1sM6mxX0nz8ww1yLTPZmuNUe+skJJnxzvvAzyTz3wV5aNcrWZ8y4P4I00 UAJAH3pp0mDMiBYVclp6P4tIL7mlMTXTo5V0bEr7SneX5cH69uPvP4qkzTrts7Zy/2YP Zc069SZ5JAFzgyrHZSrLpDUUl68rXtsyuDmRgyb6mOkxykUSToQdWeW+CT3y2/GPT0P2 g2/A== X-Gm-Message-State: AOUpUlE960BBjWUZWjchdJzx6IgUJcyXwJeo9aw5DzvQG54JeM/1vu+7 7J6qwejch15O4MVfZ+VRK9KEjcHaASw= X-Google-Smtp-Source: AAOMgpdlJ1aCA+OrMojPhFu7DUDmX7Q226gY3+IjLql8qsN5FGoL0D9FcbiYXU+2LLoRG8ubBQBH5w== X-Received: by 2002:ac8:359b:: with SMTP id k27-v6mr13198734qtb.15.1532374800720; Mon, 23 Jul 2018 12:40:00 -0700 (PDT) Received: from localhost.localdomain (c-73-134-220-116.hsd1.md.comcast.net. [73.134.220.116]) by smtp.gmail.com with ESMTPSA id 16-v6sm6863042qkd.93.2018.07.23.12.40.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 23 Jul 2018 12:40:00 -0700 (PDT) From: Peter Geis To: broonie@kernel.org Cc: lgirdwood@gmail.com, robh+dt@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, Peter Geis Subject: [PATCH 2/2 v2] Add support for CPCAP regulators on Tegra devices. Date: Mon, 23 Jul 2018 15:38:48 -0400 Message-Id: <20180723193848.32491-3-pgwipeout@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180723193848.32491-1-pgwipeout@gmail.com> References: <20180723193848.32491-1-pgwipeout@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Added support for the CPCAP power management regulator functions on Tegra devices. Added sw2_sw4 value tables, which provide power to the Tegra core and aux devices. Added the Tegra init tables and device tree compatibility match. Signed-off-by: Peter Geis --- .../bindings/regulator/cpcap-regulator.txt | 1 + drivers/regulator/cpcap-regulator.c | 80 +++++++++++++++++++ 2 files changed, 81 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/cpcap-regulator.txt b/Documentation/devicetree/bindings/regulator/cpcap-regulator.txt index 675f4437ce92..3e2d33ab1731 100644 --- a/Documentation/devicetree/bindings/regulator/cpcap-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/cpcap-regulator.txt @@ -4,6 +4,7 @@ Motorola CPCAP PMIC voltage regulators Requires node properties: - "compatible" value one of: "motorola,cpcap-regulator" + "motorola,tegra-cpcap-regulator" "motorola,mapphone-cpcap-regulator" Required regulator properties: diff --git a/drivers/regulator/cpcap-regulator.c b/drivers/regulator/cpcap-regulator.c index c0b1e04bd90f..cb3774be445d 100644 --- a/drivers/regulator/cpcap-regulator.c +++ b/drivers/regulator/cpcap-regulator.c @@ -412,6 +412,82 @@ static struct cpcap_regulator omap4_regulators[] = { { /* sentinel */ }, }; +static struct cpcap_regulator tegra_regulators[] = { + CPCAP_REG(SW1, CPCAP_REG_S1C1, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW1_SEL, unknown_val_tbl, + 0, 0, 0, 0, 0, 0), + CPCAP_REG(SW2, CPCAP_REG_S2C1, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW2_SEL, sw2_sw4_val_tbl, + 0xf00, 0x7f, 0, 0x800, 0, 120), + CPCAP_REG(SW3, CPCAP_REG_S3C, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW3_SEL, unknown_val_tbl, + 0, 0, 0, 0, 0, 0), + CPCAP_REG(SW4, CPCAP_REG_S4C1, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW4_SEL, sw2_sw4_val_tbl, + 0xf00, 0x7f, 0, 0x900, 0, 100), + CPCAP_REG(SW5, CPCAP_REG_S5C, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW5_SEL, sw5_val_tbl, + 0x2a, 0, 0, 0x22, 0, 0), + CPCAP_REG(SW6, CPCAP_REG_S6C, CPCAP_REG_ASSIGN2, + CPCAP_BIT_SW6_SEL, unknown_val_tbl, + 0, 0, 0, 0, 0, 0), + CPCAP_REG(VCAM, CPCAP_REG_VCAMC, CPCAP_REG_ASSIGN2, + CPCAP_BIT_VCAM_SEL, vcam_val_tbl, + 0x87, 0x30, 4, 0x7, 0, 420), + CPCAP_REG(VCSI, CPCAP_REG_VCSIC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VCSI_SEL, vcsi_val_tbl, + 0x47, 0x10, 4, 0x7, 0, 350), + CPCAP_REG(VDAC, CPCAP_REG_VDACC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VDAC_SEL, vdac_val_tbl, + 0x87, 0x30, 4, 0x3, 0, 420), + CPCAP_REG(VDIG, CPCAP_REG_VDIGC, CPCAP_REG_ASSIGN2, + CPCAP_BIT_VDIG_SEL, vdig_val_tbl, + 0x87, 0x30, 4, 0x5, 0, 420), + CPCAP_REG(VFUSE, CPCAP_REG_VFUSEC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VFUSE_SEL, vfuse_val_tbl, + 0x80, 0xf, 0, 0x80, 0, 420), + CPCAP_REG(VHVIO, CPCAP_REG_VHVIOC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VHVIO_SEL, vhvio_val_tbl, + 0x17, 0, 0, 0x2, 0, 0), + CPCAP_REG(VSDIO, CPCAP_REG_VSDIOC, CPCAP_REG_ASSIGN2, + CPCAP_BIT_VSDIO_SEL, vsdio_val_tbl, + 0x87, 0x38, 3, 0x2, 0, 420), + CPCAP_REG(VPLL, CPCAP_REG_VPLLC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VPLL_SEL, vpll_val_tbl, + 0x43, 0x18, 3, 0x1, 0, 420), + CPCAP_REG(VRF1, CPCAP_REG_VRF1C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VRF1_SEL, vrf1_val_tbl, + 0xac, 0x2, 1, 0xc, 0, 10), + CPCAP_REG(VRF2, CPCAP_REG_VRF2C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VRF2_SEL, vrf2_val_tbl, + 0x23, 0x8, 3, 0x3, 0, 10), + CPCAP_REG(VRFREF, CPCAP_REG_VRFREFC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VRFREF_SEL, vrfref_val_tbl, + 0x23, 0x8, 3, 0x3, 0, 420), + CPCAP_REG(VWLAN1, CPCAP_REG_VWLAN1C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VWLAN1_SEL, vwlan1_val_tbl, + 0x47, 0x10, 4, 0x5, 0, 420), + CPCAP_REG(VWLAN2, CPCAP_REG_VWLAN2C, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VWLAN2_SEL, vwlan2_val_tbl, + 0x20c, 0xc0, 6, 0x8, 0, 420), + CPCAP_REG(VSIM, CPCAP_REG_VSIMC, CPCAP_REG_ASSIGN3, + 0xffff, vsim_val_tbl, + 0x23, 0x8, 3, 0x3, 0, 420), + CPCAP_REG(VSIMCARD, CPCAP_REG_VSIMC, CPCAP_REG_ASSIGN3, + 0xffff, vsimcard_val_tbl, + 0x1e80, 0x8, 3, 0x1e00, 0, 420), + CPCAP_REG(VVIB, CPCAP_REG_VVIBC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VVIB_SEL, vvib_val_tbl, + 0x1, 0xc, 2, 0, 0x1, 500), + CPCAP_REG(VUSB, CPCAP_REG_VUSBC, CPCAP_REG_ASSIGN3, + CPCAP_BIT_VUSB_SEL, vusb_val_tbl, + 0x11c, 0x40, 6, 0xc, 0, 0), + CPCAP_REG(VAUDIO, CPCAP_REG_VAUDIOC, CPCAP_REG_ASSIGN4, + CPCAP_BIT_VAUDIO_SEL, vaudio_val_tbl, + 0x16, 0x1, 0, 0x4, 0, 0), + { /* sentinel */ }, +}; + static const struct of_device_id cpcap_regulator_id_table[] = { { .compatible = "motorola,cpcap-regulator", @@ -420,6 +496,10 @@ static const struct of_device_id cpcap_regulator_id_table[] = { .compatible = "motorola,mapphone-cpcap-regulator", .data = omap4_regulators, }, + { + .compatible = "motorola,tegra-cpcap-regulator", + .data = tegra_regulators, + }, {}, }; MODULE_DEVICE_TABLE(of, cpcap_regulator_id_table);