From patchwork Fri Jul 20 19:23:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aditya Prayoga X-Patchwork-Id: 947179 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kobol.io Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41XMfZ3R3Yz9sBW for ; Sat, 21 Jul 2018 06:19:02 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728263AbeGTVIl (ORCPT ); Fri, 20 Jul 2018 17:08:41 -0400 Received: from mslow2.mail.gandi.net ([217.70.178.242]:49052 "EHLO slow1-d.mail.gandi.net" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727383AbeGTVIl (ORCPT ); Fri, 20 Jul 2018 17:08:41 -0400 Received: from relay6-d.mail.gandi.net (unknown [217.70.183.198]) by slow1-d.mail.gandi.net (Postfix) with ESMTP id CE5AB3A5A76; Fri, 20 Jul 2018 21:24:11 +0200 (CEST) X-Originating-IP: 140.213.19.3 Received: from ubuntuVM.localdomain (unknown [140.213.19.3]) (Authenticated sender: aditya@kobol.io) by relay6-d.mail.gandi.net (Postfix) with ESMTPSA id 5CB0BC000A; Fri, 20 Jul 2018 19:24:05 +0000 (UTC) From: Aditya Prayoga To: linux-gpio@vger.kernel.org Cc: Gauthier Provost , Alban Browaeys , Thierry Reding , Linus Walleij , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Aditya Prayoga Subject: [PATCH 1/2] gpio: mvebu: Add support for multiple PWM lines per GPIO chip Date: Sat, 21 Jul 2018 03:23:42 +0800 Message-Id: <1532114623-81911-2-git-send-email-aditya@kobol.io> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532114623-81911-1-git-send-email-aditya@kobol.io> References: <1532114623-81911-1-git-send-email-aditya@kobol.io> X-Spam-Level: Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Allow more than 1 PWM request (eg. PWM fan) on the same GPIO chip. based on initial work on LK4.4 by Alban Browaeys. URL: https://github.com/helios-4/linux-marvell/commit/743ae97 [Aditya Prayoga: forward port, cleanup] Signed-off-by: Aditya Prayoga --- drivers/gpio/gpio-mvebu.c | 63 ++++++++++++++++++++++++++++++----------------- 1 file changed, 41 insertions(+), 22 deletions(-) diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index 6e02148..0617e66 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -92,10 +92,17 @@ #define MVEBU_MAX_GPIO_PER_BANK 32 +struct mvebu_pwm_item { + struct gpio_desc *gpiod; + struct pwm_device *device; + struct list_head node; +}; + struct mvebu_pwm { void __iomem *membase; unsigned long clk_rate; - struct gpio_desc *gpiod; + int id; + struct list_head pwms; struct pwm_chip chip; spinlock_t lock; struct mvebu_gpio_chip *mvchip; @@ -599,29 +606,31 @@ static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; struct gpio_desc *desc; + struct mvebu_pwm_item *item; unsigned long flags; int ret = 0; - spin_lock_irqsave(&mvpwm->lock, flags); - - if (mvpwm->gpiod) { - ret = -EBUSY; - } else { - desc = gpiochip_request_own_desc(&mvchip->chip, - pwm->hwpwm, "mvebu-pwm"); - if (IS_ERR(desc)) { - ret = PTR_ERR(desc); - goto out; - } + item = kzalloc(sizeof(*item), GFP_KERNEL); + if (!item) + return -ENODEV; - ret = gpiod_direction_output(desc, 0); - if (ret) { - gpiochip_free_own_desc(desc); - goto out; - } + spin_lock_irqsave(&mvpwm->lock, flags); + desc = gpiochip_request_own_desc(&mvchip->chip, + pwm->hwpwm, "mvebu-pwm"); + if (IS_ERR(desc)) { + ret = PTR_ERR(desc); + goto out; + } - mvpwm->gpiod = desc; + ret = gpiod_direction_output(desc, 0); + if (ret) { + gpiochip_free_own_desc(desc); + goto out; } + item->gpiod = desc; + item->device = pwm; + INIT_LIST_HEAD(&item->node); + list_add_tail(&item->node, &mvpwm->pwms); out: spin_unlock_irqrestore(&mvpwm->lock, flags); return ret; @@ -630,12 +639,20 @@ static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) static void mvebu_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) { struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); + struct mvebu_pwm_item *item, *tmp; unsigned long flags; - spin_lock_irqsave(&mvpwm->lock, flags); - gpiochip_free_own_desc(mvpwm->gpiod); - mvpwm->gpiod = NULL; - spin_unlock_irqrestore(&mvpwm->lock, flags); + list_for_each_entry_safe(item, tmp, &mvpwm->pwms, node) { + if (item->device == pwm) { + spin_lock_irqsave(&mvpwm->lock, flags); + gpiochip_free_own_desc(item->gpiod); + item->gpiod = NULL; + item->device = NULL; + list_del(&item->node); + spin_unlock_irqrestore(&mvpwm->lock, flags); + kfree(item); + } + } } static void mvebu_pwm_get_state(struct pwm_chip *chip, @@ -804,6 +821,8 @@ static int mvebu_pwm_probe(struct platform_device *pdev, return -ENOMEM; mvchip->mvpwm = mvpwm; mvpwm->mvchip = mvchip; + mvpwm->id = id; + INIT_LIST_HEAD(&mvpwm->pwms); mvpwm->membase = devm_ioremap_resource(dev, res); if (IS_ERR(mvpwm->membase)) From patchwork Fri Jul 20 19:23:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aditya Prayoga X-Patchwork-Id: 947177 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kobol.io Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41XMfX6TSBz9s8k for ; Sat, 21 Jul 2018 06:19:00 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728329AbeGTVIo (ORCPT ); Fri, 20 Jul 2018 17:08:44 -0400 Received: from mslow2.mail.gandi.net ([217.70.178.242]:49088 "EHLO slow1-d.mail.gandi.net" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728261AbeGTVIn (ORCPT ); Fri, 20 Jul 2018 17:08:43 -0400 Received: from relay6-d.mail.gandi.net (unknown [217.70.183.198]) by slow1-d.mail.gandi.net (Postfix) with ESMTP id C94773A5B0F; Fri, 20 Jul 2018 21:24:16 +0200 (CEST) X-Originating-IP: 140.213.19.3 Received: from ubuntuVM.localdomain (unknown [140.213.19.3]) (Authenticated sender: aditya@kobol.io) by relay6-d.mail.gandi.net (Postfix) with ESMTPSA id 53819C0004; Fri, 20 Jul 2018 19:24:10 +0000 (UTC) From: Aditya Prayoga To: linux-gpio@vger.kernel.org Cc: Gauthier Provost , Alban Browaeys , Thierry Reding , Linus Walleij , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Aditya Prayoga Subject: [PATCH 2/2] gpio: mvebu: Allow to use non-default PWM counter Date: Sat, 21 Jul 2018 03:23:43 +0800 Message-Id: <1532114623-81911-3-git-send-email-aditya@kobol.io> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532114623-81911-1-git-send-email-aditya@kobol.io> References: <1532114623-81911-1-git-send-email-aditya@kobol.io> X-Spam-Level: Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org On multiple PWM lines, if the other PWM counter is unused, allocate it to next PWM request. The priority would be: 1. Default counter assigned to the bank 2. Unused counter that is assigned to other bank 3. Fallback to default counter For example on second bank there are three PWM request, first one would use default counter (counter B), second one would try to use counter A, and the third one would use counter B. Signed-off-by: Aditya Prayoga --- drivers/gpio/gpio-mvebu.c | 58 +++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 56 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index 0617e66..5a39478 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -92,6 +92,11 @@ #define MVEBU_MAX_GPIO_PER_BANK 32 +enum mvebu_pwm_counter { + MVEBU_PWM_COUNTER_A = 0, + MVEBU_PWM_COUNTER_B, +}; + struct mvebu_pwm_item { struct gpio_desc *gpiod; struct pwm_device *device; @@ -101,7 +106,8 @@ struct mvebu_pwm_item { struct mvebu_pwm { void __iomem *membase; unsigned long clk_rate; - int id; + enum mvebu_pwm_counter id; + struct list_head node; struct list_head pwms; struct pwm_chip chip; spinlock_t lock; @@ -113,6 +119,8 @@ struct mvebu_pwm { u32 blink_off_duration; }; +static LIST_HEAD(mvebu_pwm_list); + struct mvebu_gpio_chip { struct gpio_chip chip; struct regmap *regs; @@ -601,12 +609,24 @@ static struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip) return container_of(chip, struct mvebu_pwm, chip); } +static struct mvebu_pwm *mvebu_pwm_get_avail_counter(void) +{ + struct mvebu_pwm *counter; + + list_for_each_entry(counter, &mvebu_pwm_list, node) { + if (list_empty(&counter->pwms)) + return counter; + } + return NULL; +} + static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) { struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; struct gpio_desc *desc; struct mvebu_pwm_item *item; + struct mvebu_pwm *counter; unsigned long flags; int ret = 0; @@ -615,6 +635,14 @@ static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) return -ENODEV; spin_lock_irqsave(&mvpwm->lock, flags); + regmap_read(mvchip->regs, GPIO_BLINK_EN_OFF + mvchip->offset, + &mvchip->blink_en_reg); + + if (mvchip->blink_en_reg & BIT(pwm->hwpwm)) { + ret = -EBUSY; + goto out; + } + desc = gpiochip_request_own_desc(&mvchip->chip, pwm->hwpwm, "mvebu-pwm"); if (IS_ERR(desc)) { @@ -627,10 +655,25 @@ static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) gpiochip_free_own_desc(desc); goto out; } + + counter = mvpwm; + if (!list_empty(&mvpwm->pwms)) { + counter = mvebu_pwm_get_avail_counter(); + if (counter) + pwm->chip_data = counter; + else + counter = mvpwm; + } + + regmap_update_bits(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + + mvchip->offset, BIT(pwm->hwpwm), + counter->id ? BIT(pwm->hwpwm) : 0); + regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + + mvchip->offset, &mvpwm->blink_select); item->gpiod = desc; item->device = pwm; INIT_LIST_HEAD(&item->node); - list_add_tail(&item->node, &mvpwm->pwms); + list_add_tail(&item->node, &counter->pwms); out: spin_unlock_irqrestore(&mvpwm->lock, flags); return ret; @@ -642,6 +685,9 @@ static void mvebu_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) struct mvebu_pwm_item *item, *tmp; unsigned long flags; + if (pwm->chip_data) + mvpwm = (struct mvebu_pwm *) pwm->chip_data; + list_for_each_entry_safe(item, tmp, &mvpwm->pwms, node) { if (item->device == pwm) { spin_lock_irqsave(&mvpwm->lock, flags); @@ -665,6 +711,9 @@ static void mvebu_pwm_get_state(struct pwm_chip *chip, unsigned long flags; u32 u; + if (pwm->chip_data) + mvpwm = (struct mvebu_pwm *) pwm->chip_data; + spin_lock_irqsave(&mvpwm->lock, flags); val = (unsigned long long) @@ -712,6 +761,9 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, unsigned long flags; unsigned int on, off; + if (pwm->chip_data) + mvpwm = (struct mvebu_pwm *) pwm->chip_data; + val = (unsigned long long) mvpwm->clk_rate * state->duty_cycle; do_div(val, NSEC_PER_SEC); if (val > UINT_MAX) @@ -823,6 +875,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, mvpwm->mvchip = mvchip; mvpwm->id = id; INIT_LIST_HEAD(&mvpwm->pwms); + INIT_LIST_HEAD(&mvpwm->node); mvpwm->membase = devm_ioremap_resource(dev, res); if (IS_ERR(mvpwm->membase)) @@ -846,6 +899,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, mvpwm->chip.base = -1; spin_lock_init(&mvpwm->lock); + list_add_tail(&mvpwm->node, &mvebu_pwm_list); return pwmchip_add(&mvpwm->chip); }