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Mon, 31 Aug 2026 06:55:05 +0000 (GMT) Received: from Narayanas-MacBook-Pro.bl1-in.ibm.com (unknown [9.123.3.199]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 31 Aug 2026 06:55:05 +0000 (GMT) From: Narayana Murty N To: mahesh@linux.ibm.com, maddy@linux.ibm.com, mpe@ellerman.id.au, christophe.leroy@csgroup.eu, oohall@gmail.com, npiggin@gmail.com, tpearson@raptorengineering.com, alex@shazbot.org Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, sbhat@linux.ibm.com, sourabhjain@linux.ibm.com, harshpb@linux.ibm.com Subject: [PATCH v4 1/5] powerpc/rtas: Handle ibm,open-errinjct return format Date: Mon, 31 Aug 2026 12:24:37 +0530 Message-ID: <20260831065441.48654-2-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260831065441.48654-1-nnmlinux@linux.ibm.com> References: <20260831065441.48654-1-nnmlinux@linux.ibm.com> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Authority-Analysis: v=2.4 cv=EIc2FVZC c=1 sm=1 tr=0 ts=6a952552 cx=c_pps a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=uAbxVGIbfxUO_5tXvNgY:22 a=1mVJ_uiqAAAA:8 a=VnNF1IyMAAAA:8 a=dEMuusSb2ODMKMaWGMMA:9 a=h67g7WpEjx8dfGT80pje:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDA1NCBTYWx0ZWRfXyG5u7+Xtwtl5 lItclE/ZOv3slvBGoBQ31loqPqDoCimUOia2oFZsEEk8Mh2oZOY2peXn23327ZGxKa2GEv0sD/R bPPi15HyOROg7UCRqZQtkvhLmuE3XEfGZrtw5wTP6W4tyfsd9uXAZhR+UYoDDZADCQAKSiE637u 9ZkXIhz1/YutoPmaLvrYc91m1HJkd9upzzhHdftutJW6+baOlFPju03tZBiaS/Ff01VCdZvTloM Xa/ML7MaEIHA1s16Y+VZ9J/QI36WH9O4N1iVMGBSqBbCPVAEgZH0E0GJLAX0upOQtENcnwyK1Ix sUlq8klBpzb6q2Agt7iCQGb143szVNECMXMY97mi+fkVzFor+HOv2NtQhHL7lmyxuEXtgbW4SSW H3JE25INDkP/wgwbEUmMQEpQqhw4CXnE4Ud2YTDb+ujowRwQ6Sdspv07TYlhf37jK7DSZTusCJg oiYb8JW23tMIRBAc1Fg== X-Proofpoint-GUID: UAlmyl2Ze1XhfzXsMZtJfV2mOdK6A0V3 X-Proofpoint-ORIG-GUID: c8saDculayjoKc5cageEtm0Cqqoor40m X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDA1NCBTYWx0ZWRfXxz2m0V1rK5ae HHdRQxd/jaho+JmckFvWa5lsJ2yFXUTZWlE3gRTiSVJ54bQlySAuISXDNn7+22rKH7uH17W/lgi UCdc0K+jaV9or3zVaGNWrnauQ+lrop0= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_02,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 suspectscore=0 priorityscore=1501 clxscore=1011 phishscore=0 spamscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310054 X-Spam-Status: No, score=-0.7 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, RCVD_IN_DNSWL_LOW,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.1 OzLabs 8 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org ibm,open-errinjct uses a non-standard RTAS return layout: rets[0] = session token (output parameter) rets[1] = status code Unlike all other RTAS functions which use: rets[0] = status code rets[1..] = output parameters Add rtas_token_is_open_errinjct() to identify this call, and rtas_status_from_args() to extract status from the correct position. Add an early guard in rtas_call() that rejects ibm,open-errinjct invocations where nret < 2, since reading rets[1] would be out of bounds: if (rtas_token_is_open_errinjct(token) && nret < 2) { WARN_ON_ONCE(1); return RTAS_INVALID_PARAMETER; } Adjust the output-copy loop so that for ibm,open-errinjct: return value = rets[1] (status) outputs[0] = rets[0] (session token) For all other functions the existing convention is preserved: return value = rets[0] (status) outputs[0..] = rets[1..] (non-status outputs) Move the "/* A -1 return code... */" comment immediately before the ret == -1 check so it documents the check it guards. Also fix sys_rtas() last-error status detection: ibm,open-errinjct places status at rets[1], so the -1 sentinel check must use rets[1] for that function rather than always using rets[0]. Reference: OpenPOWER PAPR documentation https://files.openpower.foundation/s/XFgfMaqLMD5Bcm8 Signed-off-by: Narayana Murty N --- arch/powerpc/kernel/rtas.c | 78 +++++++++++++++++++++++++++++++++----- 1 file changed, 68 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c index 8d81c1e7a8db..7131870655c6 100644 --- a/arch/powerpc/kernel/rtas.c +++ b/arch/powerpc/kernel/rtas.c @@ -1117,6 +1117,28 @@ static bool token_is_restricted_errinjct(s32 token) token == rtas_function_token(RTAS_FN_IBM_ERRINJCT); } +/* + * ibm,open-errinjct uses a non-standard return layout: + * rets[0] = session token (output parameter) + * rets[1] = status code + * + * All other RTAS functions use the standard layout: + * rets[0] = status code + * rets[1..] = output parameters + */ +static inline bool rtas_token_is_open_errinjct(int token) +{ + return token == rtas_function_token(RTAS_FN_IBM_OPEN_ERRINJCT); +} + +static int rtas_status_from_args(int token, struct rtas_args *args, int nret) +{ + if (rtas_token_is_open_errinjct(token)) + return be32_to_cpu(args->rets[1]); + + return nret > 0 ? be32_to_cpu(args->rets[0]) : 0; +} + /** * rtas_call() - Invoke an RTAS firmware function. * @token: Identifies the function being invoked. @@ -1198,6 +1220,16 @@ int rtas_call(int token, int nargs, int nret, int *outputs, ...) return -1; } + /* + * ibm,open-errinjct returns rets[0]=session_token, rets[1]=status. + * We need nret >= 2 to read status from rets[1]. Reject early if + * the caller forgot to account for the extra return cell. + */ + if (rtas_token_is_open_errinjct(token) && nret < 2) { + WARN_ON_ONCE(1); + return RTAS_INVALID_PARAMETER; + } + if ((mfmsr() & (MSR_IR|MSR_DR)) != (MSR_IR|MSR_DR)) { WARN_ON_ONCE(1); return -1; @@ -1213,15 +1245,33 @@ int rtas_call(int token, int nargs, int nret, int *outputs, ...) va_rtas_call_unlocked(args, token, nargs, nret, list); va_end(list); + ret = rtas_status_from_args(token, args, nret); + /* A -1 return code indicates that the last command couldn't - be completed due to a hardware error. */ - if (be32_to_cpu(args->rets[0]) == -1) + * be completed due to a hardware error. + */ + if (ret == -1) buff_copy = __fetch_rtas_last_error(NULL); - if (nret > 1 && outputs != NULL) - for (i = 0; i < nret-1; ++i) - outputs[i] = be32_to_cpu(args->rets[i + 1]); - ret = (nret > 0) ? be32_to_cpu(args->rets[0]) : 0; + /* + * Copy non-status outputs to the caller's buffer. + * + * For ibm,open-errinjct the layout is: + * rets[0] = session token -> outputs[0] + * rets[1] = status (returned, not copied) + * + * For all other RTAS functions: + * rets[0] = status (returned, not copied) + * rets[1..nret-1] -> outputs[0..nret-2] + */ + if (outputs != NULL) { + if (rtas_token_is_open_errinjct(token)) { + outputs[0] = be32_to_cpu(args->rets[0]); + } else if (nret > 1) { + for (i = 0; i < nret - 1; ++i) + outputs[i] = be32_to_cpu(args->rets[i + 1]); + } + } lockdep_unpin_lock(&rtas_lock, cookie); raw_spin_unlock_irqrestore(&rtas_lock, flags); @@ -1942,10 +1992,18 @@ SYSCALL_DEFINE1(rtas, struct rtas_args __user *, uargs) do_enter_rtas(&rtas_args); args = rtas_args; - /* A -1 return code indicates that the last command couldn't - be completed due to a hardware error. */ - if (be32_to_cpu(args.rets[0]) == -1) - errbuf = __fetch_rtas_last_error(buff_copy); + /* + * A -1 return code indicates that the last command couldn't + * be completed due to a hardware error. ibm,open-errinjct + * places status at rets[1] rather than rets[0]; check the + * correct position for the -1 sentinel. + */ + { + __be32 status_cell = (token == rtas_function_token(RTAS_FN_IBM_OPEN_ERRINJCT) && + nret >= 2) ? args.rets[1] : args.rets[0]; + if (be32_to_cpu(status_cell) == -1) + errbuf = __fetch_rtas_last_error(buff_copy); + } lockdep_unpin_lock(&rtas_lock, cookie); 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Mon, 31 Aug 2026 06:55:08 +0000 (GMT) Received: from Narayanas-MacBook-Pro.bl1-in.ibm.com (unknown [9.123.3.199]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 31 Aug 2026 06:55:08 +0000 (GMT) From: Narayana Murty N To: mahesh@linux.ibm.com, maddy@linux.ibm.com, mpe@ellerman.id.au, christophe.leroy@csgroup.eu, oohall@gmail.com, npiggin@gmail.com, tpearson@raptorengineering.com, alex@shazbot.org Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, sbhat@linux.ibm.com, sourabhjain@linux.ibm.com, harshpb@linux.ibm.com Subject: [PATCH v4 2/5] vfio/spapr_tce: Normalize EEH IOA error injection addresses Date: Mon, 31 Aug 2026 12:24:38 +0530 Message-ID: <20260831065441.48654-3-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260831065441.48654-1-nnmlinux@linux.ibm.com> References: <20260831065441.48654-1-nnmlinux@linux.ibm.com> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDA1NCBTYWx0ZWRfX1dWym3FjYXcN yd/V4QOvDVYZiZS7XtHjceEYt7kL0zbR8J/HpfsZsNC+wYxFAWHxFyatdidKqjt3jORm8tKnxcb HgXpgw4QAK+iT3SpypuDUQhrUBZRDr4KSbimTOrS/jAFqzSrkXDLAAZNW/EuhQoHZMHh6DuQhy0 ePmIeBAP7xznSStXaRbpKuwY5UdxSPqJZJH6XI7voZiFSdwdLI7gvp5XNjcN7bavnqGT8ziVTfG opqQ+/BPrA94a3jGQB8/AzLS+D3DnSLghWbtjGBSKNDVQjeZbHy9IKMDHZmrSy4HFVvw8gvTM02 B6VxWEvuVtBGkTqjJTk9bH2kNooQy4dR3S+G9QKwRSaHgeCweXS3eJZ2KfZ0KRhbNp1rfqcx3uE dLry1sGpC1NHphrYa9EVCt/epYsFL9+pkrgcADjH7CaTMr3XTf5IaXno2tb0Fy7Z6rbumv+JMHg AGFDzaxDPxn8sVH0Gkw== X-Proofpoint-ORIG-GUID: 6K7Nfir4wmezzNTvGdIUsstqFHtJww91 X-Authority-Analysis: v=2.4 cv=CNgamxrD c=1 sm=1 tr=0 ts=6a952554 cx=c_pps a=AfN7/Ok6k8XGzOShvHwTGQ==:117 a=AfN7/Ok6k8XGzOShvHwTGQ==:17 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=U7nrCbtTmkRpXpFmAIza:22 a=VnNF1IyMAAAA:8 a=VWgmkn45OfsDYgLYJ5kA:9 X-Proofpoint-GUID: PUhvqDVSQTxIs-1dnEYHGj8z7-KGmAtu X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDA1NCBTYWx0ZWRfX5/7xHm+CpBfQ v2vA9279bZtdZesmyXjz5atArm9fSIHCjMTaSmAYx1dio+6sI3rFCSwVUMQgGFhUc8qv1yc4i3z VYbPVHZRPfE6CK4juglgDZn/si5+HOc= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_02,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 adultscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310054 X-Spam-Status: No, score=-0.7 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, RCVD_IN_DNSWL_LOW,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.1 OzLabs 8 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org VFIO_EEH_PE_INJECT_ERR receives a target address from userspace. For userspace such as QEMU, this address may be derived from the host Linux BAR resource. The platform EEH backends, however, expect the PCI/IOA bus address used by firmware error-injection interfaces. Normalize IOA/MMIO error-injection addresses in the sPAPR VFIO EEH ioctl path before dispatching to eeh_pe_inject_err(). If the supplied address is already a PCI bus BAR address it is left unchanged. If it is a Linux resource address, translate it to the corresponding PCI bus address using the BAR-relative offset. Keep the helper local to VFIO so the address semantics of other in-kernel EEH callers are unchanged. This provides common handling for both pseries and PowerNV backends. Signed-off-by: Narayana Murty N --- drivers/vfio/vfio_iommu_spapr_tce.c | 90 +++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c b/drivers/vfio/vfio_iommu_spapr_tce.c index 1c0eec228cc6..8a6cc856d7da 100644 --- a/drivers/vfio/vfio_iommu_spapr_tce.c +++ b/drivers/vfio/vfio_iommu_spapr_tce.c @@ -774,6 +774,85 @@ static long tce_iommu_create_default_window(struct tce_container *container) return ret; } +static bool vfio_spapr_eeh_err_needs_addr_normalize(unsigned int type) +{ + if (type != EEH_ERR_TYPE_32 && type != EEH_ERR_TYPE_64) + return false; + + return true; +} + +static int vfio_spapr_eeh_normalize_addr(struct eeh_pe *pe, + unsigned long addr, + unsigned long *normalized) +{ + struct pci_bus_region region; + struct eeh_dev *edev, *tmp; + struct pci_dev *pdev; + struct resource *res; + resource_size_t pci_start, pci_len; + resource_size_t res_start, res_len; + resource_size_t offset; + int bar; + + if (!pe || !normalized) + return -EINVAL; + + if (!addr) { + *normalized = addr; + return 0; + } + + eeh_pe_for_each_dev(pe, edev, tmp) { + pdev = eeh_dev_to_pci_dev(edev); + if (!pdev) + continue; + + for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) { + res = &pdev->resource[bar]; + + if (!resource_size(res)) + continue; + + if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) + continue; + + pcibios_resource_to_bus(pdev->bus, ®ion, res); + + pci_start = region.start; + pci_len = resource_size(res); + + /* + * Case 1: userspace already supplied PCI/IOA + * bus address. + */ + if ((resource_size_t)addr >= pci_start && + ((resource_size_t)addr - pci_start) < pci_len) { + *normalized = addr; + return 0; + } + + /* + * Case 2: userspace supplied Linux resource/CPU + * address Convert it back to PCI/IOA bus address + * before calling the platform EEH backend. + */ + res_start = res->start; + res_len = resource_size(res); + + if ((resource_size_t)addr >= res_start && + ((resource_size_t)addr - res_start) < res_len) { + offset = (resource_size_t)addr - res_start; + *normalized = region.start + offset; + + return 0; + } + } + } + + return -EINVAL; +} + static long vfio_spapr_ioctl_eeh_pe_op(struct iommu_group *group, unsigned long arg) { @@ -818,6 +897,17 @@ static long vfio_spapr_ioctl_eeh_pe_op(struct iommu_group *group, if (copy_from_user(&op, (void __user *)arg, minsz)) return -EFAULT; + if (vfio_spapr_eeh_err_needs_addr_normalize(op.err.type)) { + unsigned long normalized; + long ret; + + ret = vfio_spapr_eeh_normalize_addr(pe, op.err.addr, &normalized); + if (ret) + return ret; + + op.err.addr = normalized; + } + return eeh_pe_inject_err(pe, op.err.type, op.err.func, op.err.addr, op.err.mask); default: From patchwork Mon Aug 31 06:54:39 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Narayana Murty N X-Patchwork-Id: 2294953 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 31 Aug 2026 06:55:11 +0000 (GMT) Received: from Narayanas-MacBook-Pro.bl1-in.ibm.com (unknown [9.123.3.199]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 31 Aug 2026 06:55:11 +0000 (GMT) From: Narayana Murty N To: mahesh@linux.ibm.com, maddy@linux.ibm.com, mpe@ellerman.id.au, christophe.leroy@csgroup.eu, oohall@gmail.com, npiggin@gmail.com, tpearson@raptorengineering.com, alex@shazbot.org Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, sbhat@linux.ibm.com, sourabhjain@linux.ibm.com, harshpb@linux.ibm.com Subject: [PATCH v4 3/5] powerpc/pseries/eeh: Add RTAS error validation helpers Date: Mon, 31 Aug 2026 12:24:39 +0530 Message-ID: <20260831065441.48654-4-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260831065441.48654-1-nnmlinux@linux.ibm.com> References: <20260831065441.48654-1-nnmlinux@linux.ibm.com> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Authority-Analysis: v=2.4 cv=bc1bluPB c=1 sm=1 tr=0 ts=6a952556 cx=c_pps a=aDMHemPKRhS1OARIsFnwRA==:117 a=aDMHemPKRhS1OARIsFnwRA==:17 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=RzCfie-kr_QcCd8fBx8p:22 a=VwQbUJbxAAAA:8 a=QyXUC8HyAAAA:8 a=VnNF1IyMAAAA:8 a=J9QjAIgEsDROcibzJgwA:9 X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDA1NCBTYWx0ZWRfX0Mn7yTeoKhUX ZzOOHyMW7IF6hQv7W5/ASqrEqChYJKdnJ2GqxKc0EjTBjtryThcxPvI8xUGbXpSNQLSkypcwvdB QopavvTlMbfoCAhaECvnDmf2qZBpakM= X-Proofpoint-ORIG-GUID: CM4p_HDVywxP-z_M5iKBu-ogZJGRa9oz X-Proofpoint-GUID: kJCrDPyyAyZehoHcduAnUNPRw2Nix2qU X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDA1NCBTYWx0ZWRfXwDLIGZVy1J+q DG2AVU1ncxKeXDJCPWslzsFf1ZkZwFWZtkIXkdwR861Bt/qRvDgTEAyEBYKtRkcFMdyQH4nxvPB L28nwGJPqFUgkyy6aPFYblbPFoAEnnFR3laT6lpReXFaoLW/4giB5pDLL083vtoxno+ViTpxx6V aHPxmbvenhL1ArIresfWDrI6LUGAZeAxRWcGU4f47mGa3tp9r6mHtRgcxNCG+XX4oQsfwiZAeyW BQizpmdWljAud2UBWr1wKZtMGtmDnxOA2aKBhhcTkT8lyJ7WFanpyODyb45jbgsCbTMbRoCn0fw h4mrakCqfU+QsXqeSuwJFT2WQOlILAsOPtiak5uEOl4VunxLYYgKqZ83+JVuDSawxbiWtZqMANY n/BbWRr9z6orB+uJVRoecw+lJz6/SD7EHvq4+0bWHr15z8lDPBXn1VQHwBT2SUz5Yb25c8/TIaB tj7eBXM6NDbHy+f7uGw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_02,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 adultscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 phishscore=0 clxscore=1011 priorityscore=1501 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310054 X-Spam-Status: No, score=-0.7 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, RCVD_IN_DNSWL_LOW,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.1 OzLabs 8 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org Add pseries-specific infrastructure for RTAS-based EEH error injection. Define pr_fmt unconditionally at the top of eeh_pseries.c so all pr_*() calls carry the "EEH: " prefix: #define pr_fmt(fmt) "EEH: " fmt Define RTAS firmware error-type encodings as file-local constants. Only the two IOA bus-error types are supported; other PAPR encodings are not reachable through the generic EEH_ERR_TYPE_* UAPI: RTAS_ERR_TYPE_IOA_BUS_ERROR 0x07 RTAS_ERR_TYPE_IOA_BUS_ERROR_64 0x0f Add RTAS_ERRINJCT_BUF_SIZE for the ibm,errinjct work buffer size. Add pseries_eeh_type_to_rtas() to translate the two generic EEH error types (EEH_ERR_TYPE_32, EEH_ERR_TYPE_64) into the corresponding RTAS ibm,errinjct encodings. Add validate_addr_mask_in_pe() to verify that a caller-provided address falls within a BAR of some device in the PE. RTAS IOA bus-error injection requires a PCI/IOA bus address; validate_addr_mask_in_pe() accepts only PCI bus addresses. VFIO userspace resource addresses are normalized to PCI bus addresses in vfio_iommu_spapr_tce.c before reaching this backend; no resource-address fallback is added here. Use pcibios_resource_to_bus() to convert each BAR resource to PCI bus address space before validating the address. Returns -EINVAL (Linux errno) rather than a raw RTAS status. Add validate_errinjct_args() as a top-level validation wrapper that checks the PE pointer, maps the generic type, and validates the function range. Address/mask validation against BARs is done in the buffer preparation step. Add prepare_errinjct_buffer() which: - guards against NULL buf/pe/pe->phb - zeroes the buffer unconditionally with memset() - checks 32-bit truncation for the IOA_BUS_ERROR case - calls validate_addr_mask_in_pe() for address validation - supports only the IOA bus-error types (unreachable non-IOA RTAS cases removed) The caller provides an exclusive per-call RTAS work-area buffer. Firmware session serialization is left to the caller. pseries_eeh_err_inject() retains the existing MMIO injection body unchanged in this patch. It is replaced by the full RTAS session implementation in the next patch. This keeps the patch bisectable: each commit builds and functions correctly independently. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202512101130.EYUo0oZx-lkp@intel.com/ Signed-off-by: Narayana Murty N --- arch/powerpc/platforms/pseries/eeh_pseries.c | 215 +++++++++++++++++++ 1 file changed, 215 insertions(+) diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c index b12ef382fec7..fafe0004e738 100644 --- a/arch/powerpc/platforms/pseries/eeh_pseries.c +++ b/arch/powerpc/platforms/pseries/eeh_pseries.c @@ -12,6 +12,8 @@ * Copyright Linas Vepstas 2005, 2006 */ +#define pr_fmt(fmt) "EEH: " fmt + #include #include #include @@ -786,6 +788,219 @@ static int pseries_notify_resume(struct eeh_dev *edev) } #endif +/* + * RTAS firmware error-type encodings (PAPR). These are pseries-private; + * user-space sees only the generic EEH_ERR_TYPE_* values from eeh.h. + * Only IOA bus-error types are supported; other PAPR encodings are not + * reachable through the generic EEH_ERR_TYPE_* UAPI. + */ +#define RTAS_ERR_TYPE_IOA_BUS_ERROR 0x07 +#define RTAS_ERR_TYPE_IOA_BUS_ERROR_64 0x0f + +/* Size of the ibm,errinjct work buffer as defined by PAPR */ +#define RTAS_ERRINJCT_BUF_SIZE SZ_1K + +/** + * pseries_eeh_type_to_rtas - Map generic EEH error type to RTAS encoding + * @type: generic EEH error type (EEH_ERR_TYPE_32, EEH_ERR_TYPE_64) + * + * Translates the generic VFIO/EEH error type passed from userspace into + * the RTAS-specific ibm,errinjct error type encoding defined by PAPR. + * + * Return: RTAS error type on success, -EINVAL for unknown types. + */ +static int pseries_eeh_type_to_rtas(int type) +{ + switch (type) { + case EEH_ERR_TYPE_32: + return RTAS_ERR_TYPE_IOA_BUS_ERROR; + case EEH_ERR_TYPE_64: + return RTAS_ERR_TYPE_IOA_BUS_ERROR_64; + default: + return -EINVAL; + } +} + +/** + * validate_addr_mask_in_pe - Validate addr against PCI bus BAR addresses in PE + * @pe: EEH PE containing one or more PCI devices + * @addr: PCI bus address to validate + * @mask: address mask (passed to firmware unchanged) + * + * RTAS IOA bus-error injection uses PCI bus addresses. Linux PCI resources + * are CPU/resource addresses and may differ on pseries due to PHB window + * translation. Convert each BAR resource to PCI bus address space before + * validating @addr. + * + * Zero addr and mask are accepted without BAR lookup (no-address injection). + * + * Return: 0 if valid, -EINVAL on invalid input. + */ +static int validate_addr_mask_in_pe(struct eeh_pe *pe, unsigned long addr, + unsigned long mask) +{ + struct pci_bus_region region; + struct eeh_dev *edev, *tmp; + struct pci_dev *pdev; + struct resource *res; + resource_size_t bus_start; + resource_size_t bus_len; + int bar; + + if (!addr && !mask) + return 0; + + if (!pe) + return -EINVAL; + + /* + * RTAS IOA bus-error injection uses PCI bus addresses. Linux PCI + * resources are CPU/resource addresses and may differ on pseries due + * to PHB window translation. Convert each BAR resource to PCI bus + * address space before validating @addr. + */ + eeh_pe_for_each_dev(pe, edev, tmp) { + pdev = eeh_dev_to_pci_dev(edev); + if (!pdev) + continue; + + for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) { + res = &pdev->resource[bar]; + + if (!resource_size(res)) + continue; + + if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) + continue; + + pcibios_resource_to_bus(pdev->bus, ®ion, res); + + bus_start = region.start; + bus_len = resource_size(res); + + if ((resource_size_t)addr >= bus_start && + ((resource_size_t)addr - bus_start) < bus_len) { + pr_debug("addr=0x%lx mask=0x%lx validated in PCI bus BAR[%d] of %s: bus range 0x%llx-0x%llx\n", + addr, mask, bar, pci_name(pdev), + (unsigned long long)region.start, + (unsigned long long)region.end); + return 0; + } + } + } + + pr_err("addr=0x%lx mask=0x%lx not within any PCI bus BAR of any device in PE\n", + addr, mask); + return -EINVAL; +} + +/** + * validate_errinjct_args - Top-level validation for RTAS error injection arguments + * @pe: EEH PE for the target device + * @type: generic EEH error type + * @func: error function selector + * @addr: address argument (type-dependent, may be zero) + * @mask: mask argument (type-dependent, may be zero) + * + * Validates all parameters before opening an RTAS injection session. + * Returns Linux errno values; does not return raw RTAS status codes. + * + * Return: 0 if all parameters are valid, negative errno otherwise. + */ +static int validate_errinjct_args(struct eeh_pe *pe, int type, int func, + unsigned long addr, unsigned long mask) +{ + if (!pe || !pe->phb) + return -EINVAL; + + if (pseries_eeh_type_to_rtas(type) < 0) + return -EINVAL; + + if (func < EEH_ERR_FUNC_MIN || func > EEH_ERR_FUNC_MAX) + return -EINVAL; + + return 0; +} + +/** + * prepare_errinjct_buffer() - Build ibm,errinjct work buffer + * @buf: RTAS error-injection work buffer + * @pe: EEH PE associated with the injection target + * @rtas_type: RTAS firmware error-injection type + * @func: Error function selector + * @addr: Target PCI bus address + * @mask: Address mask passed to firmware + * + * Zeroes @buf and populates it according to the PAPR layout for the + * selected IOA bus-error injection type. + * + * The caller provides an exclusive per-call RTAS work-area buffer. + * Firmware session serialization is handled by pseries_eeh_err_inject(). + * + * Return: 0 on success or a negative errno on invalid input. + */ +static int prepare_errinjct_buffer(void *buf, struct eeh_pe *pe, + int rtas_type, int func, + unsigned long addr, unsigned long mask) +{ + __be64 *buf64 = (__be64 *)buf; + __be32 *buf32 = (__be32 *)buf; + int rc; + + if (!buf || !pe || !pe->phb) + return -EINVAL; + + memset(buf, 0, RTAS_ERRINJCT_BUF_SIZE); + + switch (rtas_type) { + case RTAS_ERR_TYPE_IOA_BUS_ERROR: + if (func < EEH_ERR_FUNC_MIN || func > EEH_ERR_FUNC_MAX) + return -EINVAL; + + if (upper_32_bits(addr) || upper_32_bits(mask)) { + pr_err("32-bit IOA injection cannot encode addr=%#lx mask=%#lx\n", + addr, mask); + return -EINVAL; + } + + rc = validate_addr_mask_in_pe(pe, addr, mask); + if (rc) + return rc; + + buf32[0] = cpu_to_be32((u32)addr); + buf32[1] = cpu_to_be32((u32)mask); + buf32[2] = cpu_to_be32(pe->addr); + buf32[3] = cpu_to_be32(BUID_HI(pe->phb->buid)); + buf32[4] = cpu_to_be32(BUID_LO(pe->phb->buid)); + buf32[5] = cpu_to_be32(func); + break; + + case RTAS_ERR_TYPE_IOA_BUS_ERROR_64: + if (func < EEH_ERR_FUNC_MIN || func > EEH_ERR_FUNC_MAX) + return -EINVAL; + + rc = validate_addr_mask_in_pe(pe, addr, mask); + if (rc) + return rc; + + buf64[0] = cpu_to_be64(addr); + buf64[1] = cpu_to_be64(mask); + buf32[4] = cpu_to_be32(pe->addr); + buf32[5] = cpu_to_be32(BUID_HI(pe->phb->buid)); + buf32[6] = cpu_to_be32(BUID_LO(pe->phb->buid)); + buf32[7] = cpu_to_be32(func); + break; + + default: + pr_err("unsupported RTAS error injection type 0x%x\n", rtas_type); + return -EINVAL; + } + + pr_debug("errinjct buffer ready: rtas_type=0x%x func=%d addr=0x%lx mask=0x%lx\n", + rtas_type, func, addr, mask); + return 0; +} + /** * pseries_eeh_err_inject - Inject specified error to the indicated PE * @pe: the indicated PE From patchwork Mon Aug 31 06:54:40 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Narayana Murty N X-Patchwork-Id: 2294956 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=FwtUVF/R; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; 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Mon, 31 Aug 2026 06:55:20 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (smtpav06.fra02v.mail.ibm.com [10.20.54.105]) by smtprelay07.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 67V6tG6S50004294 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 31 Aug 2026 06:55:16 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 95AF82004B; Mon, 31 Aug 2026 06:55:16 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1D9C020040; Mon, 31 Aug 2026 06:55:14 +0000 (GMT) Received: from Narayanas-MacBook-Pro.bl1-in.ibm.com (unknown [9.123.3.199]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 31 Aug 2026 06:55:13 +0000 (GMT) From: Narayana Murty N To: mahesh@linux.ibm.com, maddy@linux.ibm.com, mpe@ellerman.id.au, christophe.leroy@csgroup.eu, oohall@gmail.com, npiggin@gmail.com, tpearson@raptorengineering.com, alex@shazbot.org Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, sbhat@linux.ibm.com, sourabhjain@linux.ibm.com, harshpb@linux.ibm.com Subject: [PATCH v4 4/5] powerpc/pseries/eeh: Implement RTAS-based EEH error injection Date: Mon, 31 Aug 2026 12:24:40 +0530 Message-ID: <20260831065441.48654-5-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260831065441.48654-1-nnmlinux@linux.ibm.com> References: <20260831065441.48654-1-nnmlinux@linux.ibm.com> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-GUID: 8fsXHVvwz0R7OU9bBplf0on_lRZoGeCs X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDA1NCBTYWx0ZWRfXxKvfAdCPPALY zO56/RDLHVTmTn4u0NxTAsNDyeG51AvxaxsUhljHXXusQUiKIUSQlRFhjrD9mUuqhGYj/CXNQHM uUIk/320MMbC5oKnbwfFtNxlSO9z9PsrGyMGGa/vKUyFAvDjUsz1dVhytUpH81W4/rGRCyrOBmj UVRyNYgFbLIEk7kNupsqFgwuPGgCWJHfiu85FDkz4Gjc3TFLoN7RYfESb6F3auzdClM2msuky16 VX7efLzQk/dN5JtVMyxyTVT2z+zrqWX24WviczrA4cw9UX/h8GQf7VszayYmtvs8qw8XOtCDO4f ZQ/rZH27rXVFMgYs5hAdmtITdiyQbagGhY7Aqdg4PvODxRm9hl5RkRvmieXMd83cMEEGNsvPBzj m/GpB8YHoxXCdx0XPsLNpxMYGe/EtZYfwTtkzXtnPKiJU3D5Z9zVvbkA8GwgyyqdXBR+D+O194M MUOP3Tz1HRvi2uK/cVg== X-Proofpoint-ORIG-GUID: be8-u1EQp_zjVMO8UPQpQZwhQOy62b67 X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDA1NCBTYWx0ZWRfX6zoRhm8IH/gm wGbFTganpedM7cfQUKIfNpTBawIU9Zy+EAZFlo4kG7/U8AHGnTk12JQdgibDGZhORGLti/Y2rQC Hxcky4qQueeDXnaiXeKl17A+XhBrej8= X-Authority-Analysis: v=2.4 cv=B92JFutM c=1 sm=1 tr=0 ts=6a952559 cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=V8glGbnc2Ofi9Qvn3v5h:22 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=-ONQtpLVr4F4_6mk-BEA:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_02,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 clxscore=1015 suspectscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310054 X-Spam-Status: No, score=-0.7 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, RCVD_IN_DNSWL_LOW,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.1 OzLabs 8 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org Replace the legacy MMIO stub in pseries_eeh_err_inject() with a full PAPR-compliant RTAS error injection path using the existing RTAS work-area allocator. The mutex is not a buffer lock; it serializes the firmware session open/inject/close sequence as required by PAPR. No global buffer is allocated or used. VFIO EEH error injection exposes a generic userspace ABI. pSeries maps the generic EEH error types to RTAS ibm,errinjct encodings via pseries_eeh_type_to_rtas(). EEH_ERR_TYPE_32 and EEH_ERR_TYPE_64 are unchanged; their values are defined in arch/powerpc/include/uapi/asm/eeh.h and are not renumbered. Tested with corresponding QEMU patches: https://lore.kernel.org/all/20251029150618.186803-1-nnmlinux@linux.ibm.com/ Signed-off-by: Narayana Murty N --- arch/powerpc/platforms/pseries/eeh_pseries.c | 123 ++++++++++++++----- 1 file changed, 95 insertions(+), 28 deletions(-) diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c index fafe0004e738..fcb8c560d813 100644 --- a/arch/powerpc/platforms/pseries/eeh_pseries.c +++ b/arch/powerpc/platforms/pseries/eeh_pseries.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -34,6 +35,7 @@ #include #include #include +#include /* RTAS tokens */ static int ibm_set_eeh_option; @@ -958,8 +960,6 @@ static int prepare_errinjct_buffer(void *buf, struct eeh_pe *pe, return -EINVAL; if (upper_32_bits(addr) || upper_32_bits(mask)) { - pr_err("32-bit IOA injection cannot encode addr=%#lx mask=%#lx\n", - addr, mask); return -EINVAL; } @@ -992,50 +992,117 @@ static int prepare_errinjct_buffer(void *buf, struct eeh_pe *pe, break; default: - pr_err("unsupported RTAS error injection type 0x%x\n", rtas_type); + pr_err("unsupported RTAS error injection type 0x%x\n", + rtas_type); return -EINVAL; } - pr_debug("errinjct buffer ready: rtas_type=0x%x func=%d addr=0x%lx mask=0x%lx\n", - rtas_type, func, addr, mask); return 0; } +/* pseries-local mutex serializes the open/inject/close RTAS session */ +static DEFINE_MUTEX(pseries_errinjct_mutex); + /** * pseries_eeh_err_inject - Inject specified error to the indicated PE * @pe: the indicated PE - * @type: error type - * @func: specific error type - * @addr: address - * @mask: address mask - * The routine is called to inject specified error, which is - * determined by @type and @func, to the indicated PE + * @type: generic EEH error type (EEH_ERR_TYPE_32 or EEH_ERR_TYPE_64) + * @func: specific error function + * @addr: address argument (type-dependent, may be zero) + * @mask: address mask (type-dependent, may be zero) + * + * Implements PAPR-compliant error injection using: + * ibm,open-errinjct -> ibm,errinjct -> ibm,close-errinjct + * + * A short-lived RTAS work area is allocated per call; no global buffer + * is used. pseries_errinjct_mutex serializes the open/inject/close + * session sequence. + * + * Return: 0 on success, negative errno on failure. */ static int pseries_eeh_err_inject(struct eeh_pe *pe, int type, int func, unsigned long addr, unsigned long mask) { - struct eeh_dev *pdev; + struct rtas_work_area *area; + phys_addr_t area_phys; + u32 buf_phys; + void *buf; + int open_token, errinjct_token, close_token; + int session_token; + int rtas_type; + int close_rc; + int rc; + + rc = validate_errinjct_args(pe, type, func, addr, mask); + if (rc) + return rc; - /* Check on PCI error type */ - if (type != EEH_ERR_TYPE_32 && type != EEH_ERR_TYPE_64) + rtas_type = pseries_eeh_type_to_rtas(type); + if (rtas_type < 0) return -EINVAL; - switch (func) { - case EEH_ERR_FUNC_LD_MEM_ADDR: - case EEH_ERR_FUNC_LD_MEM_DATA: - case EEH_ERR_FUNC_ST_MEM_ADDR: - case EEH_ERR_FUNC_ST_MEM_DATA: - /* injects a MMIO error for all pdev's belonging to PE */ - pci_lock_rescan_remove(); - list_for_each_entry(pdev, &pe->edevs, entry) - eeh_pe_inject_mmio_error(pdev->pdev); - pci_unlock_rescan_remove(); - break; - default: - return -ERANGE; + open_token = rtas_function_token(RTAS_FN_IBM_OPEN_ERRINJCT); + errinjct_token = rtas_function_token(RTAS_FN_IBM_ERRINJCT); + close_token = rtas_function_token(RTAS_FN_IBM_CLOSE_ERRINJCT); + + if (open_token == RTAS_UNKNOWN_SERVICE || + errinjct_token == RTAS_UNKNOWN_SERVICE || + close_token == RTAS_UNKNOWN_SERVICE) + return -ENODEV; + + area = rtas_work_area_alloc(RTAS_ERRINJCT_BUF_SIZE); + buf = rtas_work_area_raw_buf(area); + area_phys = rtas_work_area_phys(area); + + if (WARN_ON_ONCE(upper_32_bits(area_phys))) { + rc = -ERANGE; + goto out_free_area; } - return 0; + buf_phys = lower_32_bits(area_phys); + + rc = prepare_errinjct_buffer(buf, pe, rtas_type, func, addr, mask); + if (rc) + goto out_free_area; + + mutex_lock(&pseries_errinjct_mutex); + + do { + rc = rtas_call(open_token, 0, 2, &session_token); + } while (rtas_busy_delay(rc)); + + if (rc) { + pr_err("ibm,open-errinjct failed: status=%d\n", rc); + rc = rtas_error_rc(rc); + goto out_unlock; + } + + do { + rc = rtas_call(errinjct_token, 3, 1, NULL, + rtas_type, session_token, buf_phys); + } while (rtas_busy_delay(rc)); + + if (rc) { + pr_err("ibm,errinjct failed: status=%d\n", rc); + rc = rtas_error_rc(rc); + } + + do { + close_rc = rtas_call(close_token, 1, 1, NULL, session_token); + } while (rtas_busy_delay(close_rc)); + + if (close_rc) { + pr_warn("ibm,close-errinjct failed: status=%d\n", close_rc); + if (!rc) + rc = rtas_error_rc(close_rc); + } + +out_unlock: + mutex_unlock(&pseries_errinjct_mutex); + +out_free_area: + rtas_work_area_free(area); + return rc; } static struct eeh_ops pseries_eeh_ops = { From patchwork Mon Aug 31 06:54:41 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Narayana Murty N X-Patchwork-Id: 2294957 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; 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Mon, 31 Aug 2026 06:55:16 +0000 (GMT) Received: from Narayanas-MacBook-Pro.bl1-in.ibm.com (unknown [9.123.3.199]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 31 Aug 2026 06:55:16 +0000 (GMT) From: Narayana Murty N To: mahesh@linux.ibm.com, maddy@linux.ibm.com, mpe@ellerman.id.au, christophe.leroy@csgroup.eu, oohall@gmail.com, npiggin@gmail.com, tpearson@raptorengineering.com, alex@shazbot.org Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, sbhat@linux.ibm.com, sourabhjain@linux.ibm.com, harshpb@linux.ibm.com Subject: [PATCH v4 5/5] powerpc/powernv/eeh: Map VFIO EEH error injection to OPAL Date: Mon, 31 Aug 2026 12:24:41 +0530 Message-ID: <20260831065441.48654-6-nnmlinux@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260831065441.48654-1-nnmlinux@linux.ibm.com> References: <20260831065441.48654-1-nnmlinux@linux.ibm.com> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDA1NCBTYWx0ZWRfX9PuF67nWD7Xw WyzfwZ9MjESuBe9Eay1ZZQOt1z8E4vwnSygh+TazcoCuVeTGjKpkWTFvQuy745xBGsczcj44MJ/ IB+2Jotna+hGNT9Pu/2xFL7gv7DE4B0Li9T66JcLIBs2D/s0uYxa2wk03ojsNM0aB09vV2DUWcK oNOLlWY+qeNF5qjSkt9onu0J0Y6yUOqHlF69WPcxUOSK18gRENSsJ1JzEmjMtWeLfe+XlCLnySb NdE43DqOROQbxBvLn8Ak/qcZJCeiSaIl6T1+xZmW4IdW/K1THFJ7CFxHoLWGQW0SdTreKFVyk3S xSNmjX1AFybiS2izOeUcdT7GrtS5rY68MsFH6sVVulLTsgTg2idGISrU6ddRmmm+0V1AGsYEAMd j2bkkAgH/vK8kEJJyJuTZMLc7NfLDCl0nI9Zniwctt+mx5cQdSnyCUmuwCLePwfjmoJ2kg6FyBx +FI7mIJRTbm/WIApSHg== X-Proofpoint-ORIG-GUID: QMZqNXMBZFWrOtVFzI9fYly01aWWplKe X-Authority-Analysis: v=2.4 cv=CNgamxrD c=1 sm=1 tr=0 ts=6a95255d cx=c_pps a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=U7nrCbtTmkRpXpFmAIza:22 a=VnNF1IyMAAAA:8 a=gCSPA1kvSQ6flSZAFA0A:9 X-Proofpoint-GUID: hfeGTLxW7yp_TBn7YzyA4Y8iHsGzNlpN X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDA1NCBTYWx0ZWRfX0xUXxkBY2nVN I9pOB5ZqWuemAyRSGQQqOiIxusMFS5yRDEsIZ9RKtbqS4kPpeSdnyOrz4bUmSxo8QQkql5Rudk6 e1Wgb2T6u2+YlHWqnzTY/PdYhptH2II= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_02,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1011 impostorscore=0 adultscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310054 X-Spam-Status: No, score=-0.7 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, RCVD_IN_DNSWL_LOW,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.1 OzLabs 8 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org VFIO EEH error injection exposes a generic userspace ABI. pSeries maps the generic EEH error types to RTAS ibm,errinjct encodings, while PowerNV maps the same generic ABI values to OPAL-specific encodings. Keep EEH_ERR_TYPE_32 and EEH_ERR_TYPE_64 unchanged. The mapping is internal to the platform backend. Add a switch in pnv_eeh_err_inject() that translates: EEH_ERR_TYPE_32 -> OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR EEH_ERR_TYPE_64 -> OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR64 Return -EINVAL for unsupported error types rather than comparing directly against OPAL constants. This decouples the VFIO/EEH interface from OPAL implementation details, paralleling the approach used on the pSeries RTAS path. Signed-off-by: Narayana Murty N --- arch/powerpc/platforms/powernv/eeh-powernv.c | 27 +++++++++++++++----- 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c index db3370d1673c..53c4c05aaef2 100644 --- a/arch/powerpc/platforms/powernv/eeh-powernv.c +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c @@ -1167,13 +1167,28 @@ static int pnv_eeh_err_inject(struct eeh_pe *pe, int type, int func, { struct pci_controller *hose = pe->phb; struct pnv_phb *phb = hose->private_data; + int opal_type; s64 rc; - if (type != OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR && - type != OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR64) { - pr_warn("%s: Invalid error type %d\n", - __func__, type); - return -ERANGE; + /* + * VFIO EEH error injection exposes a generic userspace ABI. + * pSeries maps the generic EEH error types to RTAS ibm,errinjct + * encodings, while PowerNV maps the same generic ABI values to + * OPAL-specific encodings. + * + * Keep EEH_ERR_TYPE_32 and EEH_ERR_TYPE_64 unchanged. The + * mapping is internal to the platform backend. + */ + switch (type) { + case EEH_ERR_TYPE_32: + opal_type = OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR; + break; + case EEH_ERR_TYPE_64: + opal_type = OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR64; + break; + default: + pr_warn("%s: Invalid error type %d\n", __func__, type); + return -EINVAL; } if (func < OPAL_ERR_INJECT_FUNC_IOA_LD_MEM_ADDR || @@ -1192,7 +1207,7 @@ static int pnv_eeh_err_inject(struct eeh_pe *pe, int type, int func, /* Do error injection */ rc = opal_pci_err_inject(phb->opal_id, pe->addr, - type, func, addr, mask); + opal_type, func, addr, mask); if (rc != OPAL_SUCCESS) { pr_warn("%s: Failure %lld injecting error " "%d-%d to PHB#%x-PE#%x\n",