From patchwork Wed Jun 20 03:49:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Donnellan X-Patchwork-Id: 931917 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 419W7L6bt6z9s2t for ; Wed, 20 Jun 2018 13:50:06 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 419W7L4DMMzF0nB for ; Wed, 20 Jun 2018 13:50:06 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=au1.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=andrew.donnellan@au1.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 419W7G38qhzF0lh for ; Wed, 20 Jun 2018 13:50:02 +1000 (AEST) Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w5K3nCfP045873 for ; Tue, 19 Jun 2018 23:50:00 -0400 Received: from e06smtp03.uk.ibm.com (e06smtp03.uk.ibm.com [195.75.94.99]) by mx0a-001b2d01.pphosted.com with ESMTP id 2jqeeghp62-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 19 Jun 2018 23:50:00 -0400 Received: from localhost by e06smtp03.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 20 Jun 2018 04:49:56 +0100 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w5K3nt1220840638 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 20 Jun 2018 03:49:55 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 70F7711C050; Wed, 20 Jun 2018 04:40:20 +0100 (BST) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1F90911C04C; Wed, 20 Jun 2018 04:40:20 +0100 (BST) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 20 Jun 2018 04:40:20 +0100 (BST) Received: from intelligence.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher DHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id CE2BDA01F2; Wed, 20 Jun 2018 13:49:53 +1000 (AEST) From: Andrew Donnellan To: skiboot@lists.ozlabs.org Date: Wed, 20 Jun 2018 13:49:35 +1000 X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: X-TM-AS-GCONF: 00 x-cbid: 18062003-0012-0000-0000-0000028155B8 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18062003-0013-0000-0000-000020B2927C Message-Id: <1706431786e7ce832b6fc22f90630a4a39a001d5.1529466573.git-series.andrew.donnellan@au1.ibm.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-06-20_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=998 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1805220000 definitions=main-1806200042 Subject: [Skiboot] [PATCH v2 1/3] init, occ: Initialise OCC earlier on BMC systems X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shilpa.bhat@linux.ibm.com, svaidy@linux.ibm.com, fbarrat@linux.vnet.ibm.com, alastair@d-silva.org Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" We need to use the OCC to obtain presence data for the SXM2 slots on Witherspoon systems. This is needed to determine device type for NVLink GPUs and OpenCAPI devices which can be plugged into the same slot. Support for this will be implemented in a future patch. Currently, OCC initialisation is done just before handing over to Linux, which is well after NPU probe. On FSP systems, OCC boot starts very late, so we wait until the last possible moment to initialise the skiboot side in order to give it the maximum time to boot. On BMC systems, OCC boot starts earlier, so there aren't any issues in moving it earlier in the skiboot init sequence. When running on a BMC machine, call occ_pstates_init() as early as possible in the init sequence. On FSP machines, continue to call it from its current location. Signed-off-by: Andrew Donnellan Reviewed-by: Shilpasri G Bhat --- v1->v2: - Change check to rely on BMC vs FSP rather than POWER8 vs POWER9 (thanks Shilpa) --- core/init.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/core/init.c b/core/init.c index 1ad747e77e4a..272a57a145ee 100644 --- a/core/init.c +++ b/core/init.c @@ -505,7 +505,8 @@ void __noreturn load_and_boot_kernel(bool is_reboot) ipmi_set_fw_progress_sensor(IPMI_FW_OS_BOOT); - occ_pstates_init(); + if (fsp_present()) + occ_pstates_init(); if (!is_reboot) { /* We wait for the nvram read to complete here so we can @@ -1079,6 +1080,17 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt) op_display(OP_LOG, OP_MOD_INIT, 0x0002); + /* + * On some POWER9 BMC systems, we need to initialise the OCC + * before the NPU to facilitate NVLink/OpenCAPI presence + * detection, so we set it up as early as possible. On FSP + * systems, Hostboot starts booting the OCC later, so we delay + * OCC initialisation as late as possible to give it the + * maximum time to boot up. + */ + if (!fsp_present()) + occ_pstates_init(); + pci_nvram_init(); preload_io_vpd(); From patchwork Wed Jun 20 03:49:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Donnellan X-Patchwork-Id: 931920 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 419W8K3Pzcz9s4w for ; Wed, 20 Jun 2018 13:50:57 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 419W8J6g3MzF0tD for ; Wed, 20 Jun 2018 13:50:56 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=au1.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=andrew.donnellan@au1.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 419W7J6cbbzF0mQ for ; Wed, 20 Jun 2018 13:50:04 +1000 (AEST) Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w5K3nC7l009936 for ; Tue, 19 Jun 2018 23:50:02 -0400 Received: from e06smtp04.uk.ibm.com (e06smtp04.uk.ibm.com [195.75.94.100]) by mx0a-001b2d01.pphosted.com with ESMTP id 2jqb8rfnx2-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 19 Jun 2018 23:50:01 -0400 Received: from localhost by e06smtp04.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 20 Jun 2018 04:49:57 +0100 Received: from d06av24.portsmouth.uk.ibm.com (d06av24.portsmouth.uk.ibm.com [9.149.105.60]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w5K3nuJW36503602 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 20 Jun 2018 03:49:56 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CB74942042; Wed, 20 Jun 2018 04:39:56 +0100 (BST) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E03BE42045; Wed, 20 Jun 2018 04:39:55 +0100 (BST) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 20 Jun 2018 04:39:55 +0100 (BST) Received: from intelligence.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher DHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id E00EFA020B; Wed, 20 Jun 2018 13:49:53 +1000 (AEST) From: Andrew Donnellan To: skiboot@lists.ozlabs.org Date: Wed, 20 Jun 2018 13:49:36 +1000 X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: X-TM-AS-GCONF: 00 x-cbid: 18062003-0016-0000-0000-000001DDEBB9 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18062003-0017-0000-0000-00003231FC19 Message-Id: MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-06-20_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1805220000 definitions=main-1806200042 Subject: [Skiboot] [PATCH v2 2/3] occ: Move occ declarations into occ.h X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shilpa.bhat@linux.ibm.com, svaidy@linux.ibm.com, fbarrat@linux.vnet.ibm.com, alastair@d-silva.org Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" OCC declarations are currently split between skiboot.h and occ-sensor.h. Given the growing unwieldyness of skiboot.h it's probably time to move it all into one header. Rename occ-sensor.h to occ.h, move all OCC-related declarations out of skiboot.h, and add #includes as necessary. Signed-off-by: Andrew Donnellan Reviewed-by: Shilpasri G Bhat --- core/hostservices.c | 1 +- core/init.c | 1 +- core/opal.c | 1 +- core/sensor.c | 1 +- hw/ipmi/ipmi-sel.c | 1 +- hw/occ-sensor.c | 2 +- hw/occ.c | 2 +- hw/psi.c | 1 +- include/occ-sensor.h | 264 +---------------------------------- include/occ.h | 296 ++++++++++++++++++++++++++++++++++++++- include/skiboot.h | 27 +--- platforms/ibm-fsp/common.c | 1 +- 12 files changed, 305 insertions(+), 293 deletions(-) delete mode 100644 include/occ-sensor.h create mode 100644 include/occ.h diff --git a/core/hostservices.c b/core/hostservices.c index c37bf2f0bbf0..d3a9b3cefe10 100644 --- a/core/hostservices.c +++ b/core/hostservices.c @@ -29,6 +29,7 @@ #include #include #include +#include #define HOSTBOOT_RUNTIME_INTERFACE_VERSION 1 diff --git a/core/init.c b/core/init.c index 272a57a145ee..b660af2d7824 100644 --- a/core/init.c +++ b/core/init.c @@ -53,6 +53,7 @@ #include #include #include +#include enum proc_gen proc_gen; unsigned int pcie_max_link_speed; diff --git a/core/opal.c b/core/opal.c index e3a3bbdeea98..7ffca9c17bb3 100644 --- a/core/opal.c +++ b/core/opal.c @@ -31,6 +31,7 @@ #include #include #include +#include /* Pending events to signal via opal_poll_events */ uint64_t opal_pending_events; diff --git a/core/sensor.c b/core/sensor.c index c3fa3193757f..bd329a183ee1 100644 --- a/core/sensor.c +++ b/core/sensor.c @@ -21,6 +21,7 @@ #include #include #include +#include struct dt_node *sensor_node; diff --git a/hw/ipmi/ipmi-sel.c b/hw/ipmi/ipmi-sel.c index 54cc597d9dee..eb63147bdc52 100644 --- a/hw/ipmi/ipmi-sel.c +++ b/hw/ipmi/ipmi-sel.c @@ -26,6 +26,7 @@ #include #include #include +#include /* OEM SEL fields */ #define SEL_OEM_ID_0 0x55 diff --git a/hw/occ-sensor.c b/hw/occ-sensor.c index 783f75740c42..c062f64a6fd3 100644 --- a/hw/occ-sensor.c +++ b/hw/occ-sensor.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include enum sensor_attr { SENSOR_SAMPLE, diff --git a/hw/occ.c b/hw/occ.c index 29eb4bd67ca2..fc95d3926bb0 100644 --- a/hw/occ.c +++ b/hw/occ.c @@ -31,7 +31,7 @@ #include #include #include -#include +#include /* OCC Communication Area for PStates */ diff --git a/hw/psi.c b/hw/psi.c index f5168ba96765..cbdbeaa9aeff 100644 --- a/hw/psi.c +++ b/hw/psi.c @@ -35,6 +35,7 @@ #include #include #include +#include static LIST_HEAD(psis); static u64 psi_link_timer; diff --git a/include/occ-sensor.h b/include/occ-sensor.h deleted file mode 100644 index 67ffae86e699..000000000000 --- a/include/occ-sensor.h +++ /dev/null @@ -1,264 +0,0 @@ -/* Copyright 2017 IBM Corp. - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or - * implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* - * OCC Sensor Data - * - * OCC sensor data will use BAR2 (OCC Common is per physical drawer). - * Starting address is at offset 0x00580000 from BAR2 base address. - * Maximum size is 1.5MB. - * - * ------------------------------------------------------------------------- - * | Start (Offset from | End | Size |Description | - * | BAR2 base address) | | | | - * ------------------------------------------------------------------------- - * | 0x00580000 | 0x005A57FF |150kB |OCC 0 Sensor Data Block| - * | 0x005A5800 | 0x005CAFFF |150kB |OCC 1 Sensor Data Block| - * | : | : | : | : | - * | 0x00686800 | 0x006ABFFF |150kB |OCC 7 Sensor Data Block| - * | 0x006AC000 | 0x006FFFFF |336kB |Reserved | - * ------------------------------------------------------------------------- - * - * - * OCC N Sensor Data Block Layout (150kB) - * - * The sensor data block layout is the same for each OCC N. It contains - * sensor-header-block, sensor-names buffer, sensor-readings-ping buffer and - * sensor-readings-pong buffer. - * - * ---------------------------------------------------------------------------- - * | Start (Offset from OCC | End | Size |Description | - * | N Sensor Data Block) | | | | - * ---------------------------------------------------------------------------- - * | 0x00000000 | 0x000003FF |1kB |Sensor Data Header Block | - * | 0x00000400 | 0x0000CBFF |50kB |Sensor Names | - * | 0x0000CC00 | 0x0000DBFF |4kB |Reserved | - * | 0x0000DC00 | 0x00017BFF |40kB |Sensor Readings ping buffer| - * | 0x00017C00 | 0x00018BFF |4kB |Reserved | - * | 0x00018C00 | 0x00022BFF |40kB |Sensor Readings pong buffer| - * | 0x00022C00 | 0x000257FF |11kB |Reserved | - * ---------------------------------------------------------------------------- - * - * Sensor Data Header Block : This is written once by the OCC during - * initialization after a load or reset. Layout is defined in 'struct - * occ_sensor_data_header' - * - * Sensor Names : This is written once by the OCC during initialization after a - * load or reset. It contains static information for each sensor. The number of - * sensors, format version and length of each sensor is defined in - * 'Sensor Data Header Block'. Format of each sensor name is defined in - * 'struct occ_sensor_name'. The first sensor starts at offset 0 followed - * immediately by the next sensor. - * - * Sensor Readings Ping/Pong Buffer: - * There are two 40kB buffers to store the sensor readings. One buffer that - * is currently being updated by the OCC and one that is available to be read. - * Each of these buffers will be of the same format. The number of sensors and - * the format version of the ping and pong buffers is defined in the - * 'Sensor Data Header Block'. - * - * Each sensor within the ping and pong buffers may be of a different format - * and length. For each sensor the length and format is determined by its - * 'struct occ_sensor_name.structure_type' in the Sensor Names buffer. - * - * -------------------------------------------------------------------------- - * | Offset | Byte0 | Byte1 | Byte2 | Byte3 | Byte4 | Byte5 | Byte6 | Byte7 | - * -------------------------------------------------------------------------- - * | 0x0000 |Valid | Reserved | - * | |(0x01) | | - * -------------------------------------------------------------------------- - * | 0x0008 | Sensor Readings | - * -------------------------------------------------------------------------- - * | : | : | - * -------------------------------------------------------------------------- - * | 0xA000 | End of Data | - * -------------------------------------------------------------------------- - * - */ - -#define MAX_OCCS 8 -#define MAX_CHARS_SENSOR_NAME 16 -#define MAX_CHARS_SENSOR_UNIT 4 - -#define OCC_SENSOR_DATA_BLOCK_OFFSET 0x00580000 -#define OCC_SENSOR_DATA_BLOCK_SIZE 0x00025800 - -/* - * These should match the definitions inside the OCC source: - * occ/src/occ_405/sensor/sensor_info.c - */ - -enum occ_sensor_type { - OCC_SENSOR_TYPE_GENERIC = 0x0001, - OCC_SENSOR_TYPE_CURRENT = 0x0002, - OCC_SENSOR_TYPE_VOLTAGE = 0x0004, - OCC_SENSOR_TYPE_TEMPERATURE = 0x0008, - OCC_SENSOR_TYPE_UTILIZATION = 0x0010, - OCC_SENSOR_TYPE_TIME = 0x0020, - OCC_SENSOR_TYPE_FREQUENCY = 0x0040, - OCC_SENSOR_TYPE_POWER = 0x0080, - OCC_SENSOR_TYPE_PERFORMANCE = 0x0200, -}; - -#define OCC_ENABLED_SENSOR_MASK (OCC_SENSOR_TYPE_GENERIC | \ - OCC_SENSOR_TYPE_CURRENT | \ - OCC_SENSOR_TYPE_VOLTAGE | \ - OCC_SENSOR_TYPE_TIME | \ - OCC_SENSOR_TYPE_TEMPERATURE | \ - OCC_SENSOR_TYPE_POWER | \ - OCC_SENSOR_TYPE_UTILIZATION | \ - OCC_SENSOR_TYPE_FREQUENCY | \ - OCC_SENSOR_TYPE_PERFORMANCE); - -enum occ_sensor_location { - OCC_SENSOR_LOC_SYSTEM = 0x0001, - OCC_SENSOR_LOC_PROCESSOR = 0x0002, - OCC_SENSOR_LOC_PARTITION = 0x0004, - OCC_SENSOR_LOC_MEMORY = 0x0008, - OCC_SENSOR_LOC_VRM = 0x0010, - OCC_SENSOR_LOC_OCC = 0x0020, - OCC_SENSOR_LOC_CORE = 0x0040, - OCC_SENSOR_LOC_GPU = 0x0080, - OCC_SENSOR_LOC_QUAD = 0x0100, -}; - -enum sensor_struct_type { - OCC_SENSOR_READING_FULL = 0x01, - OCC_SENSOR_READING_COUNTER = 0x02, -}; - -/** - * struct occ_sensor_data_header - Sensor Data Header Block - * @valid: When the value is 0x01 it indicates - * that this header block and the sensor - * names buffer are ready - * @version: Format version of this block - * @nr_sensors: Number of sensors in names, ping and - * pong buffer - * @reading_version: Format version of the Ping/Pong buffer - * @names_offset: Offset to the location of names buffer - * @names_version: Format version of names buffer - * @names_length: Length of each sensor in names buffer - * @reading_ping_offset: Offset to the location of Ping buffer - * @reading_pong_offset: Offset to the location of Pong buffer - * @pad/reserved: Unused data - */ -struct occ_sensor_data_header { - u8 valid; - u8 version; - u16 nr_sensors; - u8 reading_version; - u8 pad[3]; - u32 names_offset; - u8 names_version; - u8 name_length; - u16 reserved; - u32 reading_ping_offset; - u32 reading_pong_offset; -} __attribute__((__packed__)); - -/** - * struct occ_sensor_name - Format of Sensor Name - * @name: Sensor name - * @units: Sensor units of measurement - * @gsid: Global sensor id (OCC) - * @freq: Update frequency - * @scale_factor: Scaling factor - * @type: Sensor type as defined in - * 'enum occ_sensor_type' - * @location: Sensor location as defined in - * 'enum occ_sensor_location' - * @structure_type: Indicates type of data structure used - * for the sensor readings in the ping and - * pong buffers for this sensor as defined - * in 'enum sensor_struct_type' - * @reading_offset: Offset from the start of the ping/pong - * reading buffers for this sensor - * @sensor_data: Sensor specific info - * @pad: Padding to fit the size of 48 bytes. - */ -struct occ_sensor_name { - char name[MAX_CHARS_SENSOR_NAME]; - char units[MAX_CHARS_SENSOR_UNIT]; - u16 gsid; - u32 freq; - u32 scale_factor; - u16 type; - u16 location; - u8 structure_type; - u32 reading_offset; - u8 sensor_data; - u8 pad[8]; -} __attribute__((__packed__)); - -/** - * struct occ_sensor_record - Sensor Reading Full - * @gsid: Global sensor id (OCC) - * @timestamp: Time base counter value while updating - * the sensor - * @sample: Latest sample of this sensor - * @sample_min: Minimum value since last OCC reset - * @sample_max: Maximum value since last OCC reset - * @csm_min: Minimum value since last reset request - * by CSM (CORAL) - * @csm_max: Maximum value since last reset request - * by CSM (CORAL) - * @profiler_min: Minimum value since last reset request - * by profiler (CORAL) - * @profiler_max: Maximum value since last reset request - * by profiler (CORAL) - * @job_scheduler_min: Minimum value since last reset request - * by job scheduler(CORAL) - * @job_scheduler_max: Maximum value since last reset request - * by job scheduler (CORAL) - * @accumulator: Accumulator for this sensor - * @update_tag: Count of the number of ticks that have - * passed between updates - * @pad: Padding to fit the size of 48 bytes - */ -struct occ_sensor_record { - u16 gsid; - u64 timestamp; - u16 sample; - u16 sample_min; - u16 sample_max; - u16 csm_min; - u16 csm_max; - u16 profiler_min; - u16 profiler_max; - u16 job_scheduler_min; - u16 job_scheduler_max; - u64 accumulator; - u32 update_tag; - u8 pad[8]; -} __attribute__((__packed__)); - -/** - * struct occ_sensor_counter - Sensor Reading Counter - * @gsid: Global sensor id (OCC) - * @timestamp: Time base counter value while updating - * the sensor - * @accumulator: Accumulator/Counter - * @sample: Latest sample of this sensor (0/1) - * @pad: Padding to fit the size of 24 bytes - */ -struct occ_sensor_counter { - u16 gsid; - u64 timestamp; - u64 accumulator; - u8 sample; - u8 pad[5]; -} __attribute__((__packed__)); diff --git a/include/occ.h b/include/occ.h new file mode 100644 index 000000000000..c9faef9fdfb8 --- /dev/null +++ b/include/occ.h @@ -0,0 +1,296 @@ +/* Copyright 2017 IBM Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + * implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* OCC Functions */ + +extern void occ_pstates_init(void); +extern void occ_fsp_init(void); + +/* OCC interrupt for P8 */ +extern void occ_p8_interrupt(uint32_t chip_id); +extern void occ_send_dummy_interrupt(void); + +/* OCC interrupt for P9 */ +extern void occ_p9_interrupt(uint32_t chip_id); + +/* OCC load support */ +extern void occ_poke_load_queue(void); + +/* OCC/Host PNOR ownership */ +enum pnor_owner { + PNOR_OWNER_HOST, + PNOR_OWNER_EXTERNAL, +}; +extern void occ_pnor_set_owner(enum pnor_owner owner); + + +/* OCC Inband Sensors */ +extern bool occ_sensors_init(void); +extern int occ_sensor_read(u32 handle, u64 *data); +extern int occ_sensor_group_clear(u32 group_hndl, int token); +extern void occ_add_sensor_groups(struct dt_node *sg, u32 *phandles, + u32 *ptype, int nr_phandles, int chipid); + +extern int occ_sensor_group_enable(u32 group_hndl, int token, bool enable); + +/* + * OCC Sensor Data + * + * OCC sensor data will use BAR2 (OCC Common is per physical drawer). + * Starting address is at offset 0x00580000 from BAR2 base address. + * Maximum size is 1.5MB. + * + * ------------------------------------------------------------------------- + * | Start (Offset from | End | Size |Description | + * | BAR2 base address) | | | | + * ------------------------------------------------------------------------- + * | 0x00580000 | 0x005A57FF |150kB |OCC 0 Sensor Data Block| + * | 0x005A5800 | 0x005CAFFF |150kB |OCC 1 Sensor Data Block| + * | : | : | : | : | + * | 0x00686800 | 0x006ABFFF |150kB |OCC 7 Sensor Data Block| + * | 0x006AC000 | 0x006FFFFF |336kB |Reserved | + * ------------------------------------------------------------------------- + * + * + * OCC N Sensor Data Block Layout (150kB) + * + * The sensor data block layout is the same for each OCC N. It contains + * sensor-header-block, sensor-names buffer, sensor-readings-ping buffer and + * sensor-readings-pong buffer. + * + * ---------------------------------------------------------------------------- + * | Start (Offset from OCC | End | Size |Description | + * | N Sensor Data Block) | | | | + * ---------------------------------------------------------------------------- + * | 0x00000000 | 0x000003FF |1kB |Sensor Data Header Block | + * | 0x00000400 | 0x0000CBFF |50kB |Sensor Names | + * | 0x0000CC00 | 0x0000DBFF |4kB |Reserved | + * | 0x0000DC00 | 0x00017BFF |40kB |Sensor Readings ping buffer| + * | 0x00017C00 | 0x00018BFF |4kB |Reserved | + * | 0x00018C00 | 0x00022BFF |40kB |Sensor Readings pong buffer| + * | 0x00022C00 | 0x000257FF |11kB |Reserved | + * ---------------------------------------------------------------------------- + * + * Sensor Data Header Block : This is written once by the OCC during + * initialization after a load or reset. Layout is defined in 'struct + * occ_sensor_data_header' + * + * Sensor Names : This is written once by the OCC during initialization after a + * load or reset. It contains static information for each sensor. The number of + * sensors, format version and length of each sensor is defined in + * 'Sensor Data Header Block'. Format of each sensor name is defined in + * 'struct occ_sensor_name'. The first sensor starts at offset 0 followed + * immediately by the next sensor. + * + * Sensor Readings Ping/Pong Buffer: + * There are two 40kB buffers to store the sensor readings. One buffer that + * is currently being updated by the OCC and one that is available to be read. + * Each of these buffers will be of the same format. The number of sensors and + * the format version of the ping and pong buffers is defined in the + * 'Sensor Data Header Block'. + * + * Each sensor within the ping and pong buffers may be of a different format + * and length. For each sensor the length and format is determined by its + * 'struct occ_sensor_name.structure_type' in the Sensor Names buffer. + * + * -------------------------------------------------------------------------- + * | Offset | Byte0 | Byte1 | Byte2 | Byte3 | Byte4 | Byte5 | Byte6 | Byte7 | + * -------------------------------------------------------------------------- + * | 0x0000 |Valid | Reserved | + * | |(0x01) | | + * -------------------------------------------------------------------------- + * | 0x0008 | Sensor Readings | + * -------------------------------------------------------------------------- + * | : | : | + * -------------------------------------------------------------------------- + * | 0xA000 | End of Data | + * -------------------------------------------------------------------------- + * + */ + +#define MAX_OCCS 8 +#define MAX_CHARS_SENSOR_NAME 16 +#define MAX_CHARS_SENSOR_UNIT 4 + +#define OCC_SENSOR_DATA_BLOCK_OFFSET 0x00580000 +#define OCC_SENSOR_DATA_BLOCK_SIZE 0x00025800 + +/* + * These should match the definitions inside the OCC source: + * occ/src/occ_405/sensor/sensor_info.c + */ + +enum occ_sensor_type { + OCC_SENSOR_TYPE_GENERIC = 0x0001, + OCC_SENSOR_TYPE_CURRENT = 0x0002, + OCC_SENSOR_TYPE_VOLTAGE = 0x0004, + OCC_SENSOR_TYPE_TEMPERATURE = 0x0008, + OCC_SENSOR_TYPE_UTILIZATION = 0x0010, + OCC_SENSOR_TYPE_TIME = 0x0020, + OCC_SENSOR_TYPE_FREQUENCY = 0x0040, + OCC_SENSOR_TYPE_POWER = 0x0080, + OCC_SENSOR_TYPE_PERFORMANCE = 0x0200, +}; + +#define OCC_ENABLED_SENSOR_MASK (OCC_SENSOR_TYPE_GENERIC | \ + OCC_SENSOR_TYPE_CURRENT | \ + OCC_SENSOR_TYPE_VOLTAGE | \ + OCC_SENSOR_TYPE_TIME | \ + OCC_SENSOR_TYPE_TEMPERATURE | \ + OCC_SENSOR_TYPE_POWER | \ + OCC_SENSOR_TYPE_UTILIZATION | \ + OCC_SENSOR_TYPE_FREQUENCY | \ + OCC_SENSOR_TYPE_PERFORMANCE); + +enum occ_sensor_location { + OCC_SENSOR_LOC_SYSTEM = 0x0001, + OCC_SENSOR_LOC_PROCESSOR = 0x0002, + OCC_SENSOR_LOC_PARTITION = 0x0004, + OCC_SENSOR_LOC_MEMORY = 0x0008, + OCC_SENSOR_LOC_VRM = 0x0010, + OCC_SENSOR_LOC_OCC = 0x0020, + OCC_SENSOR_LOC_CORE = 0x0040, + OCC_SENSOR_LOC_GPU = 0x0080, + OCC_SENSOR_LOC_QUAD = 0x0100, +}; + +enum sensor_struct_type { + OCC_SENSOR_READING_FULL = 0x01, + OCC_SENSOR_READING_COUNTER = 0x02, +}; + +/** + * struct occ_sensor_data_header - Sensor Data Header Block + * @valid: When the value is 0x01 it indicates + * that this header block and the sensor + * names buffer are ready + * @version: Format version of this block + * @nr_sensors: Number of sensors in names, ping and + * pong buffer + * @reading_version: Format version of the Ping/Pong buffer + * @names_offset: Offset to the location of names buffer + * @names_version: Format version of names buffer + * @names_length: Length of each sensor in names buffer + * @reading_ping_offset: Offset to the location of Ping buffer + * @reading_pong_offset: Offset to the location of Pong buffer + * @pad/reserved: Unused data + */ +struct occ_sensor_data_header { + u8 valid; + u8 version; + u16 nr_sensors; + u8 reading_version; + u8 pad[3]; + u32 names_offset; + u8 names_version; + u8 name_length; + u16 reserved; + u32 reading_ping_offset; + u32 reading_pong_offset; +} __attribute__((__packed__)); + +/** + * struct occ_sensor_name - Format of Sensor Name + * @name: Sensor name + * @units: Sensor units of measurement + * @gsid: Global sensor id (OCC) + * @freq: Update frequency + * @scale_factor: Scaling factor + * @type: Sensor type as defined in + * 'enum occ_sensor_type' + * @location: Sensor location as defined in + * 'enum occ_sensor_location' + * @structure_type: Indicates type of data structure used + * for the sensor readings in the ping and + * pong buffers for this sensor as defined + * in 'enum sensor_struct_type' + * @reading_offset: Offset from the start of the ping/pong + * reading buffers for this sensor + * @sensor_data: Sensor specific info + * @pad: Padding to fit the size of 48 bytes. + */ +struct occ_sensor_name { + char name[MAX_CHARS_SENSOR_NAME]; + char units[MAX_CHARS_SENSOR_UNIT]; + u16 gsid; + u32 freq; + u32 scale_factor; + u16 type; + u16 location; + u8 structure_type; + u32 reading_offset; + u8 sensor_data; + u8 pad[8]; +} __attribute__((__packed__)); + +/** + * struct occ_sensor_record - Sensor Reading Full + * @gsid: Global sensor id (OCC) + * @timestamp: Time base counter value while updating + * the sensor + * @sample: Latest sample of this sensor + * @sample_min: Minimum value since last OCC reset + * @sample_max: Maximum value since last OCC reset + * @csm_min: Minimum value since last reset request + * by CSM (CORAL) + * @csm_max: Maximum value since last reset request + * by CSM (CORAL) + * @profiler_min: Minimum value since last reset request + * by profiler (CORAL) + * @profiler_max: Maximum value since last reset request + * by profiler (CORAL) + * @job_scheduler_min: Minimum value since last reset request + * by job scheduler(CORAL) + * @job_scheduler_max: Maximum value since last reset request + * by job scheduler (CORAL) + * @accumulator: Accumulator for this sensor + * @update_tag: Count of the number of ticks that have + * passed between updates + * @pad: Padding to fit the size of 48 bytes + */ +struct occ_sensor_record { + u16 gsid; + u64 timestamp; + u16 sample; + u16 sample_min; + u16 sample_max; + u16 csm_min; + u16 csm_max; + u16 profiler_min; + u16 profiler_max; + u16 job_scheduler_min; + u16 job_scheduler_max; + u64 accumulator; + u32 update_tag; + u8 pad[8]; +} __attribute__((__packed__)); + +/** + * struct occ_sensor_counter - Sensor Reading Counter + * @gsid: Global sensor id (OCC) + * @timestamp: Time base counter value while updating + * the sensor + * @accumulator: Accumulator/Counter + * @sample: Latest sample of this sensor (0/1) + * @pad: Padding to fit the size of 24 bytes + */ +struct occ_sensor_counter { + u16 gsid; + u64 timestamp; + u64 accumulator; + u8 sample; + u8 pad[5]; +} __attribute__((__packed__)); diff --git a/include/skiboot.h b/include/skiboot.h index 989565c1f8b5..bba76c12c39e 100644 --- a/include/skiboot.h +++ b/include/skiboot.h @@ -206,10 +206,8 @@ extern void uart_init(void); extern void mbox_init(void); extern void early_uart_init(void); extern void homer_init(void); -extern void occ_pstates_init(void); extern void slw_init(void); extern void add_cpu_idle_state_properties(void); -extern void occ_fsp_init(void); extern void lpc_rtc_init(void); /* flash support */ @@ -242,23 +240,6 @@ enum { extern void uart_set_console_policy(int policy); extern bool uart_enabled(void); -/* OCC interrupt for P8 */ -extern void occ_p8_interrupt(uint32_t chip_id); -extern void occ_send_dummy_interrupt(void); - -/* OCC interrupt for P9 */ -extern void occ_p9_interrupt(uint32_t chip_id); - -/* OCC load support */ -extern void occ_poke_load_queue(void); - -/* OCC/Host PNOR ownership */ -enum pnor_owner { - PNOR_OWNER_HOST, - PNOR_OWNER_EXTERNAL, -}; -extern void occ_pnor_set_owner(enum pnor_owner owner); - /* PRD */ extern void prd_psi_interrupt(uint32_t proc); extern void prd_tmgt_interrupt(uint32_t proc); @@ -310,12 +291,4 @@ extern int fake_nvram_info(uint32_t *total_size); extern int fake_nvram_start_read(void *dst, uint32_t src, uint32_t len); extern int fake_nvram_write(uint32_t offset, void *src, uint32_t size); -/* OCC Inband Sensors */ -extern bool occ_sensors_init(void); -extern int occ_sensor_read(u32 handle, u64 *data); -extern int occ_sensor_group_clear(u32 group_hndl, int token); -extern void occ_add_sensor_groups(struct dt_node *sg, u32 *phandles, - u32 *ptype, int nr_phandles, int chipid); - -extern int occ_sensor_group_enable(u32 group_hndl, int token, bool enable); #endif /* __SKIBOOT_H */ diff --git a/platforms/ibm-fsp/common.c b/platforms/ibm-fsp/common.c index d7433e31dcf7..a7f2beedcb78 100644 --- a/platforms/ibm-fsp/common.c +++ b/platforms/ibm-fsp/common.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "ibm-fsp.h" From patchwork Wed Jun 20 03:49:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Donnellan X-Patchwork-Id: 931919 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 419W7z3T0jz9s2t for ; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 20 Jun 2018 04:49:56 +0100 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w5K3ntBY33292298 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 20 Jun 2018 03:49:55 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3A359AE04D; Wed, 20 Jun 2018 04:38:38 +0100 (BST) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DC8B0AE045; Wed, 20 Jun 2018 04:38:37 +0100 (BST) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 20 Jun 2018 04:38:37 +0100 (BST) Received: from intelligence.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher DHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 068B9A022E; Wed, 20 Jun 2018 13:49:54 +1000 (AEST) From: Andrew Donnellan To: skiboot@lists.ozlabs.org Date: Wed, 20 Jun 2018 13:49:37 +1000 X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: X-TM-AS-GCONF: 00 x-cbid: 18062003-4275-0000-0000-0000028FB02E X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18062003-4276-0000-0000-00003796F64C Message-Id: <5344ef39f38b70a6c994654bc9f86f362ac858a7.1529466573.git-series.andrew.donnellan@au1.ibm.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-06-20_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1805220000 definitions=main-1806200042 Subject: [Skiboot] [PATCH v2 3/3] occ: Add support for GPU presence detection X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shilpa.bhat@linux.ibm.com, svaidy@linux.ibm.com, fbarrat@linux.vnet.ibm.com, alastair@d-silva.org Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" On the Witherspoon platform, we need to distinguish between NVLink GPUs and OpenCAPI accelerators. In order to do this, we first need to find out whether the SXM2 socket is populated. On Witherspoon, the SXM2 socket's presence detection pin is only visible via I2C from the APSS, and thus can only be exposed to the host via the OCC. The OCC, per OCC Firmware Interface Specification for POWER9 version 0.22, now exposes this to skiboot through a field in the dynamic data shared memory. Add the necessary dynamic data changes required to read the version and GPU presence fields. Add a function, occ_get_gpu_presence(), that can be used to check GPU presence. If the OCC isn't reporting presence (old OCC firmware, or some other reason), we default to assuming there is a device present and wait until link training to fail. This will be used in later patches to fix up the NPU2 probe path for OpenCAPI support on Witherspoon. Signed-off-by: Andrew Donnellan Reviewed-by: Shilpasri G Bhat --- hw/occ.c | 23 ++++++++++++++++++++--- include/occ.h | 4 ++++ 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/hw/occ.c b/hw/occ.c index fc95d3926bb0..10b2de07dd7a 100644 --- a/hw/occ.c +++ b/hw/occ.c @@ -229,10 +229,10 @@ struct occ_response_buffer { */ struct occ_dynamic_data { u8 occ_state; + u8 major_version; + u8 minor_version; + u8 gpus_present; u8 spare1; - u8 spare2; - u8 spare3; - u8 spare4; u8 cpu_throttle; u8 mem_throttle; u8 quick_pwr_drop; @@ -1230,6 +1230,23 @@ exit: unlock(&chip->queue_lock); } +bool occ_get_gpu_presence(struct proc_chip *chip, int gpu_num) +{ + struct occ_dynamic_data *ddata; + + assert(gpu_num <= 2); + + ddata = get_occ_dynamic_data(chip); + + if (ddata->major_version != 0 || ddata->minor_version < 1) { + prlog(PR_INFO, "OCC: OCC not reporting GPU slot presence, " + "assuming device is present\n"); + return true; + } + + return (bool)(ddata->gpus_present & 1 << gpu_num); +} + static void occ_add_powercap_sensors(struct dt_node *power_mgt); static void occ_add_psr_sensors(struct dt_node *power_mgt); diff --git a/include/occ.h b/include/occ.h index c9faef9fdfb8..a46b9219fc70 100644 --- a/include/occ.h +++ b/include/occ.h @@ -14,6 +14,8 @@ * limitations under the License. */ +#include + /* OCC Functions */ extern void occ_pstates_init(void); @@ -36,6 +38,8 @@ enum pnor_owner { }; extern void occ_pnor_set_owner(enum pnor_owner owner); +/* GPU presence detection */ +bool occ_get_gpu_presence(struct proc_chip *chip, int gpu_num); /* OCC Inband Sensors */ extern bool occ_sensors_init(void);