From patchwork Mon Jun 18 11:25:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 930802 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 418TKL2kjWz9s1B for ; Mon, 18 Jun 2018 21:25:10 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933445AbeFRLZJ (ORCPT ); Mon, 18 Jun 2018 07:25:09 -0400 Received: from mga14.intel.com ([192.55.52.115]:38198 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933381AbeFRLZI (ORCPT ); Mon, 18 Jun 2018 07:25:08 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Jun 2018 04:25:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,239,1526367600"; d="scan'208";a="208975603" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga004.jf.intel.com with ESMTP; 18 Jun 2018 04:25:06 -0700 Received: by black.fi.intel.com (Postfix, from userid 1001) id 3EC36FA; Mon, 18 Jun 2018 14:25:07 +0300 (EEST) From: Mika Westerberg To: Linus Walleij Cc: Heikki Krogerus , Andy Shevchenko , Mika Westerberg , linux-gpio@vger.kernel.org Subject: [PATCH] pinctrl: cedarfork: Correct EAST pin ordering Date: Mon, 18 Jun 2018 14:25:06 +0300 Message-Id: <20180618112506.59459-1-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.17.1 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The driver missed the fact that PECI_SMB_DATA has moved from EAST community 224 to 182 instead. Correct the pin ordering accordingly. Signed-off-by: Mika Westerberg Acked-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-cedarfork.c | 92 +++++++++++------------ 1 file changed, 46 insertions(+), 46 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-cedarfork.c b/drivers/pinctrl/intel/pinctrl-cedarfork.c index 59216b0533d9..b2a2456f019e 100644 --- a/drivers/pinctrl/intel/pinctrl-cedarfork.c +++ b/drivers/pinctrl/intel/pinctrl-cedarfork.c @@ -240,51 +240,51 @@ static const struct pinctrl_pin_desc cdf_pins[] = { PINCTRL_PIN(179, "GBE_GPIO10"), PINCTRL_PIN(180, "GBE_GPIO11"), PINCTRL_PIN(181, "GBE_GPIO12"), - PINCTRL_PIN(182, "SATA0_LED_N"), - PINCTRL_PIN(183, "SATA1_LED_N"), - PINCTRL_PIN(184, "SATA_PDETECT0"), - PINCTRL_PIN(185, "SATA_PDETECT1"), - PINCTRL_PIN(186, "SATA0_SDOUT"), - PINCTRL_PIN(187, "SATA1_SDOUT"), - PINCTRL_PIN(188, "SATA2_LED_N"), - PINCTRL_PIN(189, "SATA_PDETECT2"), - PINCTRL_PIN(190, "SATA2_SDOUT"), + PINCTRL_PIN(182, "PECI_SMB_DATA"), + PINCTRL_PIN(183, "SATA0_LED_N"), + PINCTRL_PIN(184, "SATA1_LED_N"), + PINCTRL_PIN(185, "SATA_PDETECT0"), + PINCTRL_PIN(186, "SATA_PDETECT1"), + PINCTRL_PIN(187, "SATA0_SDOUT"), + PINCTRL_PIN(188, "SATA1_SDOUT"), + PINCTRL_PIN(189, "SATA2_LED_N"), + PINCTRL_PIN(190, "SATA_PDETECT2"), + PINCTRL_PIN(191, "SATA2_SDOUT"), /* EAST3 */ - PINCTRL_PIN(191, "ESPI_IO0"), - PINCTRL_PIN(192, "ESPI_IO1"), - PINCTRL_PIN(193, "ESPI_IO2"), - PINCTRL_PIN(194, "ESPI_IO3"), - PINCTRL_PIN(195, "ESPI_CLK"), - PINCTRL_PIN(196, "ESPI_RST_N"), - PINCTRL_PIN(197, "ESPI_CS0_N"), - PINCTRL_PIN(198, "ESPI_ALRT0_N"), - PINCTRL_PIN(199, "ESPI_CS1_N"), - PINCTRL_PIN(200, "ESPI_ALRT1_N"), - PINCTRL_PIN(201, "ESPI_CLK_LOOPBK"), + PINCTRL_PIN(192, "ESPI_IO0"), + PINCTRL_PIN(193, "ESPI_IO1"), + PINCTRL_PIN(194, "ESPI_IO2"), + PINCTRL_PIN(195, "ESPI_IO3"), + PINCTRL_PIN(196, "ESPI_CLK"), + PINCTRL_PIN(197, "ESPI_RST_N"), + PINCTRL_PIN(198, "ESPI_CS0_N"), + PINCTRL_PIN(199, "ESPI_ALRT0_N"), + PINCTRL_PIN(200, "ESPI_CS1_N"), + PINCTRL_PIN(201, "ESPI_ALRT1_N"), + PINCTRL_PIN(202, "ESPI_CLK_LOOPBK"), /* EAST0 */ - PINCTRL_PIN(202, "SPI_CS0_N"), - PINCTRL_PIN(203, "SPI_CS1_N"), - PINCTRL_PIN(204, "SPI_MOSI_IO0"), - PINCTRL_PIN(205, "SPI_MISO_IO1"), - PINCTRL_PIN(206, "SPI_IO2"), - PINCTRL_PIN(207, "SPI_IO3"), - PINCTRL_PIN(208, "SPI_CLK"), - PINCTRL_PIN(209, "SPI_CLK_LOOPBK"), - PINCTRL_PIN(210, "SUSPWRDNACK"), - PINCTRL_PIN(211, "PMU_SUSCLK"), - PINCTRL_PIN(212, "ADR_COMPLETE"), - PINCTRL_PIN(213, "ADR_TRIGGER_N"), - PINCTRL_PIN(214, "PMU_SLP_S45_N"), - PINCTRL_PIN(215, "PMU_SLP_S3_N"), - PINCTRL_PIN(216, "PMU_WAKE_N"), - PINCTRL_PIN(217, "PMU_PWRBTN_N"), - PINCTRL_PIN(218, "PMU_RESETBUTTON_N"), - PINCTRL_PIN(219, "PMU_PLTRST_N"), - PINCTRL_PIN(220, "SUS_STAT_N"), - PINCTRL_PIN(221, "PMU_I2C_CLK"), - PINCTRL_PIN(222, "PMU_I2C_DATA"), - PINCTRL_PIN(223, "PECI_SMB_CLK"), - PINCTRL_PIN(224, "PECI_SMB_DATA"), + PINCTRL_PIN(203, "SPI_CS0_N"), + PINCTRL_PIN(204, "SPI_CS1_N"), + PINCTRL_PIN(205, "SPI_MOSI_IO0"), + PINCTRL_PIN(206, "SPI_MISO_IO1"), + PINCTRL_PIN(207, "SPI_IO2"), + PINCTRL_PIN(208, "SPI_IO3"), + PINCTRL_PIN(209, "SPI_CLK"), + PINCTRL_PIN(210, "SPI_CLK_LOOPBK"), + PINCTRL_PIN(211, "SUSPWRDNACK"), + PINCTRL_PIN(212, "PMU_SUSCLK"), + PINCTRL_PIN(213, "ADR_COMPLETE"), + PINCTRL_PIN(214, "ADR_TRIGGER_N"), + PINCTRL_PIN(215, "PMU_SLP_S45_N"), + PINCTRL_PIN(216, "PMU_SLP_S3_N"), + PINCTRL_PIN(217, "PMU_WAKE_N"), + PINCTRL_PIN(218, "PMU_PWRBTN_N"), + PINCTRL_PIN(219, "PMU_RESETBUTTON_N"), + PINCTRL_PIN(220, "PMU_PLTRST_N"), + PINCTRL_PIN(221, "SUS_STAT_N"), + PINCTRL_PIN(222, "PMU_I2C_CLK"), + PINCTRL_PIN(223, "PMU_I2C_DATA"), + PINCTRL_PIN(224, "PECI_SMB_CLK"), PINCTRL_PIN(225, "PECI_SMB_ALRT_N"), /* EMMC */ PINCTRL_PIN(226, "EMMC_CMD"), @@ -315,9 +315,9 @@ static const struct intel_padgroup cdf_community0_gpps[] = { }; static const struct intel_padgroup cdf_community1_gpps[] = { - CDF_GPP(0, 168, 190), /* EAST2 */ - CDF_GPP(1, 191, 201), /* EAST3 */ - CDF_GPP(2, 202, 225), /* EAST0 */ + CDF_GPP(0, 168, 191), /* EAST2 */ + CDF_GPP(1, 192, 202), /* EAST3 */ + CDF_GPP(2, 203, 225), /* EAST0 */ CDF_GPP(3, 226, 236), /* EMMC */ };