From patchwork Mon May 18 14:17:09 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jamie Gibbons X-Patchwork-Id: 2239872 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=t7DxYUEn; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4gK15456szz1xpM for ; Tue, 19 May 2026 00:53:12 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B6FCB84683; Mon, 18 May 2026 16:52:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.b="t7DxYUEn"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 57FC084683; Mon, 18 May 2026 16:13:27 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0369E803C6 for ; Mon, 18 May 2026 16:13:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=prvs=59164dd44=Jamie.Gibbons@microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1779113604; x=1810649604; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DKK0PWsSyF6joEYxoaYmYRBZqH75zCbgYOnoV6V+knc=; b=t7DxYUEnuvGTxVqsb1Zd1slXpnRdmC5VvunM48FXZ3OkJkC+g+fk9j70 6oYyZo7H6rnw/+He6sNi0KYUfz/WDYNnSwkLqSTqd0YF4tOafAgen7F5f Uy4EZin/Zldu//jKkyAs5pc4VGdwqS4To1TKs63fVAICXCsnHCjJxOPkl Lhdz/PZ+wLSwEC7s1LiYxjWcfKxzM3T8gjZDAy2+xV4h5hnZQ1g/DhRKb SFXioF2umkhz8m6zt142i8xF5dtK6MeKBiziuDMaDk3ISu8zNFf1YWB1O ns/7fQBz88zApY4nmlNSycUJKAtgNkhCrpC1VEbNfshRd8P7pB9zORse1 g==; X-CSE-ConnectionGUID: 3fDPcS/PRXmwaHf+Qw+M8Q== X-CSE-MsgGUID: JjMt2+FRQRq/XoeRsdtBlA== X-IronPort-AV: E=Sophos;i="6.23,242,1770620400"; d="scan'208";a="66418623" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 18 May 2026 07:13:22 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 18 May 2026 07:13:22 -0700 Received: from jamie-dev.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 18 May 2026 07:13:20 -0700 From: Jamie Gibbons To: CC: Conor Dooley , Valentina Fernandez Alanis , Tom Rini , Marek Vasut , Leo Yu-Chi Liang , Michael Trimarchi , Tuyen Dang , Subject: [PATCH 1/4] mailbox: mpfs-mbox: fix MMIO mapping calculation Date: Mon, 18 May 2026 15:17:09 +0100 Message-ID: <20260518141712.3597880-2-jamie.gibbons@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518141712.3597880-1-jamie.gibbons@microchip.com> References: <20260518141712.3597880-1-jamie.gibbons@microchip.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 18 May 2026 16:52:36 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Correct the MMIO mapping size calculation, which previously relied on an invalid start/end subtraction. This change corrects a functional bug and cleans up the driver without altering its behavior. Fixes: 111e9bf6a5ac ("mailbox: add PolarFire SoC mailbox driver") Signed-off-by: Jamie Gibbons --- drivers/mailbox/mpfs-mbox.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mailbox/mpfs-mbox.c b/drivers/mailbox/mpfs-mbox.c index 55238847ecd..4a9465c7a72 100644 --- a/drivers/mailbox/mpfs-mbox.c +++ b/drivers/mailbox/mpfs-mbox.c @@ -145,7 +145,7 @@ static int mpfs_mbox_probe(struct udevice *dev) return ret; }; - mbox->ctrl_base = devm_ioremap(dev, regs.start, regs.start - regs.end); + mbox->ctrl_base = devm_ioremap(dev, res.start, resource_size(&res)); ret = ofnode_read_resource(node, 2, ®s); if (ret) { @@ -153,7 +153,7 @@ static int mpfs_mbox_probe(struct udevice *dev) return ret; }; - mbox->mbox_base = devm_ioremap(dev, regs.start, regs.start - regs.end); + mbox->mbox_base = devm_ioremap(dev, res.start, resource_size(&res)); mbox->dev = dev; dev_set_priv(dev, mbox); From patchwork Mon May 18 14:17:10 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jamie Gibbons X-Patchwork-Id: 2239873 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 18 May 2026 07:13:24 -0700 Received: from jamie-dev.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 18 May 2026 07:13:22 -0700 From: Jamie Gibbons To: CC: Conor Dooley , Valentina Fernandez Alanis , Tom Rini , Marek Vasut , Leo Yu-Chi Liang , Michael Trimarchi , Tuyen Dang , Subject: [PATCH 2/4] mailbox: mpfs-mbox: fix Driver Model private data handling Date: Mon, 18 May 2026 15:17:10 +0100 Message-ID: <20260518141712.3597880-3-jamie.gibbons@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518141712.3597880-1-jamie.gibbons@microchip.com> References: <20260518141712.3597880-1-jamie.gibbons@microchip.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 18 May 2026 16:52:36 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The MPFS mailbox driver declares priv_auto but also allocates a second private data structure in the legacy probe path and overwrites the device’s private pointer using dev_set_priv(). This results in leaking the auto-allocated private data and replacing the driver’s private state mid-probe, which is incorrect usage of the U-Boot Driver Model and can lead to undefined behavior. Remove the redundant allocation and dev_set_priv() call so that the driver consistently uses the auto-allocated private data provided by U-Boot. Fixes: 111e9bf6a5ac ("mailbox: add PolarFire SoC mailbox driver") Signed-off-by: Jamie Gibbons --- drivers/mailbox/mpfs-mbox.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/mailbox/mpfs-mbox.c b/drivers/mailbox/mpfs-mbox.c index 4a9465c7a72..2e20b08307c 100644 --- a/drivers/mailbox/mpfs-mbox.c +++ b/drivers/mailbox/mpfs-mbox.c @@ -135,10 +135,6 @@ static int mpfs_mbox_probe(struct udevice *dev) node = dev_ofnode(dev); - mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL); - if (!mbox) - return -ENOMEM; - ret = ofnode_read_resource(node, 0, ®s); if (ret) { dev_err(dev, "No reg property for controller base\n"); @@ -156,7 +152,6 @@ static int mpfs_mbox_probe(struct udevice *dev) mbox->mbox_base = devm_ioremap(dev, res.start, resource_size(&res)); mbox->dev = dev; - dev_set_priv(dev, mbox); mbox->chan->con_priv = mbox; return 0; From patchwork Mon May 18 14:17:11 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jamie Gibbons X-Patchwork-Id: 2239874 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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18 May 2026 07:13:27 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 18 May 2026 07:13:26 -0700 Received: from jamie-dev.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 18 May 2026 07:13:24 -0700 From: Jamie Gibbons To: CC: Conor Dooley , Valentina Fernandez Alanis , Tom Rini , Marek Vasut , Leo Yu-Chi Liang , Michael Trimarchi , Tuyen Dang , Subject: [PATCH 3/4] mailbox: mpfs-mbox: fix driver bug and cleanup Date: Mon, 18 May 2026 15:17:11 +0100 Message-ID: <20260518141712.3597880-4-jamie.gibbons@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518141712.3597880-1-jamie.gibbons@microchip.com> References: <20260518141712.3597880-1-jamie.gibbons@microchip.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 18 May 2026 16:52:36 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Remove an unused and invalid struct mbox_chan pointer from the private data and fix incorrect memory handling in the probe path, where the private data structure was allocated. This change corrects a functional bugs and cleans up the driver without altering its behavior. Fixes: 111e9bf6a5ac ("mailbox: add PolarFire SoC mailbox driver") Signed-off-by: Jamie Gibbons --- drivers/mailbox/mpfs-mbox.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/mailbox/mpfs-mbox.c b/drivers/mailbox/mpfs-mbox.c index 2e20b08307c..08c51c96718 100644 --- a/drivers/mailbox/mpfs-mbox.c +++ b/drivers/mailbox/mpfs-mbox.c @@ -37,13 +37,12 @@ struct mpfs_mbox { struct udevice *dev; void __iomem *ctrl_base; void __iomem *mbox_base; - struct mbox_chan *chan; }; static bool mpfs_mbox_busy(struct mbox_chan *chan) { struct mpfs_mbox *mbox = dev_get_priv(chan->dev); - uint16_t status; + u32 status; status = readl(mbox->ctrl_base + SERVICES_SR_OFFSET); @@ -152,7 +151,6 @@ static int mpfs_mbox_probe(struct udevice *dev) mbox->mbox_base = devm_ioremap(dev, res.start, resource_size(&res)); mbox->dev = dev; - mbox->chan->con_priv = mbox; return 0; } From patchwork Mon May 18 14:17:12 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jamie Gibbons X-Patchwork-Id: 2239875 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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18 May 2026 07:13:29 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex3.mchp-main.com (10.10.87.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.37; Mon, 18 May 2026 07:13:28 -0700 Received: from jamie-dev.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 18 May 2026 07:13:26 -0700 From: Jamie Gibbons To: CC: Conor Dooley , Valentina Fernandez Alanis , Tom Rini , Marek Vasut , Leo Yu-Chi Liang , Michael Trimarchi , Tuyen Dang , Subject: [PATCH 4/4] mailbox: mpfs-mbox: support new syscon based devicetree configuration Date: Mon, 18 May 2026 15:17:12 +0100 Message-ID: <20260518141712.3597880-5-jamie.gibbons@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518141712.3597880-1-jamie.gibbons@microchip.com> References: <20260518141712.3597880-1-jamie.gibbons@microchip.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 18 May 2026 16:52:36 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The original PolarFire SoC mailbox devicetree bindings described the control/status and interrupt registers as standalone reg regions of the mailbox device. This was incorrect, as these registers are shared system control blocks and should instead be modeled as syscon devices. Linux has since corrected this by introducing syscon-based bindings for the MPFS mailbox and updating the mailbox driver to access the control and interrupt registers via syscon/regmap. U-Boot, however, continued to expect the legacy binding, causing mailbox access to fail when using Linux-aligned devicetrees. Update the U-Boot MPFS mailbox driver to support the new syscon-based bindings by resolving the control and sysreg syscon nodes and accessing the registers through regmap. Support for the legacy mailbox binding is retained for backwards compatibility with existing firmware-provided devicetrees. This brings the U-Boot mailbox driver in line with the corrected hardware description and matches the behavior of the Linux mailbox driver. Signed-off-by: Jamie Gibbons --- Hi Tom, Should this have the following fix tag? Thanks, Jamie. Fixes: 5d401bfbdf1d ("Subtree merge tag 'v7.0-dts' of dts repo [1] into dts/upstream") --- drivers/mailbox/Kconfig | 2 + drivers/mailbox/mpfs-mbox.c | 99 +++++++++++++++++++++++++++---------- 2 files changed, 74 insertions(+), 27 deletions(-) diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig index f45e611c966..1d9e284cfd1 100644 --- a/drivers/mailbox/Kconfig +++ b/drivers/mailbox/Kconfig @@ -32,6 +32,8 @@ config MPFS_MBOX bool "Enable MPFS system controller support" depends on DM_MAILBOX && ARCH_RV64I select DEVRES + depends on SYSCON + depends on REGMAP help Enable support for the mailboxes that provide a communication channel with the system controller integrated on PolarFire SoC. diff --git a/drivers/mailbox/mpfs-mbox.c b/drivers/mailbox/mpfs-mbox.c index 08c51c96718..b1ce377525e 100644 --- a/drivers/mailbox/mpfs-mbox.c +++ b/drivers/mailbox/mpfs-mbox.c @@ -13,19 +13,21 @@ #include #include #include -#include #include #include #include -#include -#include +#include +#include #include #include -#include #include +#include +#include #define SERVICES_CR_OFFSET 0x50u #define SERVICES_SR_OFFSET 0x54u +#define MESSAGE_INT_OFFSET 0x18cu +#define MAILBOX_REG_OFFSET 0x800u #define SERVICE_CR_REQ_MASK 0x1u #define SERVICE_SR_BUSY_MASK 0x2u @@ -35,8 +37,10 @@ struct mpfs_mbox { struct udevice *dev; - void __iomem *ctrl_base; void __iomem *mbox_base; + void __iomem *int_reg; + struct regmap *control_scb; + struct regmap *sysreg_scb; }; static bool mpfs_mbox_busy(struct mbox_chan *chan) @@ -44,7 +48,7 @@ static bool mpfs_mbox_busy(struct mbox_chan *chan) struct mpfs_mbox *mbox = dev_get_priv(chan->dev); u32 status; - status = readl(mbox->ctrl_base + SERVICES_SR_OFFSET); + regmap_read(mbox->control_scb, SERVICES_SR_OFFSET, &status); return status & SERVICE_SR_BUSY_MASK; } @@ -79,14 +83,15 @@ static int mpfs_mbox_send(struct mbox_chan *chan, const void *data) cmd_shifted = msg->cmd_opcode << SERVICE_CR_COMMAND_SHIFT; cmd_shifted |= SERVICE_CR_REQ_MASK; - writel(cmd_shifted, mbox->ctrl_base + SERVICES_CR_OFFSET); + + regmap_write(mbox->control_scb, SERVICES_CR_OFFSET, cmd_shifted); do { - value = readl(mbox->ctrl_base + SERVICES_CR_OFFSET); + regmap_read(mbox->control_scb, SERVICES_CR_OFFSET, &value); } while (SERVICE_CR_REQ_MASK == (value & SERVICE_CR_REQ_MASK)); do { - value = readl(mbox->ctrl_base + SERVICES_SR_OFFSET); + regmap_read(mbox->control_scb, SERVICES_SR_OFFSET, &value); } while (SERVICE_SR_BUSY_MASK == (value & SERVICE_SR_BUSY_MASK)); msg->response->resp_status = (value >> SERVICE_SR_STATUS_SHIFT); @@ -117,6 +122,11 @@ static int mpfs_mbox_recv(struct mbox_chan *chan, void *data) for (idx = 0; idx < response->resp_size; idx++) *((u8 *)(response->resp_msg) + idx) = readb(mbox->mbox_base + msg->resp_offset + idx); + if (mbox->sysreg_scb) + regmap_write(mbox->sysreg_scb, MESSAGE_INT_OFFSET, 0); + else + writel_relaxed(0, mbox->int_reg); + return 0; } @@ -125,36 +135,71 @@ static const struct mbox_ops mpfs_mbox_ops = { .recv = mpfs_mbox_recv, }; -static int mpfs_mbox_probe(struct udevice *dev) +/* + * Use global compatible lookup instead of phandles, as U-Boot may run + * with a reduced or firmware-provided device tree where mailbox syscon + * phandle properties are not guaranteed to be present. + */ +static int mpfs_mbox_syscon_probe(struct udevice *dev, struct mpfs_mbox *mbox) { - struct mpfs_mbox *mbox; - struct resource regs; ofnode node; - int ret; - node = dev_ofnode(dev); + node = ofnode_by_compatible(ofnode_null(), "microchip,mpfs-control-scb"); + if (!ofnode_valid(node)) + return -ENODEV; - ret = ofnode_read_resource(node, 0, ®s); - if (ret) { - dev_err(dev, "No reg property for controller base\n"); - return ret; - }; + mbox->control_scb = syscon_node_to_regmap(node); + if (IS_ERR(mbox->control_scb)) + return PTR_ERR(mbox->control_scb); + + node = ofnode_by_compatible(ofnode_null(), "microchip,mpfs-sysreg-scb"); + if (!ofnode_valid(node)) + return -ENODEV; + + mbox->sysreg_scb = syscon_node_to_regmap(node); + if (IS_ERR(mbox->sysreg_scb)) + return PTR_ERR(mbox->sysreg_scb); + + mbox->mbox_base = dev_read_addr_ptr(dev); + if (!mbox->mbox_base) + return -EINVAL; + + return 0; +} - mbox->ctrl_base = devm_ioremap(dev, res.start, resource_size(&res)); +static int mpfs_mbox_legacy_probe(struct udevice *dev, struct mpfs_mbox *mbox) +{ + int ret; - ret = ofnode_read_resource(node, 2, ®s); - if (ret) { - dev_err(dev, "No reg property for mailbox base\n"); + ret = regmap_init_mem_index(dev_ofnode(dev), &mbox->control_scb, 0); + if (ret) return ret; - }; - mbox->mbox_base = devm_ioremap(dev, res.start, resource_size(&res)); + mbox->mbox_base = dev_read_addr_index_ptr(dev, 2); + if (!mbox->mbox_base) + mbox->mbox_base = dev_read_addr_index_ptr(dev, 0) + MAILBOX_REG_OFFSET; - mbox->dev = dev; + mbox->int_reg = dev_read_addr_index_ptr(dev, 1); + if (!mbox->int_reg) + return -EINVAL; return 0; } +static int mpfs_mbox_probe(struct udevice *dev) +{ + struct mpfs_mbox *mbox = dev_get_priv(dev); + int ret; + + mbox->dev = dev; + + ret = mpfs_mbox_syscon_probe(dev, mbox); + if (!ret) + return 0; + + return mpfs_mbox_legacy_probe(dev, mbox); +} + static const struct udevice_id mpfs_mbox_ids[] = { {.compatible = "microchip,mpfs-mailbox"}, { } @@ -167,4 +212,4 @@ U_BOOT_DRIVER(mpfs_mbox) = { .probe = mpfs_mbox_probe, .priv_auto = sizeof(struct mpfs_mbox), .ops = &mpfs_mbox_ops, -}; +}; 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