From patchwork Tue Sep 23 14:45:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju X-Patchwork-Id: 2141041 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=OB85I1+j; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:4601:e00::3; helo=am.mirrors.kernel.org; envelope-from=linux-pwm+bounces-7341-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [IPv6:2604:1380:4601:e00::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4cWNDf4wkJz1y2d for ; Wed, 24 Sep 2025 00:49:54 +1000 (AEST) Received: from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 2DA091888DC6 for ; Tue, 23 Sep 2025 14:46:03 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 88C49255F31; Tue, 23 Sep 2025 14:45:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OB85I1+j" X-Original-To: linux-pwm@vger.kernel.org Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C582D23A984 for ; Tue, 23 Sep 2025 14:45:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758638732; cv=none; b=aE0SazHWdJ49eAJ5jR/dMLr09qJYD2OHJ4z5E/giBdBFZf3tbwn2/wqx3kjwOOPeXcYGS7mLNJpwvWIcHLAlh2sv9p8xuH3UDgWp47uFV2jKztfgNx+fB7eDH6UCu0/WMlRl/lRs3tmOZBNr6ydBlrtM61M3iFjt71vOKqpvR3c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758638732; c=relaxed/simple; bh=v/6yP43Xas8IL2SDwh5MqBaXKzliC0aaemzEd5pY6i8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bnBfwNEfd+Yg81oNnfFc8ZLP9CKN7jSqW/fltn8sHcy8WxxZ4oNAey7SwyThGY4o45+2er3TUA45hYtNj5lvy2NFwpqMFQTlcTcaV/F5jFtfIKC2y11IQimJ2HCw0ulAglK9hDMU2tCKZuC16lrhV/IEV4tGY38doHoeNkApq3Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=OB85I1+j; arc=none smtp.client-ip=209.85.128.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-46cb53c5900so28858735e9.3 for ; Tue, 23 Sep 2025 07:45:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1758638728; x=1759243528; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7hWknpiUnT9ncdcJYksHsytZcbFmlaZdO2Pms9xtMZQ=; b=OB85I1+ji4vjyb+s8CmATtkF+FseZjwU1pri18ws6xcn4Ppcu5gLemhXK0VwISNU5R ujbQPQFHRLMN0f4pIAtWpu8fclGhlW+o+Oqfr7vRo9WLDNnRjpQdvnucdBON8VhV0pvq Saz7Na/6gORltaeBsQuYLt2QImlV11us4MuWQD7FNzDbX5H7OTXWf/McQMJKHZ8hFkyT VZmvoXr0Jv1dS+hKVXHPN4LjQUorCxfmeJIj5R4cVenurmJSkAi3poo8bQ9wqBnNCBvr 0p78RXUhJJIqKHYk4mlZELF7GXULpFgAdS6vrYduEwxO26TDRKRN4vL2Hu3ylBsn+eKk 1lHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1758638728; x=1759243528; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7hWknpiUnT9ncdcJYksHsytZcbFmlaZdO2Pms9xtMZQ=; b=IpcbBp8+G5Hif716st06ah9bD8L+3z5KnrOPqWlTjx67yNFivKig/egXyS/KQQsIcF 5eSiPySJU9BIRn7vPExGZv4tI1bJ0UPZk/fVnX1FaiDGx2SbojMJP1GY66w92RmEW7vH vGHxfnwq6CrgO4DuIlg9MYAmZgsLyYCYu5nnwD6TBd7uiNbUmRnPjItlWz9gT6VOZEC0 zA5LmbAVmJOd0pyXCKGx1+LpSeG35SCuatA3Eu89c8DoFpMmZJWhz/2EDwnIqfCzDjfC HASscVJ69I9l5koZDfZ/EXzJNf0c2XNBbwpE0Z1QUD00NCtYtu2VYdASHCIa3RPj0AfP fE0A== X-Forwarded-Encrypted: i=1; AJvYcCXQsJl3ESmA+fBp7eMf+j2GVrWluTFjx+Szd1/eGDTLcTYGjlcgwFXZKv165oba84n7fo/INrI0Z/Y=@vger.kernel.org X-Gm-Message-State: AOJu0Ywb3JKkpoYySiPdyNRKOdhvmDQJatJnwns0rvsE1+YOqTw7NCBi 3NYrwEC4pEwWDY8J5WjSGzw/OEaW/M1S1ipKAF/nPCRNa46jHlzkeSkA X-Gm-Gg: ASbGncvTbg5SqclTAk5v18sapUbAeDPdDSe/6I9Kot9HIbokuN2UigFbLuWXHojueoD 52uGhKEmvs8yFmY3PaQDA+9J76nwDUme5rCEEAPkyT3XsIk2MR2d3ywZULqiX8EJrzQQ/qGDOmS BFgbB+LqqTns2pEb2goBK8IYSoQFAsb/3DVkj72qDhAHUsPGL5iNkou1QPef/75+9rQhg6bb1JI 2cLzCT8/QRv04pacghDrhVIdvR5Kczn8dhZltB3vJ+AZ+/ypu1wmUd8mVN1zGx4Ckotk0BvQRc7 0VOjYkv6bEm6b8JrgrQfi2qYL199ma7xJz0ymo/44yoUS4LpWivaxxUBdKqO4pQ067AL/BZjzKU GnHIm6ldZBNDFoHJKs8P0JqkRPsKIHQcjRAQQ+DLUdkJ2xwIvQtuWVw77lNsEEitt7o50oBDkRZ lNSg== X-Google-Smtp-Source: AGHT+IEfEIkKW4I9tGlw8bA5Jwg+sH3rB4c1YHW3qG0pAgSBH5W2hvRjK+Ule13vT0cVygKWhd9FoQ== X-Received: by 2002:a05:600c:4595:b0:45f:2bc1:22d0 with SMTP id 5b1f17b1804b1-46e1dac9c58mr29386395e9.33.1758638727687; Tue, 23 Sep 2025 07:45:27 -0700 (PDT) Received: from biju.lan (host86-139-30-37.range86-139.btcentralplus.com. [86.139.30.37]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-464f0aac3fdsm238940435e9.1.2025.09.23.07.45.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Sep 2025 07:45:27 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: Biju Das , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v3 1/8] dt-bindings: pwm: Document RZ/G3E GPT support Date: Tue, 23 Sep 2025 15:45:05 +0100 Message-ID: <20250923144524.191892-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250923144524.191892-1-biju.das.jz@bp.renesas.com> References: <20250923144524.191892-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-pwm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Biju Das Document support for the GPT found on the Renesas RZ/G3E (R9A09G047) SoC. The GPT is a 32-bit timer with 16 hardware channels (GPT0: 8 channel and GPT1: 8channels). The hardware supports simultaneous control of all channels. PWM waveforms can be generated by controlling the up-counter, downcounter, or up- and down-counter. Signed-off-by: Biju Das Reviewed-by: Rob Herring (Arm) --- v2->v3: * Added Rb tag from Rob. v1->v2: * Created separate document for RZ/G3E GPT. * Updated commit header and description. --- .../bindings/pwm/renesas,rzg3e-gpt.yaml | 323 ++++++++++++++++++ 1 file changed, 323 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/renesas,rzg3e-gpt.yaml diff --git a/Documentation/devicetree/bindings/pwm/renesas,rzg3e-gpt.yaml b/Documentation/devicetree/bindings/pwm/renesas,rzg3e-gpt.yaml new file mode 100644 index 000000000000..cb4ffab5f47f --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/renesas,rzg3e-gpt.yaml @@ -0,0 +1,323 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/renesas,rzg3e-gpt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/G3E General PWM Timer (GPT) + +maintainers: + - Biju Das + +description: | + RZ/G3E General PWM Timer (GPT) composed of 16 channels with 32-bit + timer. It supports the following functions + * 32 bits x 16 channels. + * Up-counting or down-counting (saw waves) or up/down-counting + (triangle waves) for each counter. + * Clock sources independently selectable for each channel. + * Four I/O pins per channel. + * Two output compare/input capture registers per channel. + * For the two output compare/input capture registers of each channel, + four registers are provided as buffer registers and are capable of + operating as comparison registers when buffering is not in use. + * In output compare operation, buffer switching can be at crests or + troughs, enabling the generation of laterally asymmetric PWM waveforms. + * Registers for setting up frame cycles in each channel (with capability + for generating interrupts at overflow or underflow) + * Generation of dead times in PWM operation. + * Synchronous starting, stopping and clearing counters for arbitrary + channels. + * Count start, count stop, count clear, up-count, down-count, or input + capture operation in response to a maximum of 8 ELC events. + * Count start, count stop, count clear, up-count, down-count, or input + capture operation in response to the status of two input pins. + * Starting, clearing, stopping and up/down counters in response to a + maximum of four external triggers. + * Output pin disable function by detected short-circuits between output + pins. + * A/D converter start triggers can be generated. + * Compare match A to F event and overflow/underflow event can be output + to the ELC. + * Enables the noise filter for input capture. + * Logical operation between the channel output. + +properties: + compatible: + items: + - const: renesas,r9a09g047-gpt # RZ/G3E + + reg: + maxItems: 1 + + '#pwm-cells': + const: 3 + + interrupts: + items: + - description: Input capture/compare match of the GTCCRA for channel GPT{0,1}.0 + - description: Input capture/compare match of the GTCCRB for channel GPT{0,1}.0 + - description: Compare match with the GTCCRC for channel GPT{0,1}.0 + - description: Compare match with the GTCCRD for channel GPT{0,1}.0 + - description: Compare match with the GTCCRE for channel GPT{0,1}.0 + - description: Compare match with the GTCCRF for channel GPT{0,1}.0 + - description: A and B both high interrupt for channel GPT{0,1}.0 + - description: A and B both low interrupt for channel GPT{0,1}.0 + - description: Input capture/compare match of the GTCCRA for channel GPT{0,1}.1 + - description: Input capture/compare match of the GTCCRB for channel GPT{0,1}.1 + - description: Compare match with the GTCCRC for channel GPT{0,1}.1 + - description: Compare match with the GTCCRD for channel GPT{0,1}.1 + - description: Compare match with the GTCCRE for channel GPT{0,1}.1 + - description: Compare match with the GTCCRF for channel GPT{0,1}.1 + - description: A and B both high interrupt for channel GPT{0,1}.1 + - description: A and B both low interrupt for channel GPT{0,1}.1 + - description: Input capture/compare match of the GTCCRA for channel GPT{0,1}.2 + - description: Input capture/compare match of the GTCCRB for channel GPT{0,1}.2 + - description: Compare match with the GTCCRC for channel GPT{0,1}.2 + - description: Compare match with the GTCCRD for channel GPT{0,1}.2 + - description: Compare match with the GTCCRE for channel GPT{0,1}.2 + - description: Compare match with the GTCCRF for channel GPT{0,1}.2 + - description: A and B both high interrupt for channel GPT{0,1}.2 + - description: A and B both low interrupt for channel GPT{0,1}.2 + - description: Input capture/compare match of the GTCCRA for channel GPT{0,1}.3 + - description: Input capture/compare match of the GTCCRB for channel GPT{0,1}.3 + - description: Compare match with the GTCCRC for channel GPT{0,1}.3 + - description: Compare match with the GTCCRD for channel GPT{0,1}.3 + - description: Compare match with the GTCCRE for channel GPT{0,1}.3 + - description: Compare match with the GTCCRF for channel GPT{0,1}.3 + - description: A and B both high interrupt for channel GPT{0,1}.3 + - description: A and B both low interrupt for channel GPT{0,1}.3 + - description: Input capture/compare match of the GTCCRA for channel GPT{0,1}.4 + - description: Input capture/compare match of the GTCCRB for channel GPT{0,1}.4 + - description: Compare match with the GTCCRC for channel GPT{0,1}.4 + - description: Compare match with the GTCCRD for channel GPT{0,1}.4 + - description: Compare match with the GTCCRE for channel GPT{0,1}.4 + - description: Compare match with the GTCCRF for channel GPT{0,1}.4 + - description: A and B both high interrupt for channel GPT{0,1}.4 + - description: A and B both low interrupt for channel GPT{0,1}.4 + - description: Input capture/compare match of the GTCCRA for channel GPT{0,1}.5 + - description: Input capture/compare match of the GTCCRB for channel GPT{0,1}.5 + - description: Compare match with the GTCCRC for channel GPT{0,1}.5 + - description: Compare match with the GTCCRD for channel GPT{0,1}.5 + - description: Compare match with the GTCCRE for channel GPT{0,1}.5 + - description: Compare match with the GTCCRF for channel GPT{0,1}.5 + - description: A and B both high interrupt for channel GPT{0,1}.5 + - description: A and B both low interrupt for channel GPT{0,1}.5 + - description: Input capture/compare match of the GTCCRA for channel GPT{0,1}.6 + - description: Input capture/compare match of the GTCCRB for channel GPT{0,1}.6 + - description: Compare match with the GTCCRC for channel GPT{0,1}.6 + - description: Compare match with the GTCCRD for channel GPT{0,1}.6 + - description: Compare match with the GTCCRE for channel GPT{0,1}.6 + - description: Compare match with the GTCCRF for channel GPT{0,1}.6 + - description: A and B both high interrupt for channel GPT{0,1}.6 + - description: A and B both low interrupt for channel GPT{0,1}.6 + - description: Input capture/compare match of the GTCCRA for channel GPT{0,1}.7 + - description: Input capture/compare match of the GTCCRB for channel GPT{0,1}.7 + - description: Compare match with the GTCCRC for channel GPT{0,1}.7 + - description: Compare match with the GTCCRD for channel GPT{0,1}.7 + - description: Compare match with the GTCCRE for channel GPT{0,1}.7 + - description: Compare match with the GTCCRF for channel GPT{0,1}.7 + - description: A and B both high interrupt for channel GPT{0,1}.7 + - description: A and B both low interrupt for channel GPT{0,1}.7 + + interrupt-names: + items: + - const: gtcia0 + - const: gtcib0 + - const: gtcic0 + - const: gtcid0 + - const: gtcie0 + - const: gtcif0 + - const: gtcih0 + - const: gtcil0 + - const: gtcia1 + - const: gtcib1 + - const: gtcic1 + - const: gtcid1 + - const: gtcie1 + - const: gtcif1 + - const: gtcih1 + - const: gtcil1 + - const: gtcia2 + - const: gtcib2 + - const: gtcic2 + - const: gtcid2 + - const: gtcie2 + - const: gtcif2 + - const: gtcih2 + - const: gtcil2 + - const: gtcia3 + - const: gtcib3 + - const: gtcic3 + - const: gtcid3 + - const: gtcie3 + - const: gtcif3 + - const: gtcih3 + - const: gtcil3 + - const: gtcia4 + - const: gtcib4 + - const: gtcic4 + - const: gtcid4 + - const: gtcie4 + - const: gtcif4 + - const: gtcih4 + - const: gtcil4 + - const: gtcia5 + - const: gtcib5 + - const: gtcic5 + - const: gtcid5 + - const: gtcie5 + - const: gtcif5 + - const: gtcih5 + - const: gtcil5 + - const: gtcia6 + - const: gtcib6 + - const: gtcic6 + - const: gtcid6 + - const: gtcie6 + - const: gtcif6 + - const: gtcih6 + - const: gtcil6 + - const: gtcia7 + - const: gtcib7 + - const: gtcic7 + - const: gtcid7 + - const: gtcie7 + - const: gtcif7 + - const: gtcih7 + - const: gtcil7 + + clocks: + items: + - description: Core clock (PCLKD) + - description: Bus clock (PCLKA) + + clock-names: + items: + - const: core + - const: bus + + power-domains: + maxItems: 1 + + resets: + items: + - description: Reset for bus clock (PCLKA/PCLKD) + - description: Reset for core clock (PCLKD) + + reset-names: + items: + - const: rst_p + - const: rst_s + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + - resets + - reset-names + +allOf: + - $ref: pwm.yaml# + +additionalProperties: false + +examples: + - | + #include + #include + + pwm@13010000 { + compatible = "renesas,r9a09g047-gpt"; + reg = <0x13010000 0x10000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "gtcia0", "gtcib0", "gtcic0", "gtcid0", + "gtcie0", "gtcif0", "gtcih0", "gtcil0", + "gtcia1", "gtcib1", "gtcic1", "gtcid1", + "gtcie1", "gtcif1", "gtcih1", "gtcil1", + "gtcia2", "gtcib2", "gtcic2", "gtcid2", + "gtcie2", "gtcif2", "gtcih2", "gtcil2", + "gtcia3", "gtcib3", "gtcic3", "gtcid3", + "gtcie3", "gtcif3", "gtcih3", "gtcil3", + "gtcia4", "gtcib4", "gtcic4", "gtcid4", + "gtcie4", "gtcif4", "gtcih4", "gtcil4", + "gtcia5", "gtcib5", "gtcic5", "gtcid5", + "gtcie5", "gtcif5", "gtcih5", "gtcil5", + "gtcia6", "gtcib6", "gtcic6", "gtcid6", + "gtcie6", "gtcif6", "gtcih6", "gtcil6", + "gtcia7", "gtcib7", "gtcic7", "gtcid7", + "gtcie7", "gtcif7", "gtcih7", "gtcil7"; + clocks = <&cpg CPG_MOD 0x31>, <&cpg CPG_MOD 0x31>; + clock-names = "core", "bus"; + power-domains = <&cpg>; + resets = <&cpg 0x59>, <&cpg 0x5a>; + reset-names = "rst_p", "rst_s"; + #pwm-cells = <3>; + }; From patchwork Tue Sep 23 14:45:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju X-Patchwork-Id: 2141043 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=bGBhYd0w; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45d1:ec00::1; helo=ny.mirrors.kernel.org; envelope-from=linux-pwm+bounces-7342-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org [IPv6:2604:1380:45d1:ec00::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4cWNDq6pdqz1y2d for ; Wed, 24 Sep 2025 00:50:03 +1000 (AEST) Received: from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 3A65C17BDBA for ; Tue, 23 Sep 2025 14:45:45 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5F46925782E; Tue, 23 Sep 2025 14:45:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="bGBhYd0w" X-Original-To: linux-pwm@vger.kernel.org Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 31185226D1D for ; Tue, 23 Sep 2025 14:45:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758638733; cv=none; b=Lnp3BnbNxFbymLNFRVnk44dnAEhl8tyBd/mYgh5lsfXlSetVW8fKYS/xcCxpp+Xs02JExil5s05iqQGHJp1HRtu4llbfNxmBP8CKUSh31V8Pmtqmm44wHJRNgiksWJ+jgZPY2mtDSjLOQjyGaa0n5XMeSgIfbccPxvsDoxxRQNw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758638733; c=relaxed/simple; bh=gHfJe2wkX0a4J0T2iaI/ZrXum2g8dABmTaj/MRvdciw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PncNzHhOk9W0jshk5z1FuYqM6yIwgFVfrjkA+LrR66E72EutWt0lzJw0wnQIqYxMF2/63dTazRaE++m3df6Rx1GdP+WSTez5YH2dibimhRA+XlOSHB3sMXeQwhAWYY/F7f3VVBA2CzJgHVMdxGT9g5gjZVGXQzOqa3kpQTlWYMo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=bGBhYd0w; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-46e1cc6299cso9761685e9.1 for ; Tue, 23 Sep 2025 07:45:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1758638728; x=1759243528; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=By9iTZQYVaW98aaM8/fCSAHAyxcTKcPpA3ibSeZs1YE=; b=bGBhYd0w++KpcxU7aVvecVbsR5MQIPpvzfsnOQmGahz/yh6ivnTHGt904m3D0OViQA JauHkmL+4FhKrV2OAgIGVLuXaGFDN5bmVWRTgWquXlIQrUTEqtmDqnLFX2w+bk+YGzd/ an5XtmHGtTCM5NyWRJYe9ftUmkBYNXmvBHX06tdd1SIElpvh3YverTe9gMyUW1tufHpX hBIP0mQbTybk0fhQuYPYwvgUyQoYmRL+Fpfd0SlRfvUnTtl8pLvIqB3TJQGEeYAdEtjf 2+B1NG7T2tBl0LNUa2HSlPM752Fw70fsSE4Bq7naPZPf8UrOSD8GVBm1s9rKHlLMvzwA 66mA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1758638728; x=1759243528; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=By9iTZQYVaW98aaM8/fCSAHAyxcTKcPpA3ibSeZs1YE=; b=TBwgLhUVMD1Z2ME+X5cxcytLdrN3V0DGM7L1oEpifMEUnk4seygqQgeAgixs1PnimO LRg0XCYknLAUIVhDqc6CZSfjka1uoHtr4RRFKkLBANybXqm2PZjYv/7MHR0rNT52CaKH BhtAtmhSIOV/CExObm8c87BLNzJJXb8lC2o7wFGQzwFVQ/tsdcaj38WukWEfEMbL136R wxMZ+s1trSNmjYwKCMdmA6JOuN6UDnRfVa8IFzsSmZ6m9cxPhLj8T612h6gEAz3o9V6W aFQmdVOZNLNHqn9v0SURTJMPA0tZP3KyAS+QYwmOUnmVd4/r5C02aDIb8TRv5PfqrfaN cyLQ== X-Forwarded-Encrypted: i=1; AJvYcCWlJWP2uH4IHG/mTLw2B0I5P3jdQXVj/weuzTpceoY2kmk3UAiO5Qohu74ZobUkRKpaQvxqr0/wr1M=@vger.kernel.org X-Gm-Message-State: AOJu0YxlKhIiHkB7lwI1dDiY9gTRaH5oT/pR+A2RIocvtmt74qmhRIk3 17Zrft7ufPs7MI9BJTQRKmNcJ03L3Wo1cmsB5OQQR/5BDysyA2xCq0Rv X-Gm-Gg: ASbGncugR56FUHTJh9kiTlIPHXB3O/8OYzBzjvtyynbjuB+OavCE6skbliBlHEXNDaH HRv4l+JixHLteL7teAmgSjwwct34LeS5a4sZXQ78EjKRa1q/Hxi2QIWcRpJwNFxWS4rRNMZLrJL 57av/l1dHxjZW+ZPW5LRck4sGfW78A1iwMh0SKdjyXE78NnJFp/UQAeScreVrBRGYqQorzz3lSo Wpecd3LeV8MtZ8ociVMQWDjl06tyhPPyuCxIOtI4U5W3/IbvBbMYXh5MnHWmKQIGMfFZqYcXXET tiqGIf0xFG3HP3XUi63a/JglwMtoykcSgovhUDQSmMEibBHsobziGv++a2dgB+bYARGodeRofF1 U4zaqmOgro0h6AQxIqQsGE+Qhbu2i0lXDhYdg7yjePGmW96VXkYSRcVkRN/tlsDfGbaJu4yB8L/ NYQQ== X-Google-Smtp-Source: AGHT+IGeaLZNcziJFwxEnB+ujLHDeNr3b8C5SkLS7nPKFj5AlRt42fsuSfQ2qfOOoel3vyehbrlVsA== X-Received: by 2002:a05:600c:c171:b0:46e:1abc:1811 with SMTP id 5b1f17b1804b1-46e1dadca3cmr28239555e9.27.1758638728217; Tue, 23 Sep 2025 07:45:28 -0700 (PDT) Received: from biju.lan (host86-139-30-37.range86-139.btcentralplus.com. [86.139.30.37]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-464f0aac3fdsm238940435e9.1.2025.09.23.07.45.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Sep 2025 07:45:27 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Geert Uytterhoeven , Magnus Damm Cc: Biju Das , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das , Tommaso Merciai Subject: [PATCH v3 2/8] pwm: rzg2l-gpt: Add info variable to struct rzg2l_gpt_chip Date: Tue, 23 Sep 2025 15:45:06 +0100 Message-ID: <20250923144524.191892-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250923144524.191892-1-biju.das.jz@bp.renesas.com> References: <20250923144524.191892-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-pwm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Biju Das RZ/G3E GPT IP is similar to the one found on RZ/G2L GPT, but there are some differences. The field width of prescalar on RZ/G3E is 4 whereas on RZ/G2L it is 3. Add rzg2l_gpt_info variable to handle this differences. The FIELD_PREP and FIELD_GET macro is giving compilation issue as the parameters are not build time constants. So added Non-constant mask variant of FIELD_GET() and FIELD_PREP(). Reviewed-by: Tommaso Merciai Signed-off-by: Biju Das --- v2->v3: * No change. v1->v2: * Collected tag. --- drivers/pwm/pwm-rzg2l-gpt.c | 33 ++++++++++++++++++++++++++++----- 1 file changed, 28 insertions(+), 5 deletions(-) diff --git a/drivers/pwm/pwm-rzg2l-gpt.c b/drivers/pwm/pwm-rzg2l-gpt.c index 392bd129574b..1d09fb01c72f 100644 --- a/drivers/pwm/pwm-rzg2l-gpt.c +++ b/drivers/pwm/pwm-rzg2l-gpt.c @@ -33,6 +33,19 @@ #include #include +/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ +#define field_get(_mask, _reg) \ +({\ + typeof(_mask) (mask) = (_mask); \ + (((_reg) & (mask)) >> (ffs(mask) - 1)); \ +}) + +#define field_prep(_mask, _val) \ +({\ + typeof(_mask) (mask) = (_mask); \ + (((_val) << (ffs(mask) - 1)) & (mask)); \ +}) + #define RZG2L_GET_CH(hwpwm) ((hwpwm) / 2) #define RZG2L_GET_CH_OFFS(ch) (0x100 * (ch)) @@ -46,7 +59,6 @@ #define RZG2L_GTCR_CST BIT(0) #define RZG2L_GTCR_MD GENMASK(18, 16) -#define RZG2L_GTCR_TPCS GENMASK(26, 24) #define RZG2L_GTCR_MD_SAW_WAVE_PWM_MODE FIELD_PREP(RZG2L_GTCR_MD, 0) @@ -77,9 +89,14 @@ #define RZG2L_MAX_SCALE_FACTOR 1024 #define RZG2L_MAX_TICKS ((u64)U32_MAX * RZG2L_MAX_SCALE_FACTOR) +struct rzg2l_gpt_info { + u32 gtcr_tpcs_mask; +}; + struct rzg2l_gpt_chip { void __iomem *mmio; struct mutex lock; /* lock to protect shared channel resources */ + const struct rzg2l_gpt_info *info; unsigned long rate_khz; u32 period_ticks[RZG2L_MAX_HW_CHANNELS]; u32 channel_request_count[RZG2L_MAX_HW_CHANNELS]; @@ -324,7 +341,7 @@ static int rzg2l_gpt_read_waveform(struct pwm_chip *chip, guard(mutex)(&rzg2l_gpt->lock); if (rzg2l_gpt_is_ch_enabled(rzg2l_gpt, pwm->hwpwm, >cr)) { - wfhw->prescale = FIELD_GET(RZG2L_GTCR_TPCS, gtcr); + wfhw->prescale = field_get(rzg2l_gpt->info->gtcr_tpcs_mask, gtcr); wfhw->gtpr = rzg2l_gpt_read(rzg2l_gpt, RZG2L_GTPR(ch)); wfhw->gtccr = rzg2l_gpt_read(rzg2l_gpt, RZG2L_GTCCR(ch, sub_ch)); if (wfhw->gtccr > wfhw->gtpr) @@ -364,8 +381,8 @@ static int rzg2l_gpt_write_waveform(struct pwm_chip *chip, rzg2l_gpt_write(rzg2l_gpt, RZG2L_GTUDDTYC(ch), RZG2L_GTUDDTYC_UP_COUNTING); /* Select count clock */ - rzg2l_gpt_modify(rzg2l_gpt, RZG2L_GTCR(ch), RZG2L_GTCR_TPCS, - FIELD_PREP(RZG2L_GTCR_TPCS, wfhw->prescale)); + rzg2l_gpt_modify(rzg2l_gpt, RZG2L_GTCR(ch), rzg2l_gpt->info->gtcr_tpcs_mask, + field_prep(rzg2l_gpt->info->gtcr_tpcs_mask, wfhw->prescale)); /* Set period */ rzg2l_gpt_write(rzg2l_gpt, RZG2L_GTPR(ch), wfhw->gtpr); @@ -430,6 +447,8 @@ static int rzg2l_gpt_probe(struct platform_device *pdev) if (IS_ERR(rzg2l_gpt->mmio)) return PTR_ERR(rzg2l_gpt->mmio); + rzg2l_gpt->info = of_device_get_match_data(dev); + rstc = devm_reset_control_get_exclusive_deasserted(dev, NULL); if (IS_ERR(rstc)) return dev_err_probe(dev, PTR_ERR(rstc), "Cannot deassert reset control\n"); @@ -472,8 +491,12 @@ static int rzg2l_gpt_probe(struct platform_device *pdev) return 0; } +static const struct rzg2l_gpt_info rzg2l_data = { + .gtcr_tpcs_mask = GENMASK(26, 24), +}; + static const struct of_device_id rzg2l_gpt_of_table[] = { - { .compatible = "renesas,rzg2l-gpt", }, + { .compatible = "renesas,rzg2l-gpt", .data = &rzg2l_data }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, rzg2l_gpt_of_table); From patchwork Tue Sep 23 14:45:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju X-Patchwork-Id: 2141045 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=AwUF5Wkz; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.199.223; helo=ny.mirrors.kernel.org; envelope-from=linux-pwm+bounces-7343-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org [147.75.199.223]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4cWNDw0hXfz1y2d for ; Wed, 24 Sep 2025 00:50:08 +1000 (AEST) Received: from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id E3F6C17C786 for ; Tue, 23 Sep 2025 14:45:47 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id AEB00258CF8; Tue, 23 Sep 2025 14:45:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="AwUF5Wkz" X-Original-To: linux-pwm@vger.kernel.org Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 481F9246766 for ; Tue, 23 Sep 2025 14:45:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758638733; cv=none; b=G77GMuWS1Kf68hCE810b6rD79twye1efg0tGy+ESBbk7lZrFFsmvr20uQuwLYLun5bHdn5t5SNKR3aq7IaudWoptLLD2dXtcTIBWSEFjjpxBSX+WTxvyep+nZijrZ4bfm6L/hvPfd0yENjhVepfgneW94dlOG+9g9U49EYWQA7s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758638733; c=relaxed/simple; bh=PzTUGS3rsi6YZUQn0pGItTVR2WZEHdiGxiZsu870EA4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PPp8nP8uHm2jMEDiVQdEhvQ/CIPWknZ4DkKx2RTARAegyTwZK3OftTl48b0+NHKm3L50AQTBkYz+s1qPebBpZF0fBEdoxjyiQgR5ZaZEPhdnEXHudTPcUDmRzaQbIxIbBRSXhgkW60J8yJ2VzPfchoEF/eK6W1QoZzLIoGidQvg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=AwUF5Wkz; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-45b9a856dc2so38804595e9.0 for ; Tue, 23 Sep 2025 07:45:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1758638729; x=1759243529; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4anwDx9v8HakV13d09macXf0BjQ85fB9OQZaHSABwj8=; b=AwUF5Wkz6XghTj5KI+h0SCDJbB7WQCUfkUyJIV2XSLgXo/Iu+z/20jfOF6r0zXqsx0 nl3W1gIXM2QJoJucqRyUplTBxVieVhDQIGv+yCgMoiDePMGustSd9+wK12ORx4jqNe/4 DDdszVstt3D38054YvKcBhkdCH/RA+EbXhMJoOuANTg6hJs0VAAmm02SV2PRVqkNltEJ UOm2jZN3hpq1QtSYYXJrBOHwTRPMOWIVFfWsH6bfpqjTmodsjPSJx8WKM/jhsV7MnYFS 2nB8Oyr5kXySerFfYLk9o9nSuUiSHDTH6xnOB4Z2hIlfURX/EaVZNTcVKr23pHIFlbda vSHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1758638729; x=1759243529; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4anwDx9v8HakV13d09macXf0BjQ85fB9OQZaHSABwj8=; b=PXIVTEnXfYFrSqyuptJvaQx3mrJfFdT+6wtA+2QyVa2+SBoOJhkl6SIsIRNHzGvmzK 8xtpNXDXYjIvyjmqYP7h6FWAM9wkuyEMAc3XfZFYdrXJUq+6BAWZk4++pf93b98nwkCt b5/2cJ8ps4or3pf7zp8P+aPPftRS1e/1khFQgBHkRbjJvdo33U4OGjeBgHFRmbunPvX1 HFOon6NV9Vt3u4zci+jyZzReEMsjS5jaPH9oo93nqEA/5retw5LI2LPBniCsxP4d8Fob vkdCk+R1oxfDVbuL+LQa5dnTFJuzFPmcbvG+JS9VwmmvPyggp7m8smkDM4gB603f/Ipa 44AQ== X-Forwarded-Encrypted: i=1; AJvYcCWSnPByMpXgQXsnYhyZ/PO+LXBuQ6hby3PVjJ+WOiF2TqGcB7fj9cXUNpLZSC7x8FaScQThI+jJmnY=@vger.kernel.org X-Gm-Message-State: AOJu0YzFeuGkk62uxm8sp4bxowBYf5iQgsqWoHMqPX1H5ZbxGHlalCiD 3uyA3I+t2oHsfPDmpU27M8afztiQLTtZybCfjTEyfAn62679ekVyGOeV X-Gm-Gg: ASbGncvF8GbBSOMl1UTYo5Yo2hPTK1wFZsryk0UYmvG47ADHdvbpPj/4cUV4AqgSgMX FuV1Mn+LWQWiJxVtGJWmeJn2LQuoIi6zuCD/Sn+1cqHw/H9zSQAYfr7sEze4WrzIQplQzrQJQyF 3WjTm7VgF3NNRjqYhF4ZE/QwjFzHpX9W97eCBHfKVCDCTCQfn3xBV885zC0xens1B/iY5+ewr8M 3o/pGK1G0yV7bTQqitnEdj4JiqS9m5qFRDwW8x7Tnv/g2xfY2QHq3uJRzFbrVZOHyfvN3SgAyjS GExq2l0VUusWCVCwND/Z0vVTdQfhwm8nq89LWzJa2z1bLUp0qeJHhcPXzAtw3mqLItlp/Mx6J5z WWlXWmMEKSzcyOp8hRV6JpY0g0tjtLpodOOVy4jhcv1/c1ZyeY3BpzD9z+KCBa0JFu+VA1QGCHf EzEA== X-Google-Smtp-Source: AGHT+IEoPP6mKCiiA6RwSLS+InzvMGsDizgIiADIxBNHLgXuqyF6vVEwKBgbDeUyQkGB/UlkMhrHkg== X-Received: by 2002:a05:600c:3152:b0:45b:7a93:f108 with SMTP id 5b1f17b1804b1-46e1d994a15mr31555955e9.3.1758638729239; Tue, 23 Sep 2025 07:45:29 -0700 (PDT) Received: from biju.lan (host86-139-30-37.range86-139.btcentralplus.com. [86.139.30.37]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-464f0aac3fdsm238940435e9.1.2025.09.23.07.45.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Sep 2025 07:45:28 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Geert Uytterhoeven , Magnus Damm Cc: Biju Das , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das , Tommaso Merciai Subject: [PATCH v3 3/8] pwm: rzg2l-gpt: Add prescale_pow_of_two_mult_factor variable to struct rzg2l_gpt_info Date: Tue, 23 Sep 2025 15:45:07 +0100 Message-ID: <20250923144524.191892-4-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250923144524.191892-1-biju.das.jz@bp.renesas.com> References: <20250923144524.191892-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-pwm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Biju Das RZ/G3E GPT IP has prescale factor power of 2 where as that of RZ/G2L is 4. Add prescale_pow_of_two_mult_factor variable to struct rzg2l_gpt_info for handling this difference. Reviewed-by: Tommaso Merciai Signed-off-by: Biju Das --- v2->v3: * No change. v1->v2: * Collected tag. --- drivers/pwm/pwm-rzg2l-gpt.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/pwm/pwm-rzg2l-gpt.c b/drivers/pwm/pwm-rzg2l-gpt.c index 1d09fb01c72f..d1baac37c771 100644 --- a/drivers/pwm/pwm-rzg2l-gpt.c +++ b/drivers/pwm/pwm-rzg2l-gpt.c @@ -91,6 +91,7 @@ struct rzg2l_gpt_info { u32 gtcr_tpcs_mask; + u8 prescale_pow_of_two_mult_factor; }; struct rzg2l_gpt_chip { @@ -229,6 +230,7 @@ static void rzg2l_gpt_disable(struct rzg2l_gpt_chip *rzg2l_gpt, static u64 rzg2l_gpt_calculate_period_or_duty(struct rzg2l_gpt_chip *rzg2l_gpt, u32 val, u8 prescale) { + const struct rzg2l_gpt_info *info = rzg2l_gpt->info; u64 tmp; /* @@ -238,15 +240,18 @@ static u64 rzg2l_gpt_calculate_period_or_duty(struct rzg2l_gpt_chip *rzg2l_gpt, * < 2^32 * 2^10 * 2^20 * = 2^62 */ - tmp = (u64)val << (2 * prescale); + tmp = (u64)val << (info->prescale_pow_of_two_mult_factor * prescale); tmp *= USEC_PER_SEC; return DIV64_U64_ROUND_UP(tmp, rzg2l_gpt->rate_khz); } -static u32 rzg2l_gpt_calculate_pv_or_dc(u64 period_or_duty_cycle, u8 prescale) +static u32 rzg2l_gpt_calculate_pv_or_dc(const struct rzg2l_gpt_info *info, + u64 period_or_duty_cycle, u8 prescale) { - return min_t(u64, DIV_ROUND_DOWN_ULL(period_or_duty_cycle, 1 << (2 * prescale)), + return min_t(u64, + DIV_ROUND_DOWN_ULL(period_or_duty_cycle, + 1 << (info->prescale_pow_of_two_mult_factor * prescale)), U32_MAX); } @@ -257,6 +262,7 @@ static int rzg2l_gpt_round_waveform_tohw(struct pwm_chip *chip, { struct rzg2l_gpt_chip *rzg2l_gpt = to_rzg2l_gpt_chip(chip); + const struct rzg2l_gpt_info *info = rzg2l_gpt->info; struct rzg2l_gpt_waveform *wfhw = _wfhw; bool is_small_second_period = false; u8 ch = RZG2L_GET_CH(pwm->hwpwm); @@ -291,7 +297,7 @@ static int rzg2l_gpt_round_waveform_tohw(struct pwm_chip *chip, } wfhw->prescale = rzg2l_gpt_calculate_prescale(rzg2l_gpt, period_ticks); - pv = rzg2l_gpt_calculate_pv_or_dc(period_ticks, wfhw->prescale); + pv = rzg2l_gpt_calculate_pv_or_dc(info, period_ticks, wfhw->prescale); wfhw->gtpr = pv; if (is_small_second_period) return 1; @@ -299,7 +305,7 @@ static int rzg2l_gpt_round_waveform_tohw(struct pwm_chip *chip, duty_ticks = mul_u64_u64_div_u64(wf->duty_length_ns, rzg2l_gpt->rate_khz, USEC_PER_SEC); if (duty_ticks > period_ticks) duty_ticks = period_ticks; - dc = rzg2l_gpt_calculate_pv_or_dc(duty_ticks, wfhw->prescale); + dc = rzg2l_gpt_calculate_pv_or_dc(info, duty_ticks, wfhw->prescale); wfhw->gtccr = dc; /* @@ -493,6 +499,7 @@ static int rzg2l_gpt_probe(struct platform_device *pdev) static const struct rzg2l_gpt_info rzg2l_data = { .gtcr_tpcs_mask = GENMASK(26, 24), + .prescale_pow_of_two_mult_factor = 2, }; static const struct of_device_id rzg2l_gpt_of_table[] = { From patchwork Tue Sep 23 14:45:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju X-Patchwork-Id: 2141044 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=FEQT7DYo; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.80.249; helo=am.mirrors.kernel.org; envelope-from=linux-pwm+bounces-7344-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [147.75.80.249]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4cWNDt1JLfz1y2d for ; Wed, 24 Sep 2025 00:50:06 +1000 (AEST) Received: from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 5F8C4188B4EC for ; Tue, 23 Sep 2025 14:46:15 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 79AAE25A357; Tue, 23 Sep 2025 14:45:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="FEQT7DYo" X-Original-To: linux-pwm@vger.kernel.org Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC77424679A for ; Tue, 23 Sep 2025 14:45:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758638734; cv=none; b=VYjKCGz7hldbUcvxOHR3BKSPipSLHYBMuIMHNV8UsbNLVldTmbafsUBcijm02VFSX8nbIt44xlO9QD9FzSfjVYQlHguDKN5NjmJmSd04HEiLBifih347X9c6sHJCHETkU3uVy6udqXKxiQi9MVjukmyw5ah+2mdACAAGLMeB4ME= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758638734; c=relaxed/simple; bh=BhWuoBkwSqw7NsnaFxyyeGWfpXdoxScAEzI75wSxdoo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=o6Z+EgbzaUBjrmoZqlr7bYHfV0C72L7kk5QWgbJh65zoNpsVaSgb3E2sBQwjwAB+q+fQld4SRssTUzr7/e4GLLTHiBRXa/R92zLY1LbTKn2TxorrYGudpEtrNaDc5HAiVt5f5zkTPjDvwukEavbAHKl58u5uKzre8Rh4P0W0aqw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=FEQT7DYo; arc=none smtp.client-ip=209.85.128.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-46db5bb2e9dso11294795e9.1 for ; Tue, 23 Sep 2025 07:45:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1758638730; x=1759243530; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nZ1YIkKOG5ZcKxrbiXISvB8CTGBUs6wL4teYcebD1Q4=; b=FEQT7DYo2hX02tuLV5h9xVUq8L8/PTrNHeHKOao3zglT9cFp7OdON9cerOzn74Tz4L wMkKfzBxmkYGrSF8ZJniLluh2Eex33Tol/Qp1uHHO43oGX2/B+owFsyC/5znuntrSQFI Mg1PfoFHNWs+xuWXTNpfxs+s0jqydcU73fR2xxjM8bCwaUc2ouWuSR1YpT/CeA8/Yy5L OACGw0kTxn56QbLAA1WhwiK37IIpapXHz75I2jbfndtRksxvu3LdqKxsSqpLDZoybfJ9 KMA2Vd3YBpfsVIa8VCrHDt2RSkriAEIcl4BGIOUG7J7E9/y+bWrbhmD0Ih6x9vxVBCsA MwMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1758638730; x=1759243530; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nZ1YIkKOG5ZcKxrbiXISvB8CTGBUs6wL4teYcebD1Q4=; b=JZFIbhVD8Vq8x+axL2L3i8JJd+2zNjPwOTHSinH9MvLQ8JK7U0FmKce87mPhXd2CTr zkQhoG8WADalRZrtQRjdNhUqsZeIrfgewHuvqSJx9MAL6NLNFbDrcKyt8FBEN/tVuFUn sv9+gyPa4t+MJg9SGirt3gciAG98J9dbgZHBNdy/q+J8G08liaJvt8WexZ7XT/EO2RgV tH/OFwK7FLTbRSMzuCnYcP0RLqfWb8s1g1kbc2AnsTOV+mybBXUH/PDYVEEDYWOeA6Ku PRrXjzHKXLwn8Qq23kDc7IH3jS1JZzyi/0JkjmIP26TRHBly/AJxIJ8JEMDoYQ9c7sIM zbKQ== X-Forwarded-Encrypted: i=1; AJvYcCVK4QyZkzJwziC3/h1kRGW9ZQkzLd7pVO+pu7aPXvjdf4Ve8EZF/juK1Xgj1hYFeFl7VKfoc7xWlow=@vger.kernel.org X-Gm-Message-State: AOJu0Yy1EKGNvuNNrwaSNHzQxlZE7hYcVuRGeNt7nAGKm4QKAj0hjC19 H5lLf62TSjVjbCHRB0O45idU3tdgpU6bP93e6YeQBoOtctumpy0aHJ5E X-Gm-Gg: ASbGncu8U+gijr2yipaEyd8NaCb63EnttmV5qdS95PkaPLOaTkafmsU+k2jjvS6JHo3 7SqgI875ZYHn2t2urV2yiLHOScvdg1xVK7fTLrPFw7+fgV8AZ2uzadIuJBTae3q4TWtg33Ln/rX sr1JIsXTcl4VGjlqkvJJgfbREWGDCazvWLc9g5r53fFk8hLqlGkfFghlxLvB8f/ECA58Rxr7bqf HmOCrvOG4g5UxhGxFWEUoc5a0lxWTgZ4/QgPhZ/xQ+x7ckjI0URwrkAm/4jmKidtOo85ZV7/Tjt kTWKPoFT1dTzcjl6dVMx4FKX5J/Vj5s7wjK/XJy8eyBzCGyxHWZjuHVkoRwVy2e2NKv5EP4F4I9 iP3/bz7arBwsU1kbtaHrES2CcenjO9rpmJcfUsbCB+PIMSbSv+stlQ+Mcp5fQgoIebI194YLQja QKVQ== X-Google-Smtp-Source: AGHT+IGulPwH5fOVINKa0rDW3oB4wGGljY9HIdmcQhZBQGeWIV8NPJpIlAmFtXu7jcdUNxVdFZrEVQ== X-Received: by 2002:a05:6000:2203:b0:3ee:11d1:2a1e with SMTP id ffacd0b85a97d-405cb2f1435mr2813593f8f.10.1758638729848; Tue, 23 Sep 2025 07:45:29 -0700 (PDT) Received: from biju.lan (host86-139-30-37.range86-139.btcentralplus.com. [86.139.30.37]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-464f0aac3fdsm238940435e9.1.2025.09.23.07.45.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Sep 2025 07:45:29 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Geert Uytterhoeven , Magnus Damm Cc: Biju Das , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das , Tommaso Merciai Subject: [PATCH v3 4/8] pwm: rzg2l-gpt: Add calculate_prescale() callback to struct rzg2l_gpt_info Date: Tue, 23 Sep 2025 15:45:08 +0100 Message-ID: <20250923144524.191892-5-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250923144524.191892-1-biju.das.jz@bp.renesas.com> References: <20250923144524.191892-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-pwm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Biju Das RZ/G2L GPT the prescale factors are continuous power of 4 whereas on RZ/G3E it is power of 2 but discontinuous. Add calculate_prescale() callback to struct rzg2l_gpt_info for handling this difference. Reviewed-by: Tommaso Merciai Signed-off-by: Biju Das --- v2->v3: * No change. v1->v2: * Collected tag. --- drivers/pwm/pwm-rzg2l-gpt.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/pwm/pwm-rzg2l-gpt.c b/drivers/pwm/pwm-rzg2l-gpt.c index d1baac37c771..0af3aaf1917a 100644 --- a/drivers/pwm/pwm-rzg2l-gpt.c +++ b/drivers/pwm/pwm-rzg2l-gpt.c @@ -90,6 +90,7 @@ #define RZG2L_MAX_TICKS ((u64)U32_MAX * RZG2L_MAX_SCALE_FACTOR) struct rzg2l_gpt_info { + u8 (*calculate_prescale)(u64 period); u32 gtcr_tpcs_mask; u8 prescale_pow_of_two_mult_factor; }; @@ -138,8 +139,7 @@ static void rzg2l_gpt_modify(struct rzg2l_gpt_chip *rzg2l_gpt, u32 reg, u32 clr, (rzg2l_gpt_read(rzg2l_gpt, reg) & ~clr) | set); } -static u8 rzg2l_gpt_calculate_prescale(struct rzg2l_gpt_chip *rzg2l_gpt, - u64 period_ticks) +static u8 rzg2l_gpt_calculate_prescale(u64 period_ticks) { u32 prescaled_period_ticks; u8 prescale; @@ -296,7 +296,7 @@ static int rzg2l_gpt_round_waveform_tohw(struct pwm_chip *chip, period_ticks = rzg2l_gpt->period_ticks[ch]; } - wfhw->prescale = rzg2l_gpt_calculate_prescale(rzg2l_gpt, period_ticks); + wfhw->prescale = info->calculate_prescale(period_ticks); pv = rzg2l_gpt_calculate_pv_or_dc(info, period_ticks, wfhw->prescale); wfhw->gtpr = pv; if (is_small_second_period) @@ -498,6 +498,7 @@ static int rzg2l_gpt_probe(struct platform_device *pdev) } static const struct rzg2l_gpt_info rzg2l_data = { + .calculate_prescale = rzg2l_gpt_calculate_prescale, .gtcr_tpcs_mask = GENMASK(26, 24), .prescale_pow_of_two_mult_factor = 2, }; From patchwork Tue Sep 23 14:45:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju X-Patchwork-Id: 2141046 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=UOrjEdl9; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:4601:e00::3; helo=am.mirrors.kernel.org; envelope-from=linux-pwm+bounces-7345-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [IPv6:2604:1380:4601:e00::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4cWNF35kVlz1yCp for ; Wed, 24 Sep 2025 00:50:15 +1000 (AEST) Received: from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 91689188BF70 for ; Tue, 23 Sep 2025 14:46:18 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C7F6C25B69F; Tue, 23 Sep 2025 14:45:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="UOrjEdl9" X-Original-To: linux-pwm@vger.kernel.org Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E231248F58 for ; Tue, 23 Sep 2025 14:45:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758638734; cv=none; b=NZZGOtuWiIw6TA+nxn1Yy84HBZMC1tXBFCmHZPEdpEvozPQNRr2gcl7/golZAhwm5zDZDJsSUq+QqpFEm784rZv/1IGaDjj8Cpa0D+PmM67h6JA8qrO10uoxB1YkLV13Tl8xovIh755xo0YGo3xyQfPXKzKzqSg8k5a1q7YLKEo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758638734; c=relaxed/simple; bh=9KLJ4BwtbpJm/9b4WxuSUtjekeadp6ZfsZa6/vsycek=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kDmjeERsl6rY5CAs63R9sE5Izk3C9ZJy+sCw81Mdvxs+NRjaUpqT79RQt/MovSzVzo6E6Z0HEmn2EAqDqFOvGKhAHzfKFRTnq5D1jRlnoPrH0VOar/Ixo30s+oCfIjP4zzhUaEXsESDypXkhF0YziaDDo/BY+f9m26Y3jVPIv0o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=UOrjEdl9; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-46b7bf21fceso28013175e9.3 for ; Tue, 23 Sep 2025 07:45:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1758638730; x=1759243530; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iJzzrWzUCil64+RXOrKpLt8hJS1/JsUfq3sdCZB4Iv8=; b=UOrjEdl9MFT2vIinolk9C2fNfVlEjjKV7oPzOEaofVrCEaCssC5nkdzit14konTK1j GXTskkJ37uFUwkwNW0bVB8cBrUCmhE+qy8b3DJkOmhXNLigCAn7hjbRruXsFwuwwxUSV ehNAIwWuOvc25j2RZdlp3drm30XaT6+e8i2QKOwCP53pDauF/xxPm0iGSvvC7YgbdpzV vYNLYiaCzL/YBJ+P4an8Uewxc+okqdwo3fwCuYWwQDkz6GZXl0HxcrlARp1LyfStu9qE MAat8SNwfBGy2+dRafzJ560Rorhxi9lH843QTDRjFz3vf6bWyRpQCw7mWLSdgTZuhRW4 duKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1758638730; x=1759243530; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iJzzrWzUCil64+RXOrKpLt8hJS1/JsUfq3sdCZB4Iv8=; b=ai417AUCeAEYxvHkcTZLoKntzxfIilo0r7/h20uHwgBsTdE8q5e8/YPkUVnfOT906a vAbZb8cdMQ0/nchmEQiYzTJyDammUWkTBW2T04KGrABK37byEBvJ2Nh6efEQOTYp8V1Q uv8rJE2mHSfA2ZIFBZcJtO8N5SoAZel5YqnJw0Ltc6eg7iIJ1scsZG2PDMBoDSdEA4cE T7RZQ2OP972n9q5Mc+8yuwzFUSmDnLTZvvcfd85g/SC38gj+MVojf79qx7KrcZN0PE2w B6veXB2tL4t1tzxRsDK0cneOVSCPdEM9gJ2zYAmJO9AUDs+DwadD8NLhOS+eJaOOMKjh O1Ug== X-Forwarded-Encrypted: i=1; AJvYcCUwxYr4afhz0fZUU9z2qcInxivRuqpim4p7MVCmoS3pwKYslUC1QlHnrK3lX/auG6KGBjwoCvmj1A0=@vger.kernel.org X-Gm-Message-State: AOJu0YzlNEqMGl6+x3hJNNG8NqtNTmoANob857chYeK2XRxfZROocifC TP0IJ+ExwDSvTh1cBa4prudmZzFNWgfR96dpGr1S6krc864gJYCUDeDz X-Gm-Gg: ASbGnctd/IXQhIDT81SPpH47tClI2RoA3/5L1CXccnzaPbKJr+o5M46nFSQ0pH/Ub2K RKyUoNVdNlQ1O9z+XtwXv7S0M2TBYNHQthXoexaLcljiaTvMJT2kbIUnp0q6b9CNzstO0fq5mqG W2U1dvkcsNLKZxAv2gW+sNsbQaUS3GoGhA3hg3SGVlq/QaojPz74fxvjTWTt9RnHUEnEd76yIdl THgQZMEBnzHWpzHvEftYMjxEsswfxEHC80xAoK7/VDjlYFclGL4mCVkabUtq+v++1YVZLQQglWD 8UAUPJ4lKytGa4XfP5UXu6LzfL3bNqiHM7YuPabZIv6IidyrcGIdQuMUpk1Ipl4hSv7fABk7xOK WdGBpAoFYAzvkKiU6dh4PFU21fjNOuQOfORcuhOQPQmet+nygAip6JZukUBqhebVaFZuPg4essO bERA== X-Google-Smtp-Source: AGHT+IF8SaV47gPXwoIWR6PYZsGf9RNwLPvhOV3otS7XPoc5em+Mo1XsY9TmdJAjeAKHts9TAgBzRw== X-Received: by 2002:a05:600c:154e:b0:45f:29e4:92fc with SMTP id 5b1f17b1804b1-46e1daacd4emr26901375e9.20.1758638730444; Tue, 23 Sep 2025 07:45:30 -0700 (PDT) Received: from biju.lan (host86-139-30-37.range86-139.btcentralplus.com. [86.139.30.37]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-464f0aac3fdsm238940435e9.1.2025.09.23.07.45.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Sep 2025 07:45:30 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Geert Uytterhoeven , Magnus Damm Cc: Biju Das , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das , Tommaso Merciai Subject: [PATCH v3 5/8] pwm: rzg2l-gpt: Add RZ/G3E support Date: Tue, 23 Sep 2025 15:45:09 +0100 Message-ID: <20250923144524.191892-6-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250923144524.191892-1-biju.das.jz@bp.renesas.com> References: <20250923144524.191892-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-pwm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Biju Das Add RZ/G3E GPT support. It has multiple clocks and resets compared to RZ/G2L. Also prescale field width and factor for calculating prescale are different. Reviewed-by: Tommaso Merciai Signed-off-by: Biju Das --- v2->v3: * No change. v1->v2: * Added link to hardware manual * Updated limitation section * Collected tag --- drivers/pwm/pwm-rzg2l-gpt.c | 46 +++++++++++++++++++++++++++++++++++-- 1 file changed, 44 insertions(+), 2 deletions(-) diff --git a/drivers/pwm/pwm-rzg2l-gpt.c b/drivers/pwm/pwm-rzg2l-gpt.c index 0af3aaf1917a..087bc3c0778c 100644 --- a/drivers/pwm/pwm-rzg2l-gpt.c +++ b/drivers/pwm/pwm-rzg2l-gpt.c @@ -6,15 +6,21 @@ * * Hardware manual for this IP can be found here * https://www.renesas.com/eu/en/document/mah/rzg2l-group-rzg2lc-group-users-manual-hardware-0?language=en + * https://www.renesas.com/en/document/mah/rzg3e-group-users-manual-hardware * * Limitations: * - Counter must be stopped before modifying Mode and Prescaler. * - When PWM is disabled, the output is driven to inactive. * - While the hardware supports both polarities, the driver (for now) * only handles normal polarity. - * - General PWM Timer (GPT) has 8 HW channels for PWM operations and - * each HW channel have 2 IOs. + * - For RZ/G2L, the General PWM Timer (GPT) has 8 HW channels for PWM + operations and each HW channel have 2 IOs (GTIOCn{A, B}). * - Each IO is modelled as an independent PWM channel. + * - For RZ/G3E, the General PWM Timer (GPT) has 16 HW channels for PWM + operations (GPT0: 8 channels, GPT1: 8 Channels) and each HW channel + have 4 IOs (GTIOCn{A,AN,B,BN}). The 2 extra IOs GTIOCnAN and GTIOCnBN + in RZ/G3E are anti-phase signals of GTIOCnA and GTIOCnB. The + anti-phase signals of RZ/G3E are not modelled as PWM channel. * - When both channels are used, disabling the channel on one stops the * other. * - When both channels are used, the period of both IOs in the HW channel @@ -153,6 +159,27 @@ static u8 rzg2l_gpt_calculate_prescale(u64 period_ticks) return prescale; } +static u8 rzg3e_gpt_calculate_prescale(u64 period_ticks) +{ + u32 prescaled_period_ticks; + u8 prescale; + + prescaled_period_ticks = period_ticks >> 32; + if (prescaled_period_ticks >= 64 && prescaled_period_ticks < 256) { + prescale = 6; + } else if (prescaled_period_ticks >= 256 && prescaled_period_ticks < 1024) { + prescale = 8; + } else if (prescaled_period_ticks >= 1024) { + prescale = 10; + } else { + prescale = fls(prescaled_period_ticks); + if (prescale > 1) + prescale -= 1; + } + + return prescale; +} + static int rzg2l_gpt_request(struct pwm_chip *chip, struct pwm_device *pwm) { struct rzg2l_gpt_chip *rzg2l_gpt = to_rzg2l_gpt_chip(chip); @@ -459,6 +486,14 @@ static int rzg2l_gpt_probe(struct platform_device *pdev) if (IS_ERR(rstc)) return dev_err_probe(dev, PTR_ERR(rstc), "Cannot deassert reset control\n"); + rstc = devm_reset_control_get_optional_exclusive_deasserted(dev, "rst_s"); + if (IS_ERR(rstc)) + return dev_err_probe(dev, PTR_ERR(rstc), "Cannot deassert rst_s reset\n"); + + clk = devm_clk_get_optional_enabled(dev, "bus"); + if (IS_ERR(clk)) + return dev_err_probe(dev, PTR_ERR(clk), "Cannot get bus clock\n"); + clk = devm_clk_get_enabled(dev, NULL); if (IS_ERR(clk)) return dev_err_probe(dev, PTR_ERR(clk), "Cannot get clock\n"); @@ -497,6 +532,12 @@ static int rzg2l_gpt_probe(struct platform_device *pdev) return 0; } +static const struct rzg2l_gpt_info rzg3e_data = { + .calculate_prescale = rzg3e_gpt_calculate_prescale, + .gtcr_tpcs_mask = GENMASK(26, 23), + .prescale_pow_of_two_mult_factor = 1, +}; + static const struct rzg2l_gpt_info rzg2l_data = { .calculate_prescale = rzg2l_gpt_calculate_prescale, .gtcr_tpcs_mask = GENMASK(26, 24), @@ -504,6 +545,7 @@ static const struct rzg2l_gpt_info rzg2l_data = { }; static const struct of_device_id rzg2l_gpt_of_table[] = { + { .compatible = "renesas,r9a09g047-gpt", .data = &rzg3e_data }, { .compatible = "renesas,rzg2l-gpt", .data = &rzg2l_data }, { /* Sentinel */ } }; From patchwork Tue Sep 23 14:45:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju X-Patchwork-Id: 2141048 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=ij+NF/sf; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45e3:2400::1; helo=sv.mirrors.kernel.org; envelope-from=linux-pwm+bounces-7346-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org [IPv6:2604:1380:45e3:2400::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4cWNGN4mW0z1yCp for ; Wed, 24 Sep 2025 00:51:24 +1000 (AEST) Received: from smtp.subspace.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id E0CE03AE4CA for ; Tue, 23 Sep 2025 14:46:00 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 62B8125FA1D; Tue, 23 Sep 2025 14:45:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ij+NF/sf" X-Original-To: linux-pwm@vger.kernel.org Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6A172417D9 for ; Tue, 23 Sep 2025 14:45:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758638735; cv=none; b=J6pZAsLV8HDV9xLbt9cHJNtKYqxO8jgbcdfo4Amp4Jy9fOp3BKGkXTbyXO39oCL/B9A+tQR5kfIuXwyoqCQ2EVAOYkaJDAyWAj5Pmx//XV1hsViNTEEjOIU6lvF9g1+URIhy/rz1Te2XlyKLpIfO2AGrvDkBarcV8xFhKENBxvI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758638735; c=relaxed/simple; bh=OjsLrF0BpyixmbNmZqRDeZM8/Q9vuOqtCut1I2w6tGk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ajwSVTA6E71nOl7EMEdvURFd46MJxMXznVo4CvcCaE9FLhBv8hFmfiQa0HofkHyDpZv3k/1c9WrS9FF+wiNO1Fzi1n+oCb3sKzkA3XeO/Zszg1S3yVQY7jYr7McfnvJ/z7v5gUTNebc8NIateWJsKDO77oHgY2/38w7SXFfXLdw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ij+NF/sf; arc=none smtp.client-ip=209.85.128.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-468973c184bso23424985e9.3 for ; Tue, 23 Sep 2025 07:45:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1758638731; x=1759243531; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lPc1khGgtKoM3FlGkfqU+I3xy6hkWBPtPzJJrRqEf2k=; b=ij+NF/sfiWk+1ENFruXrQ4KJ+jnBN03VRNgTXIMFy/ZU631B99ithKyI4JJxy4SZIS XpVYQzQwzle/VEceSbLb8br9OdVh+7boYfCgapNaLysQLcUJkk29g3S6cZo1ZdhAoYoT yaSnG4BxqLNHoIKgjaP05sYrfQRE3Y9/oWJCjcwriZSzldtZe7k1PIUjQxIhG+RK/opW QrVBBAih3nSgVUCFalIvsTQebfOfao6h0EwBM0tyPjLue9k6TLuf9v8b+aT4uKzcrCgS vHXcGk+t5uaOkbyBQlpDhA6HoxYUWFLe7IplM6uZV/fFmjhxkAqrDI4OWWkUJwDxJEAz 5wwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1758638731; x=1759243531; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lPc1khGgtKoM3FlGkfqU+I3xy6hkWBPtPzJJrRqEf2k=; b=O2lRqSaewWq9nZ5wrk2I+4Rf328Q1+2MoyV7hVZ3qw/O7SAAFt+nLz4tV3NDWxwIz6 o5Nj/Ri+elPGAr8oZMet6YVS0tQQZXgobkuNBruoKfDULj6mmhPq0b6XvESDjmrUjVrq gcnLArgavW5DgdDu4NjVVMOcV+ib0tCaUra1no7LlDTAAW5AfyQJtutT2Qkau2YPHio+ Ztyj4jkMmfAjb1Iwj+GRkB4X3cV7WdOAGBze2LXbNzm6h7pziaH75nv/OJIFAvK9lkHo B6WyBP6tgzUe1oGhQN9V00Ohr+9urXKYzQc2+lsmiMeKTb6pUSTGIRVfYZDozjTy+Yzd BPDw== X-Forwarded-Encrypted: i=1; AJvYcCWRbOjZJfw9KKK/eE5x+oDcg8/p8gAKrX4MjTEPeWob3mSIpPw44eoVUjj+4LJGGX8MmT8MxaUB8tY=@vger.kernel.org X-Gm-Message-State: AOJu0Yz/BhLTvrZzcgW+2vwPp+YSBwRGkUO8pc8h4R2yJL4MR7SPUGSv pjmCHUOf0gNXuvfl/vWZiGW3WcM/TH2rp1I+8Qndrpz77/gq9EUvXiHn X-Gm-Gg: ASbGncs5nZAeh+qmuIeriQhzLvp03QHAHKZoA1JmKgK8AD57ic6/8qrwedfTHvFtUSU 1nBGK3gveEUpaqU4E7IDjefBniVJUBr3HogXJqPjY81dSJxz2vVNh6KnXyTTH2wxwoEzX1stTYA 0gBPIbJLlxjD6bUTMaUQAE7B+929nbeJ2w7ZHcZSS5INZ07OcPhbmNihfM3ZRyer75OYJQWABUg 7MxUrE1llCtzKbiNa2laohQ8V9n3sDsrQDeT14SC0s7K1s5Gv5HfCAlk7nVEe/+0CwLqXmSWK3c SYnILHyhcKwT6VURBaBvz1kLZLbZkYkt/CpnzblWuAPeDNBCLKISG/cRStD486XX+arirgRFPgG Xljh/hvF60QrK5/MtMEpHNTjFD7F21HD5HCdNe806UdOoXgGaeSz2v62Hln/CnaYUixPDXoJN+6 y3UQ== X-Google-Smtp-Source: AGHT+IHw/moOQQdjQkyrnN2ABVgFGjJsARhjpZqCkhFnEqOLp4++U1HM/kmTdYY+jb+YZL8vgz1o9g== X-Received: by 2002:a05:600c:8b0d:b0:46e:2330:e959 with SMTP id 5b1f17b1804b1-46e2330ea71mr14864405e9.37.1758638730981; Tue, 23 Sep 2025 07:45:30 -0700 (PDT) Received: from biju.lan (host86-139-30-37.range86-139.btcentralplus.com. [86.139.30.37]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-464f0aac3fdsm238940435e9.1.2025.09.23.07.45.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Sep 2025 07:45:30 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Philipp Zabel Cc: Biju Das , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven , Prabhakar Mahadev Lad , Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH v3 6/8] pwm: rzg2l-gpt: Add suspend/resume support Date: Tue, 23 Sep 2025 15:45:10 +0100 Message-ID: <20250923144524.191892-7-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250923144524.191892-1-biju.das.jz@bp.renesas.com> References: <20250923144524.191892-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-pwm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Biju Das On RZ/G3E using PSCI, s2ram powers down the SoC. Add suspend/resume callbacks for save/restore GPT context. Signed-off-by: Biju Das --- v3: * New patch. --- drivers/pwm/pwm-rzg2l-gpt.c | 118 +++++++++++++++++++++++++++++++----- 1 file changed, 102 insertions(+), 16 deletions(-) diff --git a/drivers/pwm/pwm-rzg2l-gpt.c b/drivers/pwm/pwm-rzg2l-gpt.c index 087bc3c0778c..abf8dae52b91 100644 --- a/drivers/pwm/pwm-rzg2l-gpt.c +++ b/drivers/pwm/pwm-rzg2l-gpt.c @@ -101,14 +101,26 @@ struct rzg2l_gpt_info { u8 prescale_pow_of_two_mult_factor; }; +struct rzg2l_gpt_cache { + u32 gtpr; + u32 gtccr[2]; + u32 gtcr; + u32 gtior; +}; + struct rzg2l_gpt_chip { void __iomem *mmio; struct mutex lock; /* lock to protect shared channel resources */ const struct rzg2l_gpt_info *info; + struct clk *clk; + struct clk *bus_clk; + struct reset_control *rst; + struct reset_control *rst_s; unsigned long rate_khz; u32 period_ticks[RZG2L_MAX_HW_CHANNELS]; u32 channel_request_count[RZG2L_MAX_HW_CHANNELS]; u32 channel_enable_count[RZG2L_MAX_HW_CHANNELS]; + struct rzg2l_gpt_cache hw_cache[RZG2L_MAX_HW_CHANNELS]; }; /* This represents a hardware configuration for one channel */ @@ -465,10 +477,8 @@ static int rzg2l_gpt_probe(struct platform_device *pdev) { struct rzg2l_gpt_chip *rzg2l_gpt; struct device *dev = &pdev->dev; - struct reset_control *rstc; struct pwm_chip *chip; unsigned long rate; - struct clk *clk; int ret; chip = devm_pwmchip_alloc(dev, RZG2L_MAX_PWM_CHANNELS, sizeof(*rzg2l_gpt)); @@ -482,27 +492,29 @@ static int rzg2l_gpt_probe(struct platform_device *pdev) rzg2l_gpt->info = of_device_get_match_data(dev); - rstc = devm_reset_control_get_exclusive_deasserted(dev, NULL); - if (IS_ERR(rstc)) - return dev_err_probe(dev, PTR_ERR(rstc), "Cannot deassert reset control\n"); + rzg2l_gpt->rst = devm_reset_control_get_exclusive_deasserted(dev, NULL); + if (IS_ERR(rzg2l_gpt->rst)) + return dev_err_probe(dev, PTR_ERR(rzg2l_gpt->rst), + "Cannot deassert reset control\n"); - rstc = devm_reset_control_get_optional_exclusive_deasserted(dev, "rst_s"); - if (IS_ERR(rstc)) - return dev_err_probe(dev, PTR_ERR(rstc), "Cannot deassert rst_s reset\n"); + rzg2l_gpt->rst_s = devm_reset_control_get_optional_exclusive_deasserted(dev, "rst_s"); + if (IS_ERR(rzg2l_gpt->rst_s)) + return dev_err_probe(dev, PTR_ERR(rzg2l_gpt->rst_s), + "Cannot deassert rst_s reset\n"); - clk = devm_clk_get_optional_enabled(dev, "bus"); - if (IS_ERR(clk)) - return dev_err_probe(dev, PTR_ERR(clk), "Cannot get bus clock\n"); + rzg2l_gpt->bus_clk = devm_clk_get_optional_enabled(dev, "bus"); + if (IS_ERR(rzg2l_gpt->bus_clk)) + return dev_err_probe(dev, PTR_ERR(rzg2l_gpt->bus_clk), "Cannot get bus clock\n"); - clk = devm_clk_get_enabled(dev, NULL); - if (IS_ERR(clk)) - return dev_err_probe(dev, PTR_ERR(clk), "Cannot get clock\n"); + rzg2l_gpt->clk = devm_clk_get_enabled(dev, NULL); + if (IS_ERR(rzg2l_gpt->clk)) + return dev_err_probe(dev, PTR_ERR(rzg2l_gpt->clk), "Cannot get clock\n"); - ret = devm_clk_rate_exclusive_get(dev, clk); + ret = devm_clk_rate_exclusive_get(dev, rzg2l_gpt->clk); if (ret) return ret; - rate = clk_get_rate(clk); + rate = clk_get_rate(rzg2l_gpt->clk); if (!rate) return dev_err_probe(dev, -EINVAL, "The gpt clk rate is 0"); @@ -529,9 +541,80 @@ static int rzg2l_gpt_probe(struct platform_device *pdev) if (ret) return dev_err_probe(dev, ret, "Failed to add PWM chip\n"); + platform_set_drvdata(pdev, chip); + return 0; } +static int rzg2l_gpt_suspend(struct device *dev) +{ + struct pwm_chip *chip = dev_get_drvdata(dev); + struct rzg2l_gpt_chip *rzg2l_gpt = to_rzg2l_gpt_chip(chip); + unsigned int i; + + for (i = 0; i < RZG2L_MAX_HW_CHANNELS; i++) { + if (!rzg2l_gpt->channel_enable_count[i]) + continue; + + rzg2l_gpt->hw_cache[i].gtpr = rzg2l_gpt_read(rzg2l_gpt, RZG2L_GTPR(i)); + rzg2l_gpt->hw_cache[i].gtccr[0] = rzg2l_gpt_read(rzg2l_gpt, RZG2L_GTCCR(i, 0)); + rzg2l_gpt->hw_cache[i].gtccr[1] = rzg2l_gpt_read(rzg2l_gpt, RZG2L_GTCCR(i, 1)); + rzg2l_gpt->hw_cache[i].gtcr = rzg2l_gpt_read(rzg2l_gpt, RZG2L_GTCR(i)); + rzg2l_gpt->hw_cache[i].gtior = rzg2l_gpt_read(rzg2l_gpt, RZG2L_GTIOR(i)); + } + + clk_disable_unprepare(rzg2l_gpt->clk); + clk_disable_unprepare(rzg2l_gpt->bus_clk); + reset_control_assert(rzg2l_gpt->rst_s); + reset_control_assert(rzg2l_gpt->rst); + + return 0; +} + +static int rzg2l_gpt_resume(struct device *dev) +{ + struct pwm_chip *chip = dev_get_drvdata(dev); + struct rzg2l_gpt_chip *rzg2l_gpt = to_rzg2l_gpt_chip(chip); + unsigned int i; + int ret; + + ret = reset_control_deassert(rzg2l_gpt->rst); + if (ret) + return ret; + + ret = reset_control_deassert(rzg2l_gpt->rst_s); + if (ret) + goto fail_reset; + + ret = clk_prepare_enable(rzg2l_gpt->bus_clk); + if (ret) + goto fail_reset_all; + + ret = clk_prepare_enable(rzg2l_gpt->clk); + if (ret) + goto fail_bus_clk; + + for (i = 0; i < RZG2L_MAX_HW_CHANNELS; i++) { + if (!rzg2l_gpt->channel_enable_count[i]) + continue; + + rzg2l_gpt_write(rzg2l_gpt, RZG2L_GTPR(i), rzg2l_gpt->hw_cache[i].gtpr); + rzg2l_gpt_write(rzg2l_gpt, RZG2L_GTCCR(i, 0), rzg2l_gpt->hw_cache[i].gtccr[0]); + rzg2l_gpt_write(rzg2l_gpt, RZG2L_GTCCR(i, 1), rzg2l_gpt->hw_cache[i].gtccr[1]); + rzg2l_gpt_write(rzg2l_gpt, RZG2L_GTCR(i), rzg2l_gpt->hw_cache[i].gtcr); + rzg2l_gpt_write(rzg2l_gpt, RZG2L_GTIOR(i), rzg2l_gpt->hw_cache[i].gtior); + } + + return 0; +fail_bus_clk: + clk_disable_unprepare(rzg2l_gpt->bus_clk); +fail_reset_all: + reset_control_assert(rzg2l_gpt->rst_s); +fail_reset: + reset_control_assert(rzg2l_gpt->rst); + return ret; +} + static const struct rzg2l_gpt_info rzg3e_data = { .calculate_prescale = rzg3e_gpt_calculate_prescale, .gtcr_tpcs_mask = GENMASK(26, 23), @@ -551,10 +634,13 @@ static const struct of_device_id rzg2l_gpt_of_table[] = { }; MODULE_DEVICE_TABLE(of, rzg2l_gpt_of_table); +static DEFINE_SIMPLE_DEV_PM_OPS(rzg2l_gpt_pm_ops, rzg2l_gpt_suspend, rzg2l_gpt_resume); + static struct platform_driver rzg2l_gpt_driver = { .driver = { .name = "pwm-rzg2l-gpt", .of_match_table = rzg2l_gpt_of_table, + .pm = pm_sleep_ptr(&rzg2l_gpt_pm_ops), }, .probe = rzg2l_gpt_probe, };