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Mon, 28 Apr 2025 09:13:00 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 28 Apr 2025 09:13:00 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 28 Apr 2025 09:13:00 -0500 Received: from localhost (dhcp-172-24-227-250.dhcp.ti.com [172.24.227.250]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53SECx0A044545; Mon, 28 Apr 2025 09:13:00 -0500 From: Anshul Dalal To: CC: Anshul Dalal , , , , , , Subject: [PATCH v6 1/9] spl: Kconfig: allow K3 devices to use falcon mode Date: Mon, 28 Apr 2025 19:42:23 +0530 Message-ID: <20250428141235.1734014-2-anshuld@ti.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250428141235.1734014-1-anshuld@ti.com> References: <20250428141235.1734014-1-anshuld@ti.com> MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Falcon mode was disabled for TI_SECURE_DEVICE at commit e95b9b4437bc ("ti_armv7_common: Disable Falcon Mode on HS devices") for older 32-bit HS devices and can be enabled on K3 devices. For secure boot, the kernel with x509 headers can be packaged in a fit container (fitImage) signed with TIFS keys for authentication. Signed-off-by: Anshul Dalal --- common/spl/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index c08045f9c8d..68e900e9b91 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1165,7 +1165,7 @@ config SPL_ONENAND_SUPPORT config SPL_OS_BOOT bool "Activate Falcon Mode" - depends on !TI_SECURE_DEVICE + depends on !TI_SECURE_DEVICE || ARCH_K3 help Enable booting directly to an OS from SPL. for more info read doc/README.falcon From patchwork Mon Apr 28 14:12:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshul Dalal X-Patchwork-Id: 2078398 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=McE5bFpm; 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Mon, 28 Apr 2025 09:13:01 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 28 Apr 2025 09:13:01 -0500 Received: from localhost (dhcp-172-24-227-250.dhcp.ti.com [172.24.227.250]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53SED0Kj044687; Mon, 28 Apr 2025 09:13:01 -0500 From: Anshul Dalal To: CC: Anshul Dalal , , , , , , Subject: [PATCH v6 2/9] mach-k3: fix reading size and addr from fdt on R5 Date: Mon, 28 Apr 2025 19:42:24 +0530 Message-ID: <20250428141235.1734014-3-anshuld@ti.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250428141235.1734014-1-anshuld@ti.com> References: <20250428141235.1734014-1-anshuld@ti.com> MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean fdtdec_get_addr_size uses architecture dependent datatypes which causes the 32-bit R5 to fail when reading the 64-bit size and addr fields of reg nodes from the fdt. This changes it to a common api for both 64 and 32 bit platforms. Now fdt fixups can be applied to the fdt from R5. Signed-off-by: Anshul Dalal --- arch/arm/mach-k3/common_fdt.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/common_fdt.c b/arch/arm/mach-k3/common_fdt.c index 361b0c0b31b..c227743f9f8 100644 --- a/arch/arm/mach-k3/common_fdt.c +++ b/arch/arm/mach-k3/common_fdt.c @@ -137,7 +137,9 @@ int fdt_fixup_reserved(void *blob, const char *name, return -EINVAL; if (!strncmp(node_name, name, strlen(name))) { /* Read out old size first */ - addr = fdtdec_get_addr_size(blob, subnode, "reg", &size); + addr = fdtdec_get_addr_size_fixed( + blob, subnode, "reg", 0, 8 / sizeof(fdt32_t), + 8 / sizeof(fdt32_t), &size, false); if (addr == FDT_ADDR_T_NONE) return -EINVAL; new_size = size; From patchwork Mon Apr 28 14:12:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshul Dalal X-Patchwork-Id: 2078399 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 28 Apr 2025 09:13:03 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 28 Apr 2025 09:13:03 -0500 Received: from localhost (dhcp-172-24-227-250.dhcp.ti.com [172.24.227.250]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53SED24B061336; Mon, 28 Apr 2025 09:13:02 -0500 From: Anshul Dalal To: CC: Anshul Dalal , , , , , , Subject: [PATCH v6 3/9] arch: arm: k3-binman: add fit for falcon boot Date: Mon, 28 Apr 2025 19:42:25 +0530 Message-ID: <20250428141235.1734014-4-anshuld@ti.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250428141235.1734014-1-anshuld@ti.com> References: <20250428141235.1734014-1-anshuld@ti.com> MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This adds creation of tispl_falcon.bin for the am62a, 62p and 62x. The contents are the same as the existing tispl.bin but A53's spl and the fdt have been removed as they are not needed in falcon boot. This reduces boot time since the payload size is smaller and we also aren't authenticating the spl and fdt in secure boot. Signed-off-by: Anshul Dalal --- arch/arm/dts/k3-am625-sk-binman.dtsi | 64 ++++++++++++++++++++++++++++ arch/arm/dts/k3-am62a-sk-binman.dtsi | 64 ++++++++++++++++++++++++++++ arch/arm/dts/k3-am62p-sk-binman.dtsi | 51 ++++++++++++++++++++++ arch/arm/dts/k3-binman.dtsi | 54 +++++++++++++++++++++++ 4 files changed, 233 insertions(+) diff --git a/arch/arm/dts/k3-am625-sk-binman.dtsi b/arch/arm/dts/k3-am625-sk-binman.dtsi index 534eb14795b..5ca1a4b28e8 100644 --- a/arch/arm/dts/k3-am625-sk-binman.dtsi +++ b/arch/arm/dts/k3-am625-sk-binman.dtsi @@ -219,6 +219,70 @@ }; }; + ti-falcon { + insert-template = <&ti_falcon_template>; + + fit { + images { + tifsstub-hs { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-hs"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_hs"; + }; + }; + tifsstub-fs { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-fs"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_fs"; + }; + }; + tifsstub-gp { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-gp"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_gp"; + }; + }; + dm { + ti-secure { + content = <&dm_falcon>; + keyfile = "custMpk.pem"; + }; + dm_falcon: ti-dm { + filename = "ti-dm.bin"; + }; + }; + }; + + configurations { + default = "conf-0"; + conf-0 { + description = "k3-am625-sk-falcon"; + firmware = "atf"; + loadables = "tee", "tifsstub-hs", "tifsstub-fs", + "tifsstub-gp", "dm"; + }; + }; + }; + }; + ti-spl { insert-template = <&ti_spl_template>; diff --git a/arch/arm/dts/k3-am62a-sk-binman.dtsi b/arch/arm/dts/k3-am62a-sk-binman.dtsi index 2a8c260387b..bb1514c9d60 100644 --- a/arch/arm/dts/k3-am62a-sk-binman.dtsi +++ b/arch/arm/dts/k3-am62a-sk-binman.dtsi @@ -211,6 +211,70 @@ }; }; + ti-falcon { + insert-template = <&ti_falcon_template>; + + fit { + images { + tifsstub-hs { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-hs"; + load = <0x9ca00000>; + entry = <0x9ca00000>; + blob-ext { + filename = "tifsstub.bin_hs"; + }; + }; + tifsstub-fs { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-fs"; + load = <0x9ca00000>; + entry = <0x9ca00000>; + blob-ext { + filename = "tifsstub.bin_fs"; + }; + }; + tifsstub-gp { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-gp"; + load = <0x9ca00000>; + entry = <0x9ca00000>; + blob-ext { + filename = "tifsstub.bin_gp"; + }; + }; + dm { + ti-secure { + content = <&dm_falcon>; + keyfile = "custMpk.pem"; + }; + dm_falcon: ti-dm { + filename = "ti-dm.bin"; + }; + }; + }; + + configurations { + default = "conf-0"; + conf-0 { + description = "k3-am62a7-sk-falcon"; + firmware = "atf"; + loadables = "tee", "dm", "tifsstub-hs", "tifsstub-fs", + "tifsstub-gp"; + }; + }; + }; + }; + ti-spl { insert-template = <&ti_spl_template>; diff --git a/arch/arm/dts/k3-am62p-sk-binman.dtsi b/arch/arm/dts/k3-am62p-sk-binman.dtsi index 797644a7e0d..19c249bcfbc 100644 --- a/arch/arm/dts/k3-am62p-sk-binman.dtsi +++ b/arch/arm/dts/k3-am62p-sk-binman.dtsi @@ -173,6 +173,57 @@ }; + ti-falcon { + insert-template = <&ti_falcon_template>; + + fit { + images { + tifsstub-hs { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-hs"; + load = <0x9ca00000>; + entry = <0x9ca00000>; + blob-ext { + filename = "tifsstub.bin_hs"; + }; + }; + tifsstub-fs { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-fs"; + load = <0x9ca00000>; + entry = <0x9ca00000>; + blob-ext { + filename = "tifsstub.bin_fs"; + }; + }; + dm { + ti-secure { + content = <&dm_falcon>; + keyfile = "custMpk.pem"; + }; + dm_falcon: ti-dm { + filename = "ti-dm.bin"; + }; + }; + }; + + configurations { + default = "conf-0"; + conf-0 { + description = "k3-am62p5-sk-falcon"; + firmware = "atf"; + loadables = "tee", "dm", "tifsstub-hs", "tifsstub-fs"; + }; + }; + }; + }; + ti-spl { insert-template = <&ti_spl_template>; diff --git a/arch/arm/dts/k3-binman.dtsi b/arch/arm/dts/k3-binman.dtsi index 5163161b94d..a678379dae9 100644 --- a/arch/arm/dts/k3-binman.dtsi +++ b/arch/arm/dts/k3-binman.dtsi @@ -489,6 +489,60 @@ end_address = <0x0 0x9fffffff>; }; + ti_falcon_template: template-9 { + filename = "tispl_falcon.bin"; + pad-byte = <0xff>; + + fit { + description = "Configuration without SPL and FDT"; + #address-cells = <1>; + + images { + atf { + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + compression = "none"; + os = "arm-trusted-firmware"; + load = ; + entry = ; + ti-secure { + content = <&atf_falcon>; + keyfile = "custMpk.pem"; + }; + atf_falcon: atf-bl31 { + }; + }; + tee { + description = "OP-TEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = ; + entry = ; + ti-secure { + content = <&tee_falcon>; + keyfile = "custMpk.pem"; + }; + tee_falcon: tee-os { + optional; + }; + }; + dm { + description = "DM binary"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "DM"; + load = <0x89000000>; + entry = <0x89000000>; + }; + + }; + }; + }; + }; #endif From patchwork Mon Apr 28 14:12:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshul Dalal X-Patchwork-Id: 2078400 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=QNOd08ue; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; 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Mon, 28 Apr 2025 09:13:05 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 28 Apr 2025 09:13:04 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 28 Apr 2025 09:13:04 -0500 Received: from localhost (dhcp-172-24-227-250.dhcp.ti.com [172.24.227.250]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53SED3Ur045119; Mon, 28 Apr 2025 09:13:04 -0500 From: Anshul Dalal To: CC: Anshul Dalal , , , , , , Subject: [PATCH v6 4/9] mach-k3: sysfw-loader: update img_hdr for falcon Date: Mon, 28 Apr 2025 19:42:26 +0530 Message-ID: <20250428141235.1734014-5-anshuld@ti.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250428141235.1734014-1-anshuld@ti.com> References: <20250428141235.1734014-1-anshuld@ti.com> MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The returned legacy_img_hdr is used by booti_setup to compute the load address for the kernel image. This change ensures the kernel load address is CONFIG_SYS_LOAD_ADDR in falcon boot. Signed-off-by: Anshul Dalal --- arch/arm/mach-k3/r5/sysfw-loader.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/r5/sysfw-loader.c b/arch/arm/mach-k3/r5/sysfw-loader.c index 188731e673d..19607606965 100644 --- a/arch/arm/mach-k3/r5/sysfw-loader.c +++ b/arch/arm/mach-k3/r5/sysfw-loader.c @@ -89,7 +89,11 @@ static void *sysfw_load_address; struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size) { if (sysfw_loaded) - return (struct legacy_img_hdr *)(CONFIG_TEXT_BASE + offset); + if (IS_ENABLED(CONFIG_SPL_OS_BOOT)) + return (struct legacy_img_hdr *)CONFIG_SYS_LOAD_ADDR; + else + return (struct legacy_img_hdr *)(CONFIG_TEXT_BASE + + offset); else if (sysfw_load_address) return sysfw_load_address; else From patchwork Mon Apr 28 14:12:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshul Dalal X-Patchwork-Id: 2078401 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 28 Apr 2025 09:13:06 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 28 Apr 2025 09:13:06 -0500 Received: from localhost (dhcp-172-24-227-250.dhcp.ti.com [172.24.227.250]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53SED5qk045155; Mon, 28 Apr 2025 09:13:05 -0500 From: Anshul Dalal To: CC: Anshul Dalal , , , , , , Subject: [PATCH v6 5/9] config: add falcon boot config fragment for am62x Date: Mon, 28 Apr 2025 19:42:27 +0530 Message-ID: <20250428141235.1734014-6-anshuld@ti.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250428141235.1734014-1-anshuld@ti.com> References: <20250428141235.1734014-1-anshuld@ti.com> MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This fragment enables falcon boot for the am62x, 62a and 62p. To have enough stack and heap space for loading kernel image as FIT the memory map was modified by expanding stack + heap size, the PRELOADED_BL33_BASE in ATF has to also be updated to 0x82000000 since the kernel requires to be loaded at 2MiB aligned address along with change changing K3_HW_CONFIG_BASE to 0x88000000 for the DT passed to kernel. Modified memory map for R5 SPL (modified addresses marked with *): 0x80000000 +-------------------------------+ Start of DDR 512KiB | ATF reserved memory space | CONFIG_K3_ATF_LOAD_ADDR* 0x80080000 +-------------------------------+ 31.5MiB | Unused | 0x82000000 +-------------------------------+ PRELOADED_BL33_BASE* in ATF | | CONFIG_SYS_LOAD_ADDR* 57MiB | Kernel + initramfs Image | CONFIG_SPL_LOAD_FIT_ADDRESS* | | 0x85900000 +-------------------------------+ | | | R5 U-Boot SPL Stack + Heap | 39MiB | (size defined by | |SPL_STACK_R_MALLOC_SIMPLE_LEN*)| | | 0x88000000 +-------------------------------+ CONFIG_SPL_STACK_R_ADDR* | | K3_HW_CONFIG_BASE* in ATF 16MiB | Kernel DTB | CONFIG_SPL_PAYLOAD_ARGS_ADDR* | | 0x89000000 +-------------------------------+ 331MiB | Device Manager (DM) Load Addr | 0x9db00000 +-------------------------------+ 12MiB | DM Reserved | 0x9e700000 +-------------------------------+ 1MiB | Unused | 0x9e800000 +-------------------------------+ BL32_BASE in ATF 24MiB | OPTEE | 0xa0000000 +-------------------------------+ End of DDR (512MiB) Signed-off-by: Anshul Dalal --- configs/am62x_r5_falcon.config | 38 ++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 configs/am62x_r5_falcon.config diff --git a/configs/am62x_r5_falcon.config b/configs/am62x_r5_falcon.config new file mode 100644 index 00000000000..c9bb8d68505 --- /dev/null +++ b/configs/am62x_r5_falcon.config @@ -0,0 +1,38 @@ +# Enable falcon mode +CONFIG_SPL_OS_BOOT=y + +# We use envs for setting bootargs and optionally for `falcon_(image|args)_file` +CONFIG_SPL_ENV_SUPPORT=y + +# Perform FDT fixups from SPL +CONFIG_OF_SYSTEM_SETUP=y + +# Enabling this causes issues with EMMC FS boot, +# When enabled the SPL tries to detect FS on boot[01] hw partition which fails +# since we need the raw tiboot3.bin there for the board to boot instead +CONFIG_SUPPORT_EMMC_BOOT=n + +# Used as the 2MiB aligned load address for kernel +CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x88000000 +CONFIG_SPL_LOAD_FIT_ADDRESS=0x82000000 +CONFIG_SPL_STACK_R_ADDR=0x88000000 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2700000 + +# We use the rootfs (i.e partition 2) for booting which is ext4 not FAT +CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=2 +CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_FS_FAT=n + +# Loading tispl_falcon instead of tispl which has fdt and A53 spl saves time +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="boot/tispl_falcon.bin" +CONFIG_SPL_FS_LOAD_KERNEL_NAME="boot/fitImage" + +# Disabled to save space on the spl +CONFIG_TI_K3_NAVSS_UDMA=n + +# During SPI boot, kernel and args are loaded from the eMMC or SD and not SPI, +# therefore we don't actually make use of these config values. +CONFIG_SYS_SPI_KERNEL_OFFS=0 +CONFIG_SYS_SPI_ARGS_OFFS=0 +CONFIG_SYS_SPI_ARGS_SIZE=0 From patchwork Mon Apr 28 14:12:28 2025 Content-Type: text/plain; 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Mon, 28 Apr 2025 09:13:07 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 28 Apr 2025 09:13:07 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 28 Apr 2025 09:13:07 -0500 Received: from localhost (dhcp-172-24-227-250.dhcp.ti.com [172.24.227.250]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53SED6c0061698; Mon, 28 Apr 2025 09:13:07 -0500 From: Anshul Dalal To: CC: Anshul Dalal , , , , , , Subject: [PATCH v6 6/9] board: ti: add default dtb for am62 in falcon mode Date: Mon, 28 Apr 2025 19:42:28 +0530 Message-ID: <20250428141235.1734014-7-anshuld@ti.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250428141235.1734014-1-anshuld@ti.com> References: <20250428141235.1734014-1-anshuld@ti.com> MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The SPL_FS_LOAD_ARGS_NAME config is used for the arguments to the kernel (dtb in our case) in falcon boot. Setting it in board specific Kconfig allows us to reuse the same config fragment 'am62x_r5_falcon.config' for all 3 platforms for enabling falcon boot. Signed-off-by: Anshul Dalal --- board/ti/am62ax/Kconfig | 3 +++ board/ti/am62px/Kconfig | 3 +++ board/ti/am62x/Kconfig | 3 +++ 3 files changed, 9 insertions(+) diff --git a/board/ti/am62ax/Kconfig b/board/ti/am62ax/Kconfig index 51e7b3e0eab..187e9e5c9cd 100644 --- a/board/ti/am62ax/Kconfig +++ b/board/ti/am62ax/Kconfig @@ -23,4 +23,7 @@ if TARGET_AM62A7_R5_EVM config SPL_LDSCRIPT default "arch/arm/mach-omap2/u-boot-spl.lds" +config SPL_FS_LOAD_ARGS_NAME + default "boot/dtb/ti/k3-am62a7-sk.dtb" + endif diff --git a/board/ti/am62px/Kconfig b/board/ti/am62px/Kconfig index 9d95ffd9b29..5f7252d7b19 100644 --- a/board/ti/am62px/Kconfig +++ b/board/ti/am62px/Kconfig @@ -23,4 +23,7 @@ if TARGET_AM62P5_R5_EVM config SPL_LDSCRIPT default "arch/arm/mach-omap2/u-boot-spl.lds" +config SPL_FS_LOAD_ARGS_NAME + default "boot/dtb/ti/k3-am62p5-sk.dtb" + endif diff --git a/board/ti/am62x/Kconfig b/board/ti/am62x/Kconfig index 610dacfdc08..1564913096c 100644 --- a/board/ti/am62x/Kconfig +++ b/board/ti/am62x/Kconfig @@ -32,6 +32,9 @@ config SYS_CONFIG_NAME config SPL_LDSCRIPT default "arch/arm/mach-omap2/u-boot-spl.lds" +config SPL_FS_LOAD_ARGS_NAME + default "boot/dtb/ti/k3-am625-sk.dtb" + source "board/ti/common/Kconfig" endif From patchwork Mon Apr 28 14:12:29 2025 Content-Type: text/plain; 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Mon, 28 Apr 2025 09:13:09 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 28 Apr 2025 09:13:08 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 28 Apr 2025 09:13:08 -0500 Received: from localhost (dhcp-172-24-227-250.dhcp.ti.com [172.24.227.250]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53SED8W9061742; Mon, 28 Apr 2025 09:13:08 -0500 From: Anshul Dalal To: CC: Anshul Dalal , , , , , , Subject: [PATCH v6 7/9] mach-k3: common: enable falcon mode for 62 platform Date: Mon, 28 Apr 2025 19:42:29 +0530 Message-ID: <20250428141235.1734014-8-anshuld@ti.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250428141235.1734014-1-anshuld@ti.com> References: <20250428141235.1734014-1-anshuld@ti.com> MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean We use the spl_board_prepare_for_boot hook to call k3_falcon_prep which is ran after tispl is loaded but before jump_to_image. In here, we find the boot media and load the image just as std falcon flow (since spl_start_uboot returns 0 now). Once the kernel and args are loaded, we perform fdt fixups on the fdt accompanying the kernel (if loaded as FIT) or the loaded up args and return. Now when the flow goes to jump_to_image, we do the regular pre-jump procedure and jump to ATF which jumps to the kernel directly since we have already loaded the kernel and dtb at their respective addresses (PRELOADED_BL33_BASE and K3_HW_CONFIG_BASE). Signed-off-by: Anshul Dalal --- arch/arm/mach-k3/common.c | 107 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 107 insertions(+) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index fa8cd93d664..ad5ed92eb03 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -263,8 +263,115 @@ static __maybe_unused void k3_dma_remove(void) pr_warn("DMA Device not found (err=%d)\n", rc); } +#if IS_ENABLED(CONFIG_SPL_OS_BOOT) && !IS_ENABLED(CONFIG_ARM64) +static bool tispl_loaded; + +int spl_start_uboot(void) +{ + if (!tispl_loaded) + return 1; + return 0; +} + +static int k3_falcon_fdt_fixup(void *fdt) +{ + struct disk_partition info; + struct blk_desc *dev_desc; + char bootmedia[32]; + char bootpart[32]; + char str[256]; + int ret; + + strcpy(bootmedia, env_get("boot")); + strcpy(bootpart, env_get("bootpart")); + ret = blk_get_device_part_str(bootmedia, bootpart, &dev_desc, &info, 0); + if (ret < 0) + printf("Failed to get part details for %s %s [%d]\n", bootmedia, + bootpart, ret); + sprintf(str, "console=%s root=PARTUUID=%s rootwait", env_get("console"), + info.uuid); + + fdt_set_totalsize(fdt, fdt_totalsize(fdt) + CONFIG_SYS_FDT_PAD); + ret = fdt_find_and_setprop(fdt, "/chosen", "bootargs", str, + strlen(str) + 1, 1); + if (ret) { + printf("Could not set bootargs: %s\n", fdt_strerror(ret)); + return ret; + } + debug("Set bootargs to: %s\n", str); + +#ifdef CONFIG_OF_BOARD_SETUP + ret = ft_board_setup(fdt, gd->bd); + if (ret) { + printf("Failed in board fdt fixups: %s\n", fdt_strerror(ret)); + return ret; + } +#endif + +#ifdef CONFIG_OF_SYSTEM_SETUP + ret = ft_system_setup(fdt, gd->bd); + if (ret) { + printf("Failed in system fdt fixups: %s\n", fdt_strerror(ret)); + return ret; + } +#endif + + return 0; +} + +static int k3_falcon_prep(void) +{ + struct spl_image_loader *loader, *drv; + struct spl_image_info kernel_image; + struct spl_boot_device bootdev; + int ret = -ENXIO, n_ents; + void *fdt; + + tispl_loaded = true; + memset(&kernel_image, '\0', sizeof(kernel_image)); + drv = ll_entry_start(struct spl_image_loader, spl_image_loader); + n_ents = ll_entry_count(struct spl_image_loader, spl_image_loader); + bootdev.boot_device = spl_boot_device(); + if (bootdev.boot_device == BOOT_DEVICE_SPI) { + if (strcmp(env_get("mmcdev"), "1") == 0) + bootdev.boot_device = BOOT_DEVICE_MMC; + else + bootdev.boot_device = BOOT_DEVICE_EMMC; + } + bootdev.boot_device_name = NULL; + + for (loader = drv; loader != drv + n_ents; loader++) { + if (bootdev.boot_device != loader->boot_device) + continue; + if (loader) { + printf("Loading falcon payload from %s\n", + spl_loader_name(loader)); + ret = loader->load_image(&kernel_image, &bootdev); + if (ret) + continue; + + fdt = spl_image_fdt_addr(&kernel_image); + if (!fdt) + fdt = (void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR; + ret = k3_falcon_fdt_fixup(fdt); + if (ret) { + printf("Failed performing fdt fixups in falcon flow: [%d]\n", + ret); + return ret; + } + return 0; + } + } + + return ret; +} +#endif + void spl_board_prepare_for_boot(void) { +#if IS_ENABLED(CONFIG_SPL_OS_BOOT) && !IS_ENABLED(CONFIG_ARM64) + k3_falcon_prep(); +#endif #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) dcache_disable(); #endif From patchwork Mon Apr 28 14:12:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshul Dalal X-Patchwork-Id: 2078405 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=UTirpQQL; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4ZmQRS0jHKz1yMf for ; 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Signed-off-by: Anshul Dalal --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index e83672b1823..1d8fa759141 100644 --- a/Makefile +++ b/Makefile @@ -2225,7 +2225,7 @@ CLEAN_FILES += include/autoconf.mk* include/bmp_logo.h include/bmp_logo_data.h \ include/config.h include/generated/env.* drivers/video/u_boot_logo.S \ tools/version.h u-boot* MLO* SPL System.map fit-dtb.blob* \ u-boot-ivt.img.log u-boot-dtb.imx.log SPL.log u-boot.imx.log \ - lpc32xx-* bl31.c bl31.elf bl31_*.bin image.map tispl.bin* \ + lpc32xx-* bl31.c bl31.elf bl31_*.bin image.map tispl*.bin* \ idbloader.img flash.bin flash.log defconfig keep-syms-lto.c \ mkimage-out.spl.mkimage mkimage.spl.mkimage imx-boot.map \ itb.fit.fit itb.fit.itb itb.map spl.map mkimage-out.rom.mkimage \ From patchwork Mon Apr 28 14:12:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshul Dalal X-Patchwork-Id: 2078406 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 28 Apr 2025 09:13:11 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 28 Apr 2025 09:13:11 -0500 Received: from localhost (dhcp-172-24-227-250.dhcp.ti.com [172.24.227.250]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53SEDBwo045290; Mon, 28 Apr 2025 09:13:11 -0500 From: Anshul Dalal To: CC: Anshul Dalal , , , , , , Subject: [PATCH v6 9/9] doc: ti: am62: add falcon mode documentation Date: Mon, 28 Apr 2025 19:42:31 +0530 Message-ID: <20250428141235.1734014-10-anshuld@ti.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250428141235.1734014-1-anshuld@ti.com> References: <20250428141235.1734014-1-anshuld@ti.com> MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This patch adds user documentation for falcon boot for am62 platforms. The main section is added to am62x_sk.rst and other documents just include the section. Steps to build falcon support, usage and the modified R5 memory map have been documented. Two svg images have also been added for reference, one for the modified tispl_falcon.bin and other for the falcon specific fitImage format. Signed-off-by: Anshul Dalal --- doc/board/ti/am62ax_sk.rst | 7 + doc/board/ti/am62px_sk.rst | 7 + doc/board/ti/am62x_sk.rst | 290 ++++++++++++++++++ doc/board/ti/img/fitImage_falcon.svg | 180 +++++++++++ .../ti/img/tifsstub_dm_tispl_falcon.bin.svg | 285 +++++++++++++++++ 5 files changed, 769 insertions(+) create mode 100644 doc/board/ti/img/fitImage_falcon.svg create mode 100644 doc/board/ti/img/tifsstub_dm_tispl_falcon.bin.svg diff --git a/doc/board/ti/am62ax_sk.rst b/doc/board/ti/am62ax_sk.rst index 262340ef59a..9830916e3e0 100644 --- a/doc/board/ti/am62ax_sk.rst +++ b/doc/board/ti/am62ax_sk.rst @@ -192,6 +192,13 @@ https://www.ti.com/lit/pdf/spruj16 under the `Boot Mode Pins` section. For SW2 and SW1, the switch state in the "ON" position = 1. +Falcon Mode +----------- + +.. include:: am62x_sk.rst + :start-after: .. am62x_evm_falcon_mode_start + :end-before: .. am62x_evm_falcon_mode_end + Debugging U-Boot ---------------- diff --git a/doc/board/ti/am62px_sk.rst b/doc/board/ti/am62px_sk.rst index 99bdc034869..74f6dafa238 100644 --- a/doc/board/ti/am62px_sk.rst +++ b/doc/board/ti/am62px_sk.rst @@ -290,6 +290,13 @@ https://www.ti.com/lit/pdf/spruj83 under the `Boot Mode Pins` section. For SW2 and SW1, the switch state in the "ON" position = 1. +Falcon Mode +----------- + +.. include:: am62x_sk.rst + :start-after: .. am62x_evm_falcon_mode_start + :end-before: .. am62x_evm_falcon_mode_end + Debugging U-Boot ---------------- diff --git a/doc/board/ti/am62x_sk.rst b/doc/board/ti/am62x_sk.rst index dab2970a85c..cb84e662042 100644 --- a/doc/board/ti/am62x_sk.rst +++ b/doc/board/ti/am62x_sk.rst @@ -526,6 +526,296 @@ Next, based on NET_VCI_STRING string mentioned in respective defconfig file `tib fetches `tispl.bin` and then `tispl.bin` fetches `u-boot.img` from TFTP server which completes Ethernet boot on the device. +Falcon Mode +----------- + +.. am62x_evm_falcon_mode_start + +Falcon boot flow on am62 platforms bypasses the A-core SPL and u-boot with the +overall boot flow as below: + +**Normal boot flow:** + +* R5 SPL -> ATF -> OP-TEE -> Cortex-A SPL -> U-Boot -> Kernel + +**With falcon mode:** + +* R5 SPL -> ATF -> OP-TEE -> Kernel + +Build Process +^^^^^^^^^^^^^ + +Enabling falcon mode requires re-building ATF, U-boot and the kernel fitImage +as follows: + +0. Setup environment variables: +""""""""""""""""""""""""""""""" + +Refer to the build procedure above for setting up the environment variables. + +1. Trusted Firmware-A: +"""""""""""""""""""""" + +The R5 SPL in falcon mode loads the kernel at ``0x82000000`` and the +corresponding DTB at ``0x88000000``. Therefore ATF needs to be rebuild with +changes to the respective addresses. + +.. prompt:: bash $ + + # Change load addresses for the kernel and DTB + export TFA_EXTRA_ARGS="PRELOADED_BL33_BASE=0x82000000 K3_HW_CONFIG_BASE=0x88000000" + +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_build_steps_tfa + :end-before: .. k3_rst_include_end_build_steps_tfa + +2. U-Boot: +"""""""""" + +* **2.1 R5:** + +.. prompt:: bash $ + + # use the common falcon config fragment for am62 platforms + export $UBOOT_FALCON_CFG_FRAGMENTR="am62x_r5_falcon.config" + export UBOOT_CFG_CORTEXR="${UBOOT_CFG_CORTEXR} ${UBOOT_FALCON_CFG_FRAGMENTR}" + +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_build_steps_spl_r5 + :end-before: .. k3_rst_include_end_build_steps_spl_r5 + +* **2.2 A53:** + +After rebuilding ATF, the binary needs to be repackaged inside the tispl +binaries: + +.. include:: ../ti/k3.rst + :start-after: .. k3_rst_include_start_build_steps_uboot + :end-before: .. k3_rst_include_end_build_steps_uboot + +3. fitImage: +"""""""""""" + +.. warning:: + + The ``fitImage`` available by default under ``boot/fitImage`` in rootfs of + the standard SDK release is not compatible with falcon mode. + +For secure boot in falcon mode, the compute heavy authentication required for +the ``fitImage`` is offloaded from the slower R5 core to TIFS. This requires +``fitImage`` to package the necessary binaries (kernel and dtb) with a +pre-signed x509 certificate. + +**fitImage for falcon mode:** + +.. image:: img/fitImage_falcon.svg + :alt: fitImage for falcon boot image format + +* **Sources** + + * **Core Secdev K3** + + | **source:** https://git.ti.com/cgit/security-development-tools/core-secdev-k3 + | **branch:** master + +**Follow the steps below to create a falcon compatible fitImage:** + +**3.1 Environment setup** + +.. prompt:: bash $ + + export DTB=path/to/dtb + export IMAGE=path/to/kernel-image + +**3.2 fitImage creation** + + An Image tree source (*its*) file describes the structure and contents of the + final image produced by the mkimage tool. + + To create the ``fitImage`` for falcon mode, create a file ``fitImage.its`` + with the following contents inside the ``core-secdev-k3`` source directory,: + +.. code-block:: dts + + /dts-v1/; + + / { + description = "Kernel fitImage for falcon mode"; + #address-cells = <1>; + + images { + kernel-1 { + description = "Linux kernel"; + data = /incbin/("Image.sec"); + type = "kernel"; + arch = "arm64"; + os = "linux"; + compression = "none"; + load = <0x82000000>; + entry = <0x82000000>; + }; + falcon.dtb { + description = "Flattened Device Tree blob"; + data = /incbin/("falcon.dtb.sec"); + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x88000000>; + entry = <0x88000000>; + }; + }; + + configurations { + default = "conf-falcon"; + conf-falcon { + description = "Pre-signed Kernel and DTB"; + kernel = "kernel-1"; + fdt = "falcon.dtb"; + }; + }; + }; + +Sign the kernel and dtb using ``secure-binary-image.sh`` and create the +``fitImage`` using mkimage: + +.. prompt:: bash $ + + # inside core-secdev-k3 source + cp $IMAGE Image + cp $DTB falcon.dtb + ./scripts/secure-binary-image.sh Image Image.sec + ./scripts/secure-binary-image.sh falcon.dtb falcon.dtb.sec + mkimage -f fitImage.its fitImage + +Usage +^^^^^ + +Falcon mode makes use of a cut down variant of the tispl binary called +``tispl_falcon.bin`` with the Cortex-A SPL and it's corresponding DTBs removed. +This file should be present alongside the existing ``tispl.bin`` after building +U-Boot for the Cortex-A cores. + +- **tispl_falcon.bin** + +.. image:: img/tifsstub_dm_tispl_falcon.bin.svg + :alt: tispl_falcon.bin image format + +1. eMMC/SD Boot: +"""""""""""""""" + +Falcon mode for K3 devices only supports SD and eMMC in FS boot. The R5 SPL +once loaded from the ``tiboot3.bin`` file from the boot partition looks for +``tispl_falcon.bin``, the DTB and fitImage (or kernel image for unauthenticated +boot) inside the boot directory of the second partition (rootfs). + +.. list-table:: + :widths: 8 8 8 25 + :header-rows: 1 + + * - File + - Copy path on SD/eMMC + - Partition + - Description + + * - ``tiboot3.bin`` + - ``/tiboot3.bin`` + - boot (fat) + - R5 SPL with falcon support + + * - ``tispl_falcon.bin`` + - ``/boot/tispl_falcon.bin`` + - rootfs (ext4) + - tispl binary without SPL for the A core and DTB + + * - ``fitImage`` + - ``/boot/fitImage`` + - rootfs (ext4) + - kernel and dtb fitImage with pre-signed binaries + +2. OSPI Boot: +""""""""""""" + +For OSPI boot, the ``tiboot3.bin`` and ``tispl_falcon.bin`` files should be +flashed to the same addresses in flash as regular boot flow but the DTB and the +fitImage (or kernel image for unauthenticated boot) are read from the rootfs's +boot directory. + +Below commands can be used to download ``tiboot3.bin`` and ``tispl_falcon.bin`` +over tftp and then flash those to OSPI at their respective addresses. + +.. prompt:: bash => + + sf probe + tftp ${loadaddr} tiboot3.bin + sf update $loadaddr 0x0 $filesize + tftp ${loadaddr} tispl_falcon.bin + sf update $loadaddr 0x80000 $filesize + +R5 SPL Memory Map: +^^^^^^^^^^^^^^^^^^ + +Standard boot: +"""""""""""""" + +.. code-block:: + + 0x80000000 +-------------------------------+ Start of DDR + 512KiB | ATF reserved memory space | CONFIG_K3_ATF_LOAD_ADDR + | | + 0x80080000 +-------------------------------+ PRELOADED_BL33_BASE in ATF + 29.5MiB | A53 SPL + DTB + | CONFIG_SPL_LOAD_FIT_ADDRESS + | Download region for FIT in DFU| + 0x81e00000 +-------------------------------+ + | R5 U-Boot SPL Stack + Heap | + 2MiB | (size defined by | + | SPL_STACK_R_MALLOC_SIMPLE_LEN)| + 0x82000000 +-------------------------------+ CONFIG_SPL_STACK_R_ADDR + 112MiB | Unused | + 0x89000000 +-------------------------------+ + 331MiB | Device Manager (DM) Load Addr | + 0x9db00000 +-------------------------------+ + 12MiB | DM Reserved | + 0x9e700000 +-------------------------------+ + 1MiB | Unused | + 0x9e800000 +-------------------------------+ BL32_BASE in ATF + 24MiB | OPTEE | + 0xa0000000 +-------------------------------+ End of DDR (512MiB) + +Falcon mode: +"""""""""""" + +.. code-block:: + + 0x80000000 +-------------------------------+ Start of DDR + 512KiB | ATF reserved memory space | CONFIG_K3_ATF_LOAD_ADDR + 0x80080000 +-------------------------------+ + 31.5MiB | Unused | + 0x82000000 +-------------------------------+ PRELOADED_BL33_BASE in ATF + | | CONFIG_SYS_LOAD_ADDR + 57MiB | Kernel + initramfs Image | CONFIG_SPL_LOAD_FIT_ADDRESS + | | + 0x85900000 +-------------------------------+ + | | + | R5 U-Boot SPL Stack + Heap | + 39MiB | (size defined by | + | SPL_STACK_R_MALLOC_SIMPLE_LEN)| + | | + 0x88000000 +-------------------------------+ CONFIG_SPL_STACK_R_ADDR + | | K3_HW_CONFIG_BASE in ATF + 16MiB | Kernel DTB | CONFIG_SPL_PAYLOAD_ARGS_ADDR + | | + 0x89000000 +-------------------------------+ + 331MiB | Device Manager (DM) Load Addr | + 0x9db00000 +-------------------------------+ + 12MiB | DM Reserved | + 0x9e700000 +-------------------------------+ + 1MiB | Unused | + 0x9e800000 +-------------------------------+ BL32_BASE in ATF + 24MiB | OPTEE | + 0xa0000000 +-------------------------------+ End of DDR (512MiB) + +.. am62x_evm_falcon_mode_end + Debugging U-Boot ---------------- diff --git a/doc/board/ti/img/fitImage_falcon.svg b/doc/board/ti/img/fitImage_falcon.svg new file mode 100644 index 00000000000..a22e0f6564e --- /dev/null +++ b/doc/board/ti/img/fitImage_falcon.svg @@ -0,0 +1,180 @@ + + + + + + + + + + + + + x509 Certificate + x509 Certificate + Fit Header + Kernel Image + + + + + DTB + + + + + + + + diff --git a/doc/board/ti/img/tifsstub_dm_tispl_falcon.bin.svg b/doc/board/ti/img/tifsstub_dm_tispl_falcon.bin.svg new file mode 100644 index 00000000000..7e2793c2ed9 --- /dev/null +++ b/doc/board/ti/img/tifsstub_dm_tispl_falcon.bin.svg @@ -0,0 +1,285 @@ + + + + + + + + + + + + + + + + + + + FIT Header + + + + FIT Header + + + + + + + + + TIFS Stub + +(GP, HS-FS, HS-SE) + + + + TIFS Stub... + + + + + + + + + TF-A + + + + TF-A + + + + + + + + + OP-TEE + + + + OP-TEE + + + + + + + + + R5 DM FW + + + + R5 DM FW + + + + + + + Text is not SVG - cannot display + + +