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Signed-off-by: Mayuresh Chitale Reviewed-by: Maxim Moskalets --- boot/image.c | 3 ++- include/image.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/boot/image.c b/boot/image.c index abac254e026..03d5e59b634 100644 --- a/boot/image.c +++ b/boot/image.c @@ -92,7 +92,8 @@ static const table_entry_t uimage_arch[] = { { IH_ARCH_ARC, "arc", "ARC", }, { IH_ARCH_X86_64, "x86_64", "AMD x86_64", }, { IH_ARCH_XTENSA, "xtensa", "Xtensa", }, - { IH_ARCH_RISCV, "riscv", "RISC-V", }, + { IH_ARCH_RISCV, "riscv", "RISC-V 32 Bit",}, + { IH_ARCH_RISCV64, "riscv64", "RISC-V 64 Bit",}, { -1, "", "", }, }; diff --git a/include/image.h b/include/image.h index 8a9f779d3ff..12b31166e86 100644 --- a/include/image.h +++ b/include/image.h @@ -139,6 +139,7 @@ enum { IH_ARCH_X86_64, /* AMD x86_64, Intel and Via */ IH_ARCH_XTENSA, /* Xtensa */ IH_ARCH_RISCV, /* RISC-V */ + IH_ARCH_RISCV64, /* RISC-V 64 bit*/ IH_ARCH_COUNT, }; From patchwork Tue Mar 11 13:35:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mayuresh Chitale X-Patchwork-Id: 2058756 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Signed-off-by: Mayuresh Chitale --- arch/riscv/dts/binman.dtsi | 14 ++++++++++---- arch/riscv/include/asm/u-boot.h | 4 ++++ 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi index 0405faca574..a1a566b511b 100644 --- a/arch/riscv/dts/binman.dtsi +++ b/arch/riscv/dts/binman.dtsi @@ -5,6 +5,12 @@ #include +#ifdef CONFIG_64BIT +#define ARCH "riscv64" +#else +#define ARCH "riscv" + +#endif / { binman: binman { multiple-images; @@ -31,7 +37,7 @@ description = "U-Boot"; type = "standalone"; os = "U-Boot"; - arch = "riscv"; + arch = ARCH; compression = "none"; load = /bits/ 64 ; @@ -44,7 +50,7 @@ description = "Linux"; type = "standalone"; os = "Linux"; - arch = "riscv"; + arch = ARCH; compression = "none"; load = /bits/ 64 ; @@ -57,7 +63,7 @@ tee { description = "OP-TEE"; type = "tee"; - arch = "riscv"; + arch = ARCH; compression = "none"; os = "tee"; load = /bits/ 64 ; @@ -71,7 +77,7 @@ description = "OpenSBI fw_dynamic Firmware"; type = "firmware"; os = "opensbi"; - arch = "riscv"; + arch = ARCH; compression = "none"; load = /bits/ 64 ; entry = /bits/ 64 ; diff --git a/arch/riscv/include/asm/u-boot.h b/arch/riscv/include/asm/u-boot.h index d5e1d5f3231..a90cc4c21cf 100644 --- a/arch/riscv/include/asm/u-boot.h +++ b/arch/riscv/include/asm/u-boot.h @@ -23,6 +23,10 @@ #include /* For image.h:image_check_target_arch() */ +#ifdef CONFIG_64BIT +#define IH_ARCH_DEFAULT IH_ARCH_RISCV64 +#else #define IH_ARCH_DEFAULT IH_ARCH_RISCV +#endif #endif /* _U_BOOT_H_ */ From patchwork Tue Mar 11 13:35:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mayuresh Chitale X-Patchwork-Id: 2058757 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=JQRWlzw7; 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Tue, 11 Mar 2025 06:35:42 -0700 (PDT) Received: from localhost.localdomain ([103.97.166.196]) by smtp.googlemail.com with ESMTPSA id 586e51a60fabf-2c24883035bsm2578036fac.5.2025.03.11.06.35.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Mar 2025 06:35:42 -0700 (PDT) From: Mayuresh Chitale To: u-boot@lists.denx.de Cc: Mayuresh Chitale , Rick Chen , Leo , Tom Rini , Simon Glass , Sughosh Ganu , Janne Grunau , Ilias Apalodimas , Dario Binacchi , Heinrich Schuchardt Subject: [PATCH v1 3/3] booti/bootm: riscv: Verify image arch type Date: Tue, 11 Mar 2025 13:35:05 +0000 Message-ID: <20250311133506.124914-4-mchitale@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250311133506.124914-1-mchitale@ventanamicro.com> References: <20250311133506.124914-1-mchitale@ventanamicro.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Unlike ARM and X86, booting 32-bit images on 64-bit CPUs is currently not supported for Risc-V. Hence, for bootm, disallow booting a FIT or a legacy image that was built for an arch type which is different than the current arch and for booti, set the arch type to be the same as the current arch. Signed-off-by: Mayuresh Chitale Reviewed-by: Heinrich Schuchardt --- arch/riscv/lib/bootm.c | 4 ++++ cmd/booti.c | 5 ++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c index 76c610bcee0..90f71bee6a5 100644 --- a/arch/riscv/lib/bootm.c +++ b/arch/riscv/lib/bootm.c @@ -94,6 +94,10 @@ static void boot_jump_linux(struct bootm_headers *images, int flag) announce_and_cleanup(fake); if (!fake) { + if (images->os.arch != IH_ARCH_DEFAULT) { + printf("Image arch not compatible with host arch.\n"); + hang(); + } if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) { #ifdef CONFIG_SMP ret = smp_call_function(images->ep, diff --git a/cmd/booti.c b/cmd/booti.c index 1a57fe91397..00921ec4a9d 100644 --- a/cmd/booti.c +++ b/cmd/booti.c @@ -131,7 +131,10 @@ int do_booti(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) images.os.os = IH_OS_LINUX; if (IS_ENABLED(CONFIG_RISCV_SMODE)) - images.os.arch = IH_ARCH_RISCV; + if (IS_ENABLED(CONFIG_64BIT)) + images.os.arch = IH_ARCH_RISCV64; + else + images.os.arch = IH_ARCH_RISCV; else if (IS_ENABLED(CONFIG_ARM64)) images.os.arch = IH_ARCH_ARM64;